notes

2
Data Representation - ASCII 7 bits , 2 7 = 128 characters 33 control characters 95 printable characters o 10 dec digits, 26+26 Eng alphabets o 33 space, punctuation marks, common symbols - Byte (8 bits) – single character - Unicode (UTF-8) Unicode provides a unique number for every character o no matter what the platform o no matter what the program o no matter what the language - Strings sequence of characters - Logical Data Each n-bit unit is viewed as consisting of n1-bit items of data, each item having the value 0 or 1 - Addresses store the memory address Chapter 7 Von Neumann Architecture 3 key concepts o Data and instructions are stored in a single read-write memory Stored-program concept: instructions in memory o Contents of memory are addressable by location, whether content is data or instruction o Execution occurs in sequential fashion, unless explicitly modified by certain instructions Bus Interconnection Bus o communication pathway connecting two or more devices o System bus: bus that connects major (top-level) computer components: processor, memory, I/O Line o Electrical connection transmitting digital states System bus consists of dozens to hundreds of separate lines, classified into three functional groups Address lines Width of address bus n lines allow addressing 2 n unique memory locations

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Page 1: Notes

Data Representation

- ASCII

7 bits , 27 = 128 characters

33 control characters

95 printable characters

o 10 dec digits, 26+26 Eng alphabets

o 33 space, punctuation marks, common symbols

- Byte (8 bits) – single character

- Unicode (UTF-8)

Unicode provides a unique number for every character

o no matter what the platform

o no matter what the program

o no matter what the language

- Strings

sequence of characters

- Logical Data

Each n-bit unit is viewed as consisting of n1-bit items

of data, each item having the value 0 or 1

- Addresses

store the memory address

Chapter 7

Von Neumann Architecture

3 key concepts

o Data and instructions are stored in a single

read-write memory

Stored-program concept: instructions in

memory

o Contents of memory are addressable by

location, whether content is data or instruction

o Execution occurs in sequential fashion, unless

explicitly modified by certain instructions

Bus Interconnection

Bus

o communication pathway connecting two or

more devices

o System bus: bus that connects major (top-level)

computer components: processor, memory, I/O

Line

o Electrical connection transmitting digital states

System bus consists of dozens to hundreds of separate

lines, classified into three functional groups

Address lines

Width of address bus

n lines allow addressing 2n

unique memory locations

Page 2: Notes

Maximum possible memory

capacity

Data lines

Width of data bus

= Amount of data per transfer

= Number of lines (bits) in the data

bus

= Number of bits per memory

location

= 1 Word = Word length

Control lines

Control the access to & use of the data lines

and address lines

Read, write

◦Bus request, bus grant

◦Interrupt request, interrupt

acknowledge (ACK)

◦Clock, reset…

- Main Memory

o word= group of n bits

o n: word length = width of data bus

o different systems have different word length

- Basic Memory Operations

Read

Processor ← Memory

Write

Processor → Memory

Access Memory

Mean read or write

- Word Addressing

‘Native’ memory addressing