nis, 24. march 2006 experiences on new courses: embedded systems and micro-architectures prof. dr...
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Nis, 24. March 2006
Experiences on new courses:Embedded Systems
andMicro-Architectures
Prof. dr Mile Stojčev, Prof. dr Goran Lj. Djordjevic
Faculty of Electronic Engineering, University of Nis
Nis, 24. March 2006
Outline – Micro-ArchitecutresCourse Description and Goals Course ContentsPrerequisites and Course Level TextbooksClass Hours Homeworks ExamsLayout of Seminar workStudent Workload Novelties in Teacher Engagement
Nis, 24. March 2006
Intention:
•This course introduces the students to design of combinational and sequential logic circuits, as well as small to medium digital systems consisting of multiple components such as a controller and datapath at register-transfer level (RTL) of abstraction using a Hardware Description Language (HDL) .
Micro-Architecutres Course Description and Goals
Nis, 24. March 2006
Micro-ArchitecutresCourse Description and GoalsGoals:The objectives of this course are to provide students with a working knowledge required to:
•Develop digital system designs in VHDL at behavioral, register-transfer, and structural levels; and to verify their designs via HDL simulation.•Build the individual components of a digital system, and how to put them together in constructing a digital system.•Create digital circuits using commercial Computer-Aided-Design (CAD) tools
Nis, 24. March 2006
Micro-Architecutres Course Contents
The course is divided in three parts:
•Implemetation styles and design methodologies, •VHDL, •RTL design
Nis, 24. March 2006
Micro-Architecutres Course Contents
Implemetation styles and design methodologies:
•Introduces the design options and implementation techniques available for the design of modern digital systems (standard IC, PLD, ASIC), and explains the important trade-offs between different implementation styles
•Introduces levels of abstraction used to represent digital systems, and explains top-down design methodology emphasising importance of hierarchy in the design of complex digital systems and the role of CAD concepts and tools.
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Micro-Architecutres Course ContentsVHDL:
•Introduces basic VHDL language constructs and concepts needed for behavioral, RTL and structural VHDL modeling for synthesis.
•Presents guidelines for VHDL synthesis of combinational and register components and state machine design (FSM and ASM).
•Provides introduction to pre-synthesis simulation, testbenches, and design verification using VHDL simulator.
Nis, 24. March 2006
Micro-Architecutres Course ContentsRTL Design:
•How to design a digital system from an algorithmic description of a problem in top-down approach.
•Design hierarchy and decomposition. Data path design and sequential design using the ASM charts.
•Top-down design methodology in VHDL.
Nis, 24. March 2006
Micro-Architecutres Prerequisites and Course Level
The requirements for this course include:
•Fundamentals of Electronics, •Digital Logic Circuits
Nis, 24. March 2006
Micro-Architecutres Prerequisites and Course Level
Students should be familiar with:
•Number systems, •Boolean postulates, •Logic minimization, •Combinational logic functions (adders, multiplexers, decoders, comparators, etc.), •Flip-flops, •Sequential logic functions (registers, counters, shift registers, memory, etc. ), •State machines, state diagrams and state tables
Nis, 24. March 2006
Micro-Architecutres Prerequisites and Course Level
Typical Student and Web site.
•A typical student in this course will be a second year undergraduate student in Electrical Engineering.•You may view specific course descriptions in greater details by going to the http://es.elfak.ni.ac.yu/am web site.
Nis, 24. March 2006
Micro-ArchitecutresTextbooksRequired textbook:
Circuit Design with VHDL, by Volenei Pedroni, MIT Press
Additional Recommended Textbooks: 1) VHDL, Programming by Example, by
Douglas Perry; 2) Fundamentals of Digital Logic with VHDL
Design, by Stephen Brown and Zvonko Vranesic, McGraw-Hill;
Nis, 24. March 2006
Micro-Architecutres Homeworks
•There are five homeworks distributed throughout the semester. These homeworks are intended to familiarize students with the material covered in lecture.•These homeworks are designed to strengthen the students’ knowledge of VHDL and prepare them for the final project.•All homeworks must be completed individually
Nis, 24. March 2006
Micro-Architecutres Seminar work - Example
Sequential divider
Design a digital system that implements the traditional long-hand division. Given two unsigned n-bit numbers A and B, design a circuit that produces two n-bit outputs Q and R, where Q i quotient A/B and R i remainder. The procedure is illustrated …
Nis, 24. March 2006
Micro-Architecutres Seminar work - Example
1. Begin with software algorithm2. Perform initial optimizations.
R = 0;for C = 0 to N-1 do (R,A) = (R,A) << 1; if(R ≥ B) then QC = 1; R = R - B; else QC = 0; end if;end for;
R = 0;for C = 0 to N-1 do (R,A) = (R,A) << 1; if(R ≥ B) then Q = (Q << 1)1; R = R - B; else Q = (Q << 1)0; end if;end for;
R = 0;C = N-1;do (R,A) = (R,A) << 1; if(R ≥ B) then Q = (Q << 1)1; R = R - B; else Q = (Q << 1)0; end if;while(C≥0);
Nis, 24. March 2006
Micro-Architecutres Seminar work - Example
3. Convert software algorithm into functional ASM diagram.
4. Optimization (state and register minimization)PASIVNO
rdyB ← bA ← aC ← n-1
start
R <- 0
(R,A) ← (R,A) << 1
C ← C - 1
R ≥ B
Q ← (Q << 1)0Q ← (Q << 1)1
R ← R - B
C ≥ 0
SHRA
INCR
SHQ1 SHQ2
SUBB
PASIVNO
rdyB ← bA ← aC ← n-1
start
R <- 0
(R,A) ← (R,A) << 1
R ≥ B
Q ← (Q << 1)0Q ← (Q << 1)1
R ← R - B
C ← C - 1
C ≥ 0
SHRA
TEST1
SHQ1 SHQ2
SUBB
1 0
0 1
1
0
TEST2
INCR
0 1
1 0
1
0
PASIVNO
rdyB ← bA ← aC ← n-1
start
R <- 0
(R,A) ← (R,A) << 1
C ← C - 1
R ≥ B
Q ← (Q << 1)0Q ← (Q << 1)1
R ← R - B
C > 0
SHRA
INCR
1 0
0 1
1
0
Nis, 24. March 2006
Micro-Architecutres Seminar work - Example 5. Data path design
Nis, 24. March 2006
Micro-Architecutres Seminar work - Example
6. Convert functional ASM into control unit ASM
PASIVNO
rdyB ← bA ← aC ← n-1
start
R <- 0
(R,A) ← (R,A) << 1
C ← C - 1
R ≥ B
Q ← (Q << 1)0Q ← (Q << 1)1
R ← R - B
C > 0
SHRA
INCR
1 0
0 1
1
0
Nis, 24. March 2006
Micro-Architecutres Seminar work - Example
7. Write VHDL code8. Simulation9. Document the design
1 ----- datapath.vhd ----------------------------2 LIBRARY ieee;3 USE ieee.std_logic_1164.all;4 -----------------------------------------------5 ENTITY datapath IS6 PORT (a,b : IN STD_LOGIC_VECTOR(7 DOWNTO
0);7 rsel,lr,er,la,ea,eb,eq,lc,ec,rst,clk : IN
STD_LOGIC;8 cout,z : OUT STD_LOGIC;9 q,r : OUT STD_LOGIC_VECTOR(7 DOWNTO
0));10 END datapath;11 -----------------------------------------------12 ARCHITECTURE structure OF datapath IS13 -----------------------14 COMPONENT shift IS15 GENERIC (N : INTEGER);16 . . .
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Micro-Architecutres Grading
All activities are obligatory
•Homeworks 15 pts.•Final Project 25 pts.•Writing Part 30 pts.•OralPart 30 pts.
Minimal points for each activity should be 50%
Nis, 24. March 2006
Micro-Architecutres Student Workload
•The syllabus for this course presumes 15 weeks to the semester with 170 hours workload:
•The class meets 2 hours per week. •3 hours of laboratory work•3 hours of homework per week•2 hours discussion sections once per week.•Over the first 13 weeks of the semester the total student workload is about 90-120 hours.•Students are also expected to work for about 60 hours to complete a design project and prepare the final examination.
Nis, 24. March 2006
Micro-Architecutres Workload Allocation
15 x 2 = 30 hours – lectures13 x 3 = 39 hours – laboratory work13 x 3 = 39 hours – homeworks
20 hours to complete a design project40 hours to prepare the final examination
Total 168 hours what corresponds to6 ECTS Units (i.e. 28 hours per ECTS Unit)
Nis, 24. March 2006
Micro-ArchitecturesNovelties in Teacher Engagement
•For the theoretical part of the course writing material (translated and adapted) is prepared
•PowerPoint presentations for all lectures is available
•Homeworks and final projects for each student are defined in advance
•Two hours of additional discussion sections per week
•Presentation and writing material of the course are available athttp://es.elfak.ni.ac.yu/am
Nis, 24. March 2006
Outline – Embedded SystemsCourse Description and Goals Prerequisites and Course Level TextbooksClass Hours Homeworks ExamsLayout of Seminar work Student Workload Novelties in Teacher Engagement
Nis, 24. March 2006
Intention:
•This course introduces the students to embedded systems design techniques and methods beginning with introduction of the basic concepts, importance and application areas to complex networked embedded systems design.
Embedded SystemsCourse Description and Goals
Nis, 24. March 2006
Embedded SystemsCourse Description and Goals
Subject:•The course is concerned with advanced aspects of embedded systems as information processing systems that are embedded into a larger product and that are normally not directly visible to the user. •It presents numerous tradeoffs in design and implementation, system interaction, realization, and trends that will affect future systems.
Nis, 24. March 2006
Embedded SystemsCourse Description and Goals
The Main Themes. Topics covered in lectures include: •Specifications of Embedded Systems, •Design Methodologies of Embedded Systems, •Embedded System Hardware, •Embedded Operating Systems and Middleware,•Hardware/Software Co-Design, •IP Reusability, •Validation, and •Applications.
Nis, 24. March 2006
Embedded SystemsCourse Description and Goals
The Goals:•The goal of this course is to teach the basic techniques of HDL model generation of parameterized reconfigurable architectures.
•At the end of the course, the students will have the designed and presented domain specific processors, mixed circuit design solutions, system-on-chip designs, and networked embedded systems with specifications close to state of the art.
Nis, 24. March 2006
Embedded SystemsCourse Description and Goals
Portions of the Goals:
•Portions of this work will be done individually as a homework; the bulk of the work will be done in groups of two to three as a term project.
•Modern commercial CAD tools are used to develop this project.
•The project represents a significant investment at time and is a significant portion of the class grade.
Nis, 24. March 2006
Embedded SystemsPrerequisites and Course Level
The Requirements. The requirements for this course include:
•Fundamentals of Electronics, •Analog Integrated Circuits, •Digital Logic Circuits and Systems, •Micro-Architectures, and •Computer Architecture.
Nis, 24. March 2006
Embedded SystemsPrerequisites and Course Level
Additional Requirements. Students should be familiar with:
•Basics of CMOS Device, •Microprocessor Systems and Programming in C and Assembly, •VHDL or Verilog Hardware Design Language, and •System Level Design Language SystemC
Nis, 24. March 2006
Embedded SystemsPrerequisites and Course Level
Typical Student and Web site.
•A typical student in this course will be a fourth year Electrical Engineering or
•final year of undergraduate student in Computer Engineering.
•You may view specific course descriptions in greater details by going to the http://es.elfak.ni.ac.yu web site.
Nis, 24. March 2006
Embedded SystemsTextbooksRequired textbook:
Embedded System Design, by Peter Marwedel, Kluwer Academic Publishers
Additional Recommended Textbooks: 1) Embedded Systems Handbook, ed. By
Richard Zurawski, CRC Press; 2) 2) Embedded Systems, by Rashid Gupta,
John Wiley and Sons; 3) 3) System Design with SystemC, by
Thorsten Grotker, et al, Kluwer Academic Publishers
Nis, 24. March 2006
Embedded SystemsHomeworks
•There are five homeworks distributed throughout the semester. These homeworks are intended to familiarize students with the material covered both in lecture and selected readings.•Three VHDL/Verilog projects are also distributed through the first half of the semester. These projects are designed to strengthen the students’ knowledge of VHDL/Verilog and prepare them for the final project.•All homeworks and projects, with the exception of the final project, must be completed individually
Nis, 24. March 2006
Embedded SystemsSeminar work - Example
http://es.elfak.ni.ac.yu/publications.html
Nis, 24. March 2006
Embedded SystemsGrading
All activities are obligatory
•Homeworks 15 pts.•Small Projects 15 pts.•Final Project 20 pts.•Writing Part 25 pts.•OralPart 25 pts.
Minimal points for each activity should be 50%
Nis, 24. March 2006
Embedded SystemsStudent Workload
•The syllabus for this course presumes 15 weeks to the semester with 210 hours workload:
•The class meets 3 hours per week. •3 hours of laboratory work•5 hours of homework/small project per week•2 hours discussion sections once per week.•Over the first 13 weeks of the semester the total student workload is about 130-150 hours.•Students are also expected to work for about 60 hours to complete a design project and prepare the final examination.
Nis, 24. March 2006
Embedded SystemsWorkload Allocation
15 x 3 = 45 hours – lectures13 x 3 = 40 hours – laboratory work13 x 4 = 52 hours – homeworks and small projects
30 hours to complete a design project40 hours to prepare the final examination
Total 207 (i.e. 210) hours what corresponds to7 ECTS Units (i.e. 30 hours per ECTS Unit)
Nis, 24. March 2006
Embedded SystemsNovelties in Teacher Engagement
•For the theoretical part of the course writing material (translated and adapted) is prepared
•PowerPoint presentations for all lectures is available
•Homeworks, small projects, and final projects for each student are defined in advance
•Two hours of additional discussion sections per week
•Presentation of the course is available athttp://es.elfak.ni.ac.yu
Nis, 24. March 2006
Conclusions
Two new courses “Embedded Systems”, and “Micro-architecture” are involved at the directions of Electronics and Computer Engineering.
Both courses are obligatory courses for direction Electronics (IV and VII semesters)
Embedded Systems is elective for Computer Engineering (IX semester)
Average number of students per group is 15
Nis, 24. March 2006
Conclusions
Our impression is that a pronounced interest for doing projects exist.
In average each student spent 30 hours to complete the project
By our opinion the quality of the project is satisfactory
After finishing the project students are able to cope with some complex problems