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1/29/2007 Supercomputing 99 1

Networking

1/29/2007 Supercomputing 99, Processors 2

Conference facilities

• State of the art show floor network:– multiple OC-192 (10GBit/s) rings– Dense Wave Division Multiplex (DWDM)

• External network at OC48 (2.5 Gbit/s)• In house Gigabit Ethernet• Demo of 10-G Ethernet (formerly Xnet)

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ASCI Networking plans


Internet development forecast

• Talk of Vinton Cerf (excerpts)

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Internet Hosts (000s) 1989-2006

0

100000

200000

300000

400000

500000

600000

700000

800000

900000

1000000

1989

1991

1993

1995

1997

1999

2001

2003

2005

hosts

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Observations

• 75% of traffic on Internet is WWW• Data Domination (20% voice, 80% data)• Traffic growth 100-1000%/year reported• 300 M - 1000 M users by Dec 2000

• Internet MUCH faster growing than CPU power


Internet-enabled Devices• Information appliances

– 1997 - 3 M, 1998 - 6 M, 2002 - 56 M (IDC)• WebTV, Palm-Pilot, Nokia 9000,Sony,

Nintendo, Sega games• Refrigerator (and the bathroom scales)• Automobiles, household appliances (turning

a box of soap into a service) • Web-server on a chip (see next slide)

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UMASS Web server on a chipborn 10 AM, 14 July 1999

• TCP/IP code itself fits in about 256 bytes (12-bit)

• PIC 12C509A, running at 4MHz

• 24LC256 i2c EEPROM • HTTP 1.0 and RFC 1122

compliant

• eternity.cs.umass.edu:9080/index0.html

Our 25 year mission: to go whereno network has gone before!

Space: the final frontier

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•End-to-end information flow across the solar system

•Layered architecture for evolvability and interoperability

•IP-like protocol suite tailored to operate over long round trip light times

•Integrated communications and navigation services


Interplanetary Internet Status

• Part of the Mars Mission Plan• Possible Earth/Moon mission 2001• Low Mars Orbit and Areosynchronous

satellites by 2008• Mars Outposts by 2010• Possible Orbiting manned mission 2018• Possible Manned Mars station 2030??• Stable Interplanetary backbone 2040?

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Grid Computing / Batch


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Grid computing

• geographically distributed computing• similar to Metacomputing in Europe• several toolkits to enable GRID computing

– (compare with UNICORE in Europe)• GLOBUS• LEGION• others


GLOBUS projectshttp://www.globus.org

• GUSTO – Testbed (as shown on SC 98)

• CACTUS – parallel finite difference simulation codes

• CMT– Microtomography

• Flash– Seamless access to remote computing

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LEGION

• Worldwide virtual computer• Middleware that connects computer resources• http://legion.virginia.edu• Used e.g. at DoD, NASA, NPACI

– (NPACI: National Partnership for Advanced Computational Infrastructure)


Legion status monitor (Java)

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Batch systems

• PBS (Portable Batch system)– developed at NASA/Ames– mature public domain batch system focused on parallel

computing (sophisticated job scheduling)– no AFS support

• LSF (Platform Computing)– the market leader in US

• Codine (Gridware, formerly Genias, Chord)


Batch system genealogy

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Linux Clusters


Linux and SGI

• Demo of an Itanium cluster running Linux• Statement to release software in the public domain• Committed to Linux• SGI Linux high performance Clusters

– Beowulf style– Advanced Cluster Environment– new product line SGI 1400 (PIII, Redhat 6)

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Linux and IBM

• Committed to Linux as well• Hardware cluster activities (see e.g. next slide)

– web servers (Netfinity servers)

• Involvement in Software– mainly focused on desktop and web(Lotus Domino, Websphere, DB2, ViaVoice)


Large Clusters

• Chiba City– built by ANL, IBM and VALinux– 256 Dual Pentium beowulf system

• Product “Cluster City” from VA Linux– comes with VACM management software(GPL)– allows complete remote access to all resources

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Other topics


Top 500 Supercomputers

• 1. Sandia National Labs (ASCI Red) 9632 Intel Proc. 2.3TFlops• 2. Lawrence Livermore (ASCI Blue) 5808 IBM 604e 2.1TFlops• 3. Los Alamos (ASCI Blue Mntn) 48 Origin2000/128 1.6TFlops• 5. Uni Tokio Hitachi SR8000 128 Proc 873GFlops• 9. Deutscher Wetterdienst Offenbach 812Proc T3E 671GFlops• 20. FZ Juelich 540 Processor T3E1200 448GFlops• 500. USA(Banking) Sun HPC 10000 48 Proc. 33GFlops

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Supercomputer Trends

• Strong influence of ASCI• US:Europe:Japan ~ 4:2:1• Doubled speed every 1.2 years (other: 1.6 years)• Increasing number of commercial installations• Increasing role of cluster solutions• Constant number of vector computers


Zero administration terminal

• Login facility at conference provided by Sun• Equipped with Sunray 1

– Terminal is basically a remote framebuffer – Virtual framebuffer on server is sent to terminal– operated on separate Ethernet– smartcard with “hot desking”, “plug and work”

• Cost ~1000DM + Monitor + 1/25 SunServer• Problem: Security and maintenance on server

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Keynote Address

State of the Field Talks

Invited Talks

Technical Papers

Tutorials

Awards

Panels

Birds-of-a-Feather (BOFS)

Education Program

Research Exhibits

Industry Exhibits Exhibitor Forum

HPC Games

Posters

SCinet99

Webcasts

Compilers Grid ComputingHigh-Performance Networking Industrial and Commercial Applications I/O Low-Level Architecture MPI Non-Numerical Algorithms Numerical Algorithms Ocean and Climate Performance Profiling Scheduling Scientific Applications Special Purpose SystemsVisualization Wide Area ApplicationsFernbach Award and Gordon Bell Finalists


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Processor Architectures


Alpha Roadmap

1997 1998 19991995 1996 2000 2001

EV5/333 EV5/333 2116421164

EV6/575 EV6/575 2126421264

EV68/1000 EV68/1000 2126421264

PCA56/533 PCA56/533 21164PC21164PC

EV56/600EV56/6002116421164

0.5μm

0.35μm

0.35μm

0.35μm

EV67/750 EV67/750 2126421264

0.28μm

PCA57/600 PCA57/600 21164PC21164PC

0.28μm

0.18μm

0.18μm

Higher Performance

Low

er C

o st

...

EV8EV80.13μm

EV7/1000 EV7/1000 2136421364

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Int RegMap

Branch Predictors

21364 Core

FETCH MAP QUEUE REG EXEC DCACHEStage: 0 1 2 3 4 5 6

L2 cache1.5MB6-Set

IntIssue

Queue(20)

Exec

4 Instructions / cycle

RegFile(80)

Victim Buffer

L1 DataCache64KB2-Set

FPRegMap

FP ADDDiv/Sqrt

FP MUL

Addr

80 in-flight instructionsplus 32 loads and 32 stores Addr

Miss Address

Next-LineAddress

L1 Ins.Cache64KB2-Set

Exec

Exec

ExecRegFile(80)

FP Issue

Queue(15)

RegFile(72)

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Integrated Memory Controller

• Direct RAMbus– High data capacity per pin– 800 MHz operation– 30ns CAS latency pin to pin

• 6 GB/sec read or write bandwidth• 100s of open pages• Directory based cache coherence• ECC SECDED

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Integrated Network Interface• Direct processor-to-processor

interconnect• 10 GB/second per processor• 15ns processor-to-processor latency• Out-of-order network with adaptive

routing• Asynchronous clocking between

processors• 3 GB/second I/O interface per processor

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21364 System Block Diagram

364M

IO364

M

IO364

M

IO364

M

IO

364M

IO364

M

IO364

M

IO364

M

IO

364M

IO364

M

IO364

M

IO364

M

IO

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IBM Power4


IBM Power4

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IBM Power4


Intel Itanium (IA64)

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Intel Itanium


Special Purpose Systems

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1/29/2007 Supercomputing 99, SPECIAL PURPOSE SYSTEMS

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Processing-in-memory (PIM) chips that integrate processor logic into memory devices offer a new opportunityfor bridging the growing gap between processor and memory speeds, especially for applications with high

memory-bandwidth requirements.

Mary Hall, Peter Kogge*, Jeff Koller, Pedro Diniz, Jacqueline Chame, Jeff Draper, JeffLaCoss,John Granacki, Jay Brockman*, Apoorv Srivastava, William Athas, Vincent Freeh*,Jaewook Shin, Joonseok ParkUSC Information Sciences Institute * University of Notre DameMarina del Rey, CA 90292 Notre Dame, IN 46556

Data-IntensiVe Architecture DIVA


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Koji Hashimoto et al.Kyushu University, Fuji Xerox Co.,Ltd, Pharmaceutical Co.,Ltd,Hokkaido University of Education, Shimane University,National Institute for Advanced Interdisciplinary Research

MOE MolecularOrbital calculationEngine

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$7.0/Mflops Astrophysical N -Body Simulationwith Treecode on GRAPE-5Atsushi Kawai, Toshiyuki Fukushige and Junichiro MakinoUniversity of Tokyo

GRAvity PipE GRAPE GORDON BELL PRIZE winner


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GRAvity PipE GRAPE GORDON BELL PRIZE winner

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High-speed Interconnect

1/29/2007 Supercomputing 99, High speed interconnect

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GSN Physical Layer(HIPPI-6400-PH)

– 6400 Mbits (800 Mbytes)/sec bandwidth– Independent full speed, half duplex channels– 4 Virtual Circuits (multiplexing facility)– Small (32 byte) fixed size micropacket– Credit-based flow control– End-to-end & Link-to-link checksums– Automatic retransmit to correct flawed data– Support for legacy HIPPI-800 traffic

Gigabyte System Network GSN

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1/29/2007 Supercomputing 99, High speed interconnect

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Silicon Graphics SUMAC TM

ASIC– 32.5 x 32.5 mm 624

pin ceramic CGA– AC GSN port– IC 2 x 64 bit 100 MHz

host interface– 1.25 million cells– 17 watts– Available now

GSNAC

SRC DSTIC

GSN SUMAC Chip

1/29/2007 Supercomputing 99, High-speed interconnect

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Infiniband: Future I/O + Next Generation I/O (NGIO)

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Infiniband


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Myrinet

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Myrinet


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Myrinet

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Myrinet


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Myrinet

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ATOLL


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ATOLL

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ATOLL


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