nb3000al top level a2 - applelogictft_tsc vga eth dbsd dbusb pwm spdif dac adc rs485 midi db_jtag...
TRANSCRIPT
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
1
Altium Limited.Level 3, 12a Rodborough RdFrenchs Forest 2086NSWAUSTRALIA80
NB3000AL Top Level
1 *
9/22/2011 10:42:09 PMC:\Designs\SRKH\NB3000AL\NB3000AL_Top.SchDoc
Title
Size: Number:
Date:File:
Revision:
Sheet ofTime:
A2
PSUPSU.SchDoc
SRAM
U_SRAM1SRAM_256Kx16_TSOP44.SchDoc
STATUS_LED
StatusLEDSDB_LEDS_0603.SchDoc
SRAM1
SRAM2
MEM_COMMON
DAU_RESET_SW
BUZZER
ONE_WIRE_DB_PB
SW
DIP
USERIO
EXT_A
RS232
KEYBOARD
MOUSE
TFT_IO
DB_PROGRAM
STATUS_LED
USER_LEDS
RELAY
I2C
CODEC
TFT_TSC
VGA
ETH
DBSD
DBUSB
PWM
SPDIF
DAC
ADC
RS485
MIDI
DB_JTAG
DB_CLOCKS
DB_SPI
24MHZ
ISP176X
PROTOTYPE
SPAREIO
FPGA_USERFPGA.SCHDOC
INT EXT
VIDEO_OUTVGA_OUT.SCHDOC
CON
CON_VGACON_VGA_DB15.SCHDOC
HOST_JTAG
LED1
LED2
1WID
DB_PROGRAM
CLK_PLL
FLASH_BOOT
HOSTUSB
SRAM
RTC
SD
HOST_AUDIO
DB_JTAG
DB_CLOCKS
FLASH_USER
DB_SPI
PB_A
EXTSPI
FLASH_GOLDEN
24MHZ
DIAGCOMMS
FPGA_HOSTHOST_FPGA.SchDoc
HOST_JTAG
HOST_JTAGHOST_JTAG.SchDoc
INT EXT
RS232RS232_HIN232.SchDoc
EXTINT
KEYBOARDPC_PS2.SchDoc
RS232#
KBD#
MSE#
RS232
KEYBOARD
EXTINT
MOUSEPC_PS2.SchDoc
DIPSW
DB_RESET
CON
CON_DBUSBCON_MINI_USBB_RA_KME04-USBMU03A01-1.SchDoc
DBUSB DBUSB#
CON
CON_DBSDCON_SD_KSDC012551.SchDoc
DBSD
EXTINT
DBUSB_TXRXUSB_CY7C68001-56LFC.SchDoc
INT EXT
ETHEthernet_RTL8201CL.SchDoc
ETH
CLK_PLL
CLK_PLLCLK_ICS307-02_PLL.SchDoc
1WID
NB_ID1WB_DS2502_ID.SchDoc
CON
CON_USBCON_MINI_USBB_RA_KME04-USBMU03A01-1.SchDoc
EXTTFT_TSC
TFT_IO
LCDTFTTSC_XPT2046.SchDoc
TFT_TSCTFT#
TFT_IO
CON
CON_MOUSECON_PS2PORT_MINIDIN6F_BLACK.SchDoc
INT CON
PDA_SWITCHESSW_PB_SPNOx5_SMD.SCHDOC
INT
TEST_RESETSW_RESET_SPNO.SCHDOC
CON
USERPOWER
CON_IOCON_USER_20WBOXHDRRAMx2.SCHDOC
UIO
BUZZER CODEC_AUD
AUDIO
SPK_L
SPK_R
HOST_AUDIO
AIN
AOUT_PBA
AUDIO_AMPAUDIO_AMP_NB2C.SchDoc
PB_AIN
AUDIO
SPK_L
USER_LEDS CON
USER_LEDLED_RGB_SMDx8.SCHDOC
USER_LEDS
VGA#VGA
SW
SRAM
U_SRAM2SRAM_256Kx16_TSOP44.SchDoc
RELAYS CON
RELAYRELAY_X4_IMO3GR.SchDoc
RELAY
PWM CON
PWMPWRCTRL_RELAY_PWM_28V2A_X4.SchDoc
PWM
1V21V82V53V35V0
PBPOWER
1V21V82V53V35V0
I2C
DIGITALCODEC_AUD
AIN
U_Audio_CodecAudio_Codec.SchDoc
CODEC
SPK_L
SPK_R
SpeakersCON_EXT_SPK.SchDoc
SPK_R
PB_AOUT
PBIO
LED1
LED2
LED1_EXT
LED2_EXT
LED_HOSTLED_RGB_SMDx2.SCHDOC
SPDIF
CON_SPDIFCON_SPDIF_INOUT_A.SchDoc
SPDIF
SPI CON
DACDAC_DAC084S085_SPI.SchDoc
SPI CON
ADCADC_ADC084S021_SPI.SchDoc
DAC
ADC
CON
CON_ETHCON_ETHERNET_RJ45_LEDS.SchDoc
ETH#
CON
CON_LCDTFTCON_FFC40_LCDTFT.SCHDOC
CON
CON_RELAYCON_RELAYx4_KMRJIO3_5MM_12WAY.SchDoc
CON
CON_RS232CON_RS232DCE_DB9_TH.SchDoc
BOOT_FLASH
MOUNTSMounts.SchDoc
INT EXT
RS485RS485_ISL8491.SchDoc
CON_PSUPWJACK+SWITCH.SchDoc
HOST_USBHOSTUSB#EXT INT
DBUSB_TXRXUSB_CY7C68001-56LFC.SchDoc
VBATT
CON_BATTCON_BATT_COIN.SchDoc
VBATTVBATT RTC
RT CLOCKCLK_PCF2123_RTC.SchDoc
HOST_RTC
USERPOWER
USER_POWERUSERPWR.SCHDOC
CON
CON_DBSDCON_SD_KSDC012551.SchDoc
RS485#CON
CON_RS485CON_RS485_RJ45.SchDoc
INT EXT
MIDI INTERFACEMIDI_FULL.SCHDOC
CON
CON_MIDICON_MIDI_DIN5.SCHDOC
MIDI#MIDI
RS485
HOST_AUDIO
PBCTRL
DB_PROGRAM
HOST_JTAG
HOST_ID
HOST_CLK
HOST_SRAM
HOST_LED1
HOST_LED2
HOST_SD
DB_SRAM1
DB_SRAM2
DB_MEM
DB_STATUS
ADC#
RELAYS#
PWM#
DAC#
UIO_PWR
DB_JTAG
DB_CLOCKS
PB_SPI
USER_FLASH
DB_SPI
EXT
ONE_WIRE_DB_PB
AIN
I2C
SPI
AOUT
CTRL
PBPOWER
PBANB2_PBCON.schdoc
USER_LEDS
SW_PDA
SPARE_IO
CON_LEDKBDCON_NB3000_LEDKB.SCHDOC
SERFLASH
SYSBOOTFLASH_M25PX0_SPI_8Mbit.SchDoc
GOLD_FLASHSERFLASH
GOLDENFLASH_M25PX0_SPI_8Mbit.SchDoc
FLASH
USER_FLASHFLASHSPI_M25PX0.SchDoc
INT
SW_DIP8_SMTSW_DIP8_SMT.SchDoc
CON
CON_KEYBOARDCON_PS2PORT_MINIDIN6F_BLACK.SchDoc
CON
CON_USB1CON_USBA_RA_UPRIGHT.SchDoc
LEDS#
ATE DIAGCOMMS
ATE INTERFACECON_NB3000_ATE_INTF.SchDoc
ISP176X
PORT1
PORT2
PORT3
USB_USERHOSTUSB_ISP1760.SchDoc
ATE
VGA#
SPDIF
UIO
ADC#
DAC#
AUDIO
HOST_JTAG
PWM
RS232#
RS485#
KBD#
MSE#
MIDI#
HOST_ID
ATEINTERFACE
VGA#
SPDIF
UIO
ADC#
DAC#
AUDIO
HOST_JTAG
PWM#
RS232#
RS485#
KBD#
MSE#
MOUSE
ISP176X
PORT1
PORT2
PORT3
PROTOTYPE
USER_PROTOTYPE_AREAPROTOTYPE_A.SchDoc
PROTOTYPE
CON
CON_AUDIOCON_AUDIO_AC99_NOMIC.SCHDOC
DIAGCOMMS
MIDI#
HOST_ID
24MHZ
SW#
SPAREIO
MEM
U_Memory_CommonBus_DaughterBoardNB2_CommonMemory_128Mb_Flash.SchDoc
CON
CON_ADCCON_ADCx4_KMRJIO3_5MM_6WAY.SchDoc
CON
CON_DACCON_DACx4_KMRJIO3_5MM_6WAY.SchDoc
CON
CON_PWMCON_PWMx4_KMRJIO3_5MM_6WAY.SchDoc
CON
CON_USB2CON_USBA_RA_UPRIGHT.SchDoc
CON
CON_USB3CON_USBA_RA_UPRIGHT.SchDoc
SRAM
U_SRAM_HOSTSRAM_256Kx16_TSOP44.SchDoc
1
1
2
2
3
3
4
4
D D
C C
B B
A A
2 77
NB3000AL - ALTERA
02
9/22/2011 10:42:09 PMLED_RGB_SMDx2.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Visual Indicators
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R1150R 1%
R2150R 1%
R3150R 1%
5V0
R4150R 1%
R5150R 1%
R6150R 1%
GND7
VCC14
Y12
A13
U1F74VHC04
1 2
U1A74VHC04
A3
Y4
U1B74VHC04
A5
Y6
U1C74VHC04
Y8
A9
U1D74VHC04
Y10
A11
U1E74VHC04
5V0
GND
GREEN
RED
BLUE
RGB_LED
GREEN
RED
BLUE
RGB_LED
1
3 2
4
R
B
G
LED1S1206RGBSDJC
1
3 2
4
R
B
G
LED2S1206RGBSDJC
LED1
LED1_GREEN
LED1_BLUE
LED1_RED
LED2_GREEN
LED2_BLUE
LED2_RED
C11uF 10V
LED2
GREEN
RED
BLUE
RGB_LED
LED1_EXT
LED2_EXT
LED1_RED_EXT
LED2_GREEN_EXT
LED1_BLUE_EXT
LED1_GREEN_EXT
LED2_BLUE_EXT
LED2_RED_EXT
LED1_RED_EXT
LED1_GREEN_EXT
LED1_BLUE_EXT
LED2_GREEN_EXT
LED2_BLUE_EXT
LED2_RED_EXT
GREEN
RED
BLUE
RGB_LED
5V0
24mA
24mA
1
1
2
2
3
3
4
4
D D
C C
B B
A A
5 100
NB3000AL - ALTERA
02
9/22/2011 10:42:10 PMAUDIO_CODEC_CS4270.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Audio CODEC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
AUGNDAUGND
SDIN1
LRCK2
MCLK3
SCLK4
VD5
DGND6
SDOUT7
VLC8
SDA/CDOUT9
SCL/CCLK10
AD0/CS11
AD1/CDIN12
AD213
RST14
AINA15
AINB16
VQ17
FILT+18
VA19
AGND20
MUTEA21
AOUTA22
AOUTB23
MUTEB24
U1
CS4270
3V3
GND
C210uF 10V
C110uF 10V
C3100nF 16V
C4100nF 16V
GNDC5
10uF 10V
C6
100nF 16V
C7
10uF 10V
C8
100nF 16V
R3 33R 1%R5 33R 1%
R1 33R 1%
R4 33R 1%R6 10K 1%
R2 33R 1%
R7
4K7 1%
R104K7 1%
C9
10uF 10VC10
220pF 50V 1005 COG
R124K7 1%
C13
10uF 10VC14
220pF 50V 1005 COG
AUGND
R114K7 1%
AUGND
AUGND
C1110nF 16V
C1210nF 16V
R8 430R 1%R9 430R 1%
AUGND
AUGND
SDOUTSDIN
SCLKLRCKMCLK
M/S
LineIn_LLineIn_R
AOUTAAOUTB
APWR
SCL_CCLK
AD1
SDA_CDOUT
AD0
AD2
/RST
MUTEA
MUTEB
AUDIO_CODEC
AUDIO_CODEC
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
9
02
9/22/2011 10:42:10 PMFPGA_NonIO.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A3
Sheet Title User FPGA Pwr and Programming
Assy:
78
NB3000AL - ALTERA
TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
TMS
CONF_DONEDCLK
TCK
TDI
nCONFIG
TDO
1V2
GND
3V3
GND
nSTATUS
VCCA_PLL2
VCCA_PLL3
VCCA_PLL4
VCCA_PLL11V2
GND
iFPGACONFiFPGACONFiFPGACONFiFPGACONF
iFPGACONFiFPGACONFiFPGACONFiFPGACONF
GND
nSTATUSM6
DCLKP3
nCONFIGP4
TDIP7
TCKP5
TMSP8
TDOP6
nCER8
CONF_DONEP24
MSEL0N22
MSEL1P23
MSEL2M22
MSEL3P22
U8JEP3C40F780C8N
VCCINTK9
VCCINTK11
VCCINTL16
VCCINTK17
VCCINTK19
VCCINTL10
VCCINTL12
VCCINTL14
VCCINTL18
VCCINTN20
VCCINTM11
VCCINTM13
VCCINTM15
VCCINTM17
VCCINTM19
VCCINTN10
VCCINTN12
VCCINTN14
VCCINTN16
VCCINTN18
VCCINTP9
VCCINTP11
VCCINTP13
VCCINTP15
VCCINTP17
VCCINTP19
VCCINTR10
VCCINTR12
VCCINTR14
VCCINTR16
VCCINTR18
VCCINTR20
VCCINTT11
VCCINTT13
VCCINTT15
VCCINTT17
VCCINTT19
VCCINTU10
VCCINTU12
VCCINTU14
VCCINTU16
VCCINTU18
VCCINTV11
VCCINTV15
VCCINTV17
VCCINTV19
VCCINTV13
VCCINTW12
VCCINTW14
VCCINTW18
VCCIO1B1
VCCIO1H1
VCCIO1K5
VCCIO1K8
VCCIO1N1
VCCIO1N5
VCCIO2AA1
VCCIO2AG1
VCCIO2T1
VCCIO2T5
VCCIO2W7
VCCIO2W5
VCCIO3AA11
VCCIO3AD6
VCCIO3AD9
VCCIO3AD13
VCCIO3AH2
VCCIO3AH5
VCCIO3AH9
VCCIO3AH13
VCCIO3AB10
VCCIO4AA18
VCCIO4AD16
VCCIO4AD20
VCCIO4AD23
VCCIO4AH16
VCCIO4AH20
VCCIO4AH24
VCCIO4AH27
VCCIO4Y16
VCCIO5AA28
VCCIO5AG28
VCCIO5T24
VCCIO5T28
VCCIO5U21
VCCIO5W24
VCCIO6B28
VCCIO6H28
VCCIO6K24
VCCIO6L21
VCCIO6N24
VCCIO6N28
VCCIO7A16
VCCIO7A20
VCCIO7A24
VCCIO7A27
VCCIO7E16
VCCIO7E20
VCCIO7E23
VCCIO7H18
VCCIO7J15
VCCIO8A2
VCCIO8A5
VCCIO8A9
VCCIO8A13
VCCIO8E6
VCCIO8E9
VCCIO8E13
VCCIO8H11
VCCIO8J13
U8KEP3C40F780C8N
GNDK10
GNDK12
GNDK14
GNDK18
GNDK20
GNDL11
GNDL15
GNDL17
GNDL19
GNDL9
GNDM10
GNDM12
GNDM14
GNDM16
GNDM18
GNDN11
GNDN13
GNDN15
GNDN17
GNDN19
GNDP10
GNDP12
GNDP14
GNDP16
GNDP18
GNDP20
GNDR11
GNDR13
GNDR15
GNDR17
GNDR19
GNDR9
GNDT10
GNDT12
GNDT14
GNDT16
GNDT18
GNDU11
GNDU13
GNDU15
GNDU17
GNDU19
GNDV10
GNDV12
GNDV14
GNDV18
GNDW11
GNDW15
GNDW17
GNDW19
GNDAA2
GNDAA27
GNDAC6
GNDAC9
GNDAC13
GNDAC16
GNDAC20
GNDAC23
GNDAF1
GNDAF28
GNDAG2
GNDAG5
GNDAG9
GNDAG13
GNDAG16
GNDAG20
GNDAG24
GNDAG27
GNDB2
GNDB5
GNDB9
GNDB13
GNDB16
GNDB20
GNDB24
GNDB27
GNDC1
GNDC28
GNDF6
GNDF9
GNDF13
GNDF16
GNDF20
GNDF23
GNDH2
GNDH27
GNDJ11
GNDJ18
GNDK6
GNDK16
GNDK23
GNDL13
GNDM20
GNDN2
GNDN6
GNDN9
GNDN23
GNDN27
GNDT2
GNDT6
GNDT20
GNDT23
GNDT27
GNDU9
GNDV16
GNDW6
GNDW13
GNDW23
GNDY11
GNDY18
U8LEP3C40F780C8N
VCCD_PLL3J9
GNDA3H9
VCCA3J8
VCCA1Y8
GNDA1AA9
VCCD_PLL1Y9
VCCD_PLL4Y20
GNDA4AA20
VCCA4Y21
VCCA2J21
GNDA2H20
VCCD_PLL2J20
U8MEP3C40F780C8N
GNDGNDGNDGND
GND
PLL VCC Decoupling2V5
VCCA_PLL2
VCCA_PLL3
VCCA_PLL4
VCCA_PLL1
2V5
2V5
2V5
GND
GND
GND
i PLL
i PLL
i PLL
i PLL
L41K at 100MHz 300mA
L51K at 100MHz 300mA
L61K at 100MHz 300mA
L71K at 100MHz 300mA
C3432.2uF 6.3V
C3472.2uF 6.3V
C3512.2uF 6.3V
C3552.2uF 6.3V
C3440.1uF 16V
C3480.1uF 16V
C3520.1uF 16V
C3560.1uF 16V
C34910nF 16V
C35310nF 16V
C35710nF 16V
C34510nF 16V
C3461nF 50V
C3501nF 50V
C3541nF 50V
C3581nF 50V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
11 78
NB3000AL - ALTERA
02
9/22/2011 10:42:10 PMLED_RGB_SMDx8.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Visual Indicators Top
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
LED1
LED2
LED1_EXT
LED2_EXT
U_LED_01LED_RGB_SMDx2
LED1
LED2
LED1_EXT
LED2_EXT
U_LED_23LED_RGB_SMDx2
LED1
LED2
LED1_EXT
LED2_EXT
U_LED_45LED_RGB_SMDx2
LED1
LED2
LED1_EXT
LED2_EXT
U_LED_67LED_RGB_SMDx2
USER_LEDS
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
USER_LEDS
CON
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
USER_LEDS
1
1
2
2
3
3
4
4
D D
C C
B B
A A
20 78
NB3000AL - ALTERA
02
9/22/2011 10:42:10 PMMounts.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title NB3000AL Holes and Graphics
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
Peripheral BoardStandoffs For Fiducial Alignment
Components
PCB Identifiers
Altium Logo BOT1Altium(2009)
FD1Fiducial - Round
FD2Fiducial - Round
FD3Fiducial - Round
LOGO1Nanoboard Logo
PB_MH38.5mm spacer, Gold, 2xM3
PB_MH28.5mm spacer, Gold, 2xM3
PB_MH18.5mm spacer, Gold, 2xM3
PB_MH48.5mm spacer, Gold, 2xM3
PB_MH58.5mm spacer, Gold, 2xM3
Printed Circuit Board (Bare)
PCB1NB3000AL Blank PCB
1
1
2
2
3
3
4
4
D D
C C
B B
A A
21 78
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMPWJACK+SWITCH.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Power Jack & Switch
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
1
23
J1POWERJACK 3 HEADER
23
1
S1
S2
SW1SPDT SUB
5V0+B +B
GND
D105V 5W
GND
+B
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
22
02
9/22/2011 10:42:11 PMEthernet_RTL8201CL.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A3
Sheet Title Ethernet Interface
Assy:
78
NB3000AL - ALTERA
TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND10
VCC20
Y43
Y35
Y27
Y19
A111
A213
A315
A417
OE19
U2B
SN74LVC244ADB
MDC25
MDIO26
TXD06
TXD15
TXD24
TXD33
TXEN2
TXC7
RXDV22
RXD021
RXD120
RXD219
RXD318
RXC16
COL1
CRS23
RXER24
X146
X247
LED0/AD09
LED1/AD110
LED2/PHYAD212
LED3/PHYAD313
LED4/PHYAD415
PWFBIN8
DVDD3314
DVDD3348
DGND11
DGND17
DGND45
PWFBOUT32
AVDD3336
AGND29
AGND35
NC27
TPRX-30
TPRX+31
TPTX-33
TPTX+34
RTSET28
ISOLATE43
RPTR40
SPEED39
DUPLEX38
ANE37
LDPS41
MII/SNIB44
RESETB42
U1RTL8201CL
C622pF 50V
C722pF 50V
GNDGND
GNDGNDGND
GNDGND
E_MDCE_MDIO
E_TXD0E_TXD1E_TXD2E_TXD3E_TXENE_TXCE_RXDV
E_RXD0E_RXD1E_RXD2E_RXD3E_RXC
E_COL
CRS_URXER_U
GNDGND3V33V33V33V33V3
3V33V3
3V3A
PWFBIN
RESETB_E
S_LED1S_LED2S_LED3S_LED4
S_LED0
R161K 1%
GND
R24
4K7 1%
R17 4K7 1%
R21
4K7 1%
R25
4K7 1%
R20
4K7 1%
R18
470R 1%
R23
470R 1%
R27
470R 1%
R22
470R 1%
R26
470R 1%
S_LED0
S_LED1S_LED2
S_LED3S_LED4
GNDGND
3V3
L122uH 250mA 0.71R
C120.1uF 25V
C140.1uF 25V
C110.1uF 25V
C30.1uF 25V
C20.1uF 25V
C130.1uF 25V
GND
3V3A
GND
PWFBIN
R11
4K
7 1
%
R1
2
4K
7 1
%
R10 4K7 1%3V3
LINK
FULL DUPLEX10M
100MCOLLISION
GNDGND
E_TXD[3..0]
E_RXD[3..0]
R7
R6
R5
R4
R3
R2
7 * 4k7 GND
R1
R19
4K7 1%
3V3
C110uF 20V
C10
10uF 20V
S_
LE
D[4
..0
]
L2
22uH 250mA 0.71R
RESETB_E
R131K 1%
OE1
A12
A24
A36
A48
Y412
Y314
Y216
Y118
U2A
SN74LVC244ADB
GND
3V3
GND
3V3
E_CRSE_RXER
C150.1uF 25V
3V3
GND
E_MDCE_MDIO
E_TXD[3..0]
E_TXCE_TXEN
E_RXDVE_RXD[3..0]
E_RESETB_E
E_RXCE_COL
E_CRSE_RXER
Ethernet
INT
i
Ethernet Interface
LED2
LED, 0603, Yellow (1608)
LED3
0603 LED
LED4
LED, Green, 0603 (1608)
X1
X2
X1X2
GNDGND
TX_P
TX_N
RX_P
RX_N
RX_CT
TX_CT
LINK_K
ACT_A
ETHERNET_CON
EXT
C90.1uF 25V
C40.1uF 25V
R949R9 1%
R849R9 1%
R1449R9 1%
R1549R9 1%
GND
GND
C80.1uF 25V
C50.1uF 25V
GND
ACT
ACT
LKLK
1
3
2 4
GND
Y125MHz
PWFBOUT
PWFBOUT
PWFBOUT
LED3
LED, Green, 0603 (1608)
A1
K2
LED6
LED, 0603, Orange (1608)
Added buffer to ensure config pulldown Rs are effective during power up
1
1
2
2
3
3
4
4
D D
C C
B B
A A
23 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMCLK_PCF2123_RTC.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title SPI Real Time Clock
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R14K7 1%
C30.1uF 16V
C210uF 20V
3V3
GND
TP132K768HZ
CS_N
DINDOUT
INT_N
SCLK
CLKOUTCLKOE
RTC
RTC
VBATT
TP15VBATT
OSCI1
OSCO2
NC3
TEST4
INT5
CE6
VSS7
SDO8
SDI9
SCL10
NC11
CLKOE12
CLKOUT13
VDD14
U5PCF2123TS
D1BAT54CW-3
R1100R 1%
ESR: >15K
CL: 7pF
1
3 2
4G
ND
Y132.768 kHz 7pF
GND GND
(Active High)
(Active High)
1
1
2
2
3
3
4
4
D D
C C
B B
A A
24 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMSRAM_256Kx16_TSOP44.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title 256K x 16-Bit SRAM
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
GND
SRAM_NWE
SRAM_NOE
SRAM_NCS
A01
A12
A23
A34
A45
CS6
VDD11
WE17
A518
A619
A720
A821
D07
D18
D29
VSS12
D310
D413
VDD33
D514
D615
VSS34
D716
A922
A1023
A1124
A1225
A1326
BLE39
A1427
NC28
A1542
A1643
A1744
D829
D930
D1031
D1132
D1235
D1336
D1437
D1538
BHE40
OE41
U1_SMSRAM-256Kx16
SRAM_A0SRAM_A1SRAM_A2SRAM_A3SRAM_A4
SRAM_A5SRAM_A6SRAM_A7SRAM_A8SRAM_A9 SRAM_A10
SRAM_A11SRAM_A12SRAM_A13SRAM_A14
SRAM_A15SRAM_A16SRAM_A17
SRAM_A18
SRAM_NBHE
SRAM_D0SRAM_D1SRAM_D2SRAM_D3
SRAM_D4SRAM_D5SRAM_D6SRAM_D7 SRAM_D8
SRAM_D9SRAM_D10SRAM_D11
SRAM_D12SRAM_D13SRAM_D14SRAM_D15SRAM_NBLE
3V3
3V3
3V3
GND
C2_SM0.1uF 16V
3V3
GND
C4_SM10nF 16V
GND
3V3
C3_SM10nF 16V
GND
3V3
C1_SM0.1uF 16V
A[18..0]D[15..0]
NCSNWENOE
NBHENBLE
SRAM-256Kx16SRAM_A[18..0]SRAM_D[15..0]
SRAM_NWESRAM_NOE
SRAM_NCS
SRAM_NBHE
SRAM
SRAM_NBLE
A18 is connected so that 512KBx16 device can be fitted
1
1
2
2
3
3
4
4
D D
C C
B B
A A
25 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PM1WB_DS2502_ID.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Protected 1-Wire EPROM
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
3V3
R22K2 1%
R1220R 1%
D13.3V
GND1
IO2
NC3
NC4
NC5
NC6
U1
DS2502P
GNDGND
DATA
EXT_PROG
1W
1WID
DATA
PROGRAM
3V3
1
1
2
2
3
3
4
4
D D
C C
B B
A A
25 78
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMHOST_JTAG.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Local MCU Debug Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
1 23 45 67 89 10
J1TSM-105-01-S-DV
JTAGGND
TMSTDOTDI
TCK
JTAG
TMSTDO
TDITCK
JTAG
HARD
SOFT
HARDSOFT_JTAG
HOST_JTAG
HOST_SOFT_TDI
HOST_SOFT_TMSHOST_SOFT_TDO
HOST_SOFT_TCK
HOST_HARD_TDI
HOST_HARD_TMSHOST_HARD_TDO
HOST_HARD_TCK
GND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
Altium Limited
3 Minna CloseBelroseNSW 2085Australia
NB3000AL - ALTERA
26 02
9/22/2011 10:42:11 PMCLK_ICS307-02_PLL.SchDoc
Project Title
Size: Number:
Date:File:
Revision:
Time:
A4
Sheet Title
26 106Sheet of
CLK_1
SPI_DIN
SPI_CLOCK_SEL
SPI_CLOCK_CLKSPI_CLK
SPI_SEL
SPI_DIN
R1_CK5R6 1%
R2_CK5R6 1%
1 3
24
GN
D
Y1_CK20MHZ
3V3
C4_CK0.1uF 16V
3V3 3V3
C1_CK15pF 50V
C2_CK15pF 50V
FPGA_CLKFPGA_CLK
REF_CLK
3V3
CLK26
NC7
SCLK8
STROBE9
NC15
X216
VDD3
NC4
GND5
NC10
CLK111
DATA12
PDTS13
NC14
X1/CLK1
NC2
U1_CKICS307-02
REF_CLK
C3_CK10uF 20V
R3_CK1K 1%
TP12FPGA CLK
TP13REF CLK
FPGA_CLK#
REF_CLK#
CLK_ADJ_X1 CLK_ADJ_X2
1
1
2
2
3
3
4
4
D D
C C
B B
A A
27 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMLED_RGB_SMDx2.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Visual Indicators
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R1150R 1%
R2150R 1%
R3150R 1%
5V0
R4150R 1%
R5150R 1%
R6150R 1%
GND7
VCC14
Y12
A13
U1F74VHC04
1 2
U1A74VHC04
A3
Y4
U1B74VHC04
A5
Y6
U1C74VHC04
Y8
A9
U1D74VHC04
Y10
A11
U1E74VHC04
5V0
GND
GREEN
RED
BLUE
RGB_LED
GREEN
RED
BLUE
RGB_LED
1
3 2
4
R
B
G
LED1S1206RGBSDJC
1
3 2
4
R
B
G
LED2S1206RGBSDJC
LED1
LED1_GREEN
LED1_BLUE
LED1_RED
LED2_GREEN
LED2_BLUE
LED2_RED
C11uF 10V
LED2
GREEN
RED
BLUE
RGB_LED
LED1_EXT
LED2_EXT
LED1_RED_EXT
LED2_GREEN_EXT
LED1_BLUE_EXT
LED1_GREEN_EXT
LED2_BLUE_EXT
LED2_RED_EXT
LED1_RED_EXT
LED1_GREEN_EXT
LED1_BLUE_EXT
LED2_GREEN_EXT
LED2_BLUE_EXT
LED2_RED_EXT
GREEN
RED
BLUE
RGB_LED
5V0
24mA
24mA
1
1
2
2
3
3
4
4
D D
C C
B B
A A
28 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMFLASH_M25PX0_SPI_8Mbit.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Host - Dual Serial Flash Memory
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
DINDOUT
SCLK
FLASH_CS_N
SERFLASH
C110nF 16V
GND
3V3
3V3
S1
Q2
W3
VSS4
D5
C6
HOLD7
VCC8
U1M25P80-VMW6 8Mbit Serial Flash
GND
C20.1uF 16V
SERFLASH
GND
3V3
8,192,000 BITS
(ID=0x13)
(75MHz)M25P80-VMW6 8Mbit Serial PROM
Power up Time (POR):VCC(min) to S low: 10uS
1
1
2
2
3
3
4
4
D D
C C
B B
A A
Altium Limited
3 Minna CloseBelroseNSW 2085Australia
NB3000AL - ALTERA
29 02
9/22/2011 10:42:11 PMFLASHSPI_M25PX0.SchDoc
Project Title
Size: Number:
Date:File:
Revision:
Time:
A4
Sheet Title
29 106Sheet of
FLASH_2
C3_MF10nF 16V
3V3
C4_MF10nF 16V
3V3
S1
Q2
W3
VSS4
D5
C6
HOLD7
VCC8
U10M25P80-VMW6 8Mbit Serial Flash
3V3
S1
Q2
W3
VSS4
D5
C6
HOLD7
VCC8
U3M25P80-VMW6 8Mbit Serial Flash
3V3
C2_MF0.1uF 16V
SCLK
DINDOUT
FLASH1_CS_N
FLASH2_CS_N
C1_MF0.1uF 16V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
30
Altium Limited.Level 3, 12a Rodborough RdFrenchs Forest 2086NSWAUSTRALIA80
ATE Interface Connector
30 *
9/22/2011 10:42:11 PMC:\Designs\SRKH\NB3000AL\CON_NB3000_ATE_INTF.SchDoc
Title
Size: Number:
Date:File:
Revision:
Sheet ofTime:
A4
ATE
5V0
GND
DIAG_DOUT
DIAG_CLKDIAG_DIN
DIAG_CS_N
DINDOUT
SCLK
FLASH_CS_N
DIAGCOMMS
DIAGCOMMS
HOST_JTAG.HARD.TDIHOST_JTAG.HARD.TDO
GND
5V0
MIDI#.MIDI_THRU_TXDAC#.DAC0PWM#.OUT0VGA#.HSYNC
DAC#.DAC2DAC#.DAC3ADC#.ADC1ADC#.ADC0ADC#.ADC3UIO.IO2ADC#.ADC2
UIO.IO5
UIO.IO9
UIO.IO11UIO.IO12
GNDGND
DIAG_DIN5V05V0
HOST_JTAG.HARD.TCK
HOST_JTAG.HARD.TMSRS232#.TXDAUDIO.HP_L
PWM#.OUT1PWM#.OUT2PWM#.OUT3
RS485#.TX_NAUDIO.LOUT_R
AUDIO.LIN_RAUDIO.LIN_L
A1A2A3A4A5A6A7A8A9
A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49
B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49
J1Diagnostics Interface
UIO.IO10
GND
RS485#.TX_P
UIO.IO8MIDI#.MIDI_RX_PMIDI#.MIDI_RX_NMIDI#.MIDI_TX_N
VGA#.GREENVGA#.RED
MSE#.CLOCKHOST_JTAG.SOFT.TDI
VGA#
SPDIF
UIO
ADC#
DAC#
AUDIO
HOST_JTAG
PWM
RS232#
RS485#
KBD#
MSE#
MIDI#
HOST_ID
ATEINTERFACE
VGA#
SPDIF
UIO
ADC#
DAC#
AUDIO
HOST_JTAG
PWM#
RS232#
RS485#
KBD#
MSE#
MIDI#
HOST_ID
AUDIO.LOUT_L
DAC#.DAC1UIO.IO3
UIO.IO6
UIO.IO17UIO.IO18
UIO.IO31
DIAG_CS_N
5V0
RS485#.RX_N
AUDIO.HP_RMIDI#.MIDI_THRU_PWR
MIDI#.MIDI_OUT_PWR
VGA#.BLUE
GNDHOST_JTAG.SOFT.TDO
SPDIF.OUT
UIO.IO4
UIO.IO1
UIO.IO0
UIO.IO13UIO.IO16
UIO.IO19UIO.IO20UIO.IO21UIO.IO22UIO.IO24UIO.IO26UIO.IO29
UIO.IO33UIO.IO34
HOST_JTAG.SOFT.TMSHOST_JTAG.SOFT.TCKDIAG_DOUT
DIAG_CLK
RS485#.RX_PRS232#.RXD
UIO.IO7
UIO.IO14
UIO.IO15
VGA#.VSYNC
UIO.IO23UIO.IO25UIO.IO27UIO.IO28UIO.IO30UIO.IO32UIO.IO35
HOST_ID.EXT_PROG
SPDIF.INMSE#.DATA
KBD#.DATAKBD#.CLOCK
PWMPWR
1
1
2
2
3
3
4
4
D D
C C
B B
A A
31 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMNB2_PBCON.schdoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Peripheral Board Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
EXT
23 45 67 89 10
1
11 1213 1415 1617 1819 2021 22
2425 2627 2829 3031 32
23
33 3435 3637 3839 4041 4243 44
4647 4849 5051 5253 54
45
55 5657 5859 60
1009997
9695949392919089
98
888786858483828180797877
757473727170696867
76
666564636261
MH1 MH2
MH3 MH4
EXTHDRNANOCONNECT
EXT0EXT1EXT2EXT3EXT4EXT5EXT6EXT7EXT8EXT9EXT10EXT11EXT12EXT13EXT14EXT15EXT16EXT17EXT18EXT19EXT20EXT21EXT22EXT23EXT24EXT25EXT26EXT27EXT28EXT29EXT30EXT31EXT32EXT33EXT34EXT35EXT36EXT37EXT38EXT39EXT40EXT41EXT42EXT43EXT44EXT45EXT46EXT47EXT48EXT49
EXT[49..0]
I2C.SCLI2C.SDA
AIN.LAIN.RAIN.MIC
JTAG.HARD.TCKJTAG.HARD.TDOJTAG.HARD.TDI
JTAG.SOFT.TMS
JTAG.HARD.TMSJTAG.SOFT.TDI
JTAG.SOFT.TCK
JTAG.DETECT
JTAG.SOFT.TDO
CLOCKS.EN
SPI_CS_N0
SPI_CS_N1
SPI.DOUTSPI.DINSPI.SCLK
CLOCKS.CLK0
CLOCKS.CLK1CLOCKS.CLK2
ONE_WIRE.ID
GND
GND
ST
AN
DA
RD
PE
RIP
HE
RA
L I
NT
ER
FA
CE
CO
MM
ON
SE
RV
ICE
SONE_WIRE_DB_PB
ONE_WIRE_DB_PBONE_WIRE_DB_PB
SPARE1SPARE2SPARE3
SPARE4
ONE_WIRE.PIO1ONE_WIRE.PIO2
AIN
I2C
SPI
AOUT
AOUT.RAOUT.L
AIN
AOUT
I2C
SPI
CTRL
SPI_CS_N[1..0]
ONE_WIRE
CLOCKS
R1
2K2 1%3V3
ONE_WIRE.ID
EXTINT
JTAG CONFIG
JTAG_ALTIUM_AUTO.SchDoc
JTAG
D[49..0]
PBIO
JTAG
CLK
1W
SPI_CS_N[1..0]SPARE[1..4]
PBCTRL
SPARE[1..4]1V21V82V53V35V0
PBPOWER
PBPOWER
1
1
2
2
3
3
4
4
D D
C C
B B
A A
32 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMDB_LEDS_0603.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title User FPGA Status LEDs
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
3V3 GND
STATUS_LED3V3
GND
STATUS LED
POWER LED
LED_PWR
LED_PGM
R1270R 1% LED1
LED, Green, 0603 (1608)
3V3
LED2LED, 0603, Yellow (1608)
R2270R 1%
NC1
A2
GND3
Y4
VCC5
U1SN74LVC1G04DBV
C10.1uF 16V
3V3GND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
32 78
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMTSC_XPT2046.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title TFT Touchscreen Interface
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
TOUCH SCREEN CONTROLLER
TSC_3V3
R247K 1%
3V3
CLKCS_NDINDOUTBUSYTFT_INT
TFT_TSC
TFT_TSC
+VCC1
X+2
Y+3
X-4
Y-5
GND6
VBAT7
AUX8
VREF9
IOVDD10
PENIRQ11
DOUT12
BUSY13
DIN14
CS15
DCLK16
U1XPT2046
TSC_3V3
X_PLUSX_MINUSY_PLUSY_MINUS
5V0TSC_3V3
GND
TSC_CSTSC_DINTSC_DOUT
TSC_CLK
12NT10
12NT9
12
NT11
GND
X+X-Y+Y-
TFT_TOUCH
TFT_TOUCH
VINVOUT
COM
PSU_A3V3_TFTPSU_TC1017R_3V3
3V3
1
1
2
2
3
3
4
4
D D
C C
B B
A A
33 80
NB3000AL - ALTERA
02
9/22/2011 10:42:11 PMAUDIO_AMP_NB2C.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title AUDIO SUB-SYSTEM
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
BUZZERR8
10K 1%
C1
1uF 10V
R2
10K 1%
C2
1uF 10V
R3
10K 1%
C8
1uF 10V
R10
10K 1%
C9
1uF 10V
R11
10K 1%
C5
1uF 10V
C131uF 10V
C141uF 10V
R1547K 1%
R1447K 1%
AUGNDAUGND
C4
1uF 10V
R5
10K 1%
C7
1uF 10V
R9
10K 1%
TP1MIXER LEFT
TP2MIXER RIGHT
AMPTEST_R
FROM PERIPHERAL BOARD (L)
FROM CODEC (L)
AUDIO TEST (L)
AUDIO TEST (R)
FROM DAUGHTER BOARD (MONO)
FROM PERIPHERAL BOARD (R)
FROM FCODEC (R)
FROM LINE IN JACK (R)
FROM LINE IN JACK (L)
R622K 1%
C64.7nF 10V
GND
R7100K 1%
AUDIOAMP_LAMP_R
HP_L
HP_R
HP_SENSE
LIN_L
LIN_R
LOUT_L
LOUT_R
AUDIO_EXT
AMPTEST_L
Audio Signal to Peripheral BoardAudio Mixer - Left Channel
Audio Mixer - Right Channel
SPK_L
R
L
STEREO
R
L
STEREO
RIGHT
LEFT
SENSE
HEADPHONES
AUGND
5V0
SPK-SPK+
SPEAKER
SPK_L-SPK_L+
SPK_R-SPK_R+
VOL
SPEAKERS
SPK_RSPK-SPK+
SPEAKER
1
2
4
5
63
VR12x5K linear
C3
1uF 10V
R4
10K 1%
FROM HOST FPGA (L)
C10
1uF 10V
R13
10K 1%
FROM HOST FPGA (L)
AIN.L
AIN.R
L
R
MIC
AUDIO_IN
AIN
LR
STEREO
HOST_RIGHTHOST_LEFT
HOST_AUDIO
HOST_RIGHT
HOST_LEFT
AOUT_PBA.L
AOUT_PBA
AOUT_PBA.R
LR
AUDIO_OUTAOUT_PBA.RAOUT_PBA.L
CODEC_AUD CODEC_AUD.RCODEC_AUD.L
CODEC_AUD.R
CODEC_AUD.L
LR
STEREO
AMPTEST_LAMPTEST_R
C124.7nF 10V
GND
C114.7nF 10V
GND
R1
3K3 1%
R12
3K3 1%SIGMA-DELTA DAC
SIGMA-DELTA DAC
SPK
IN
LINEOUT
HEADPHONE
AMP_PT2300AUDIO_AMP_PT2300.SchDoc
1
1
2
2
3
3
4
4
D D
C C
B B
A A
34 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMCON_EXT_SPK.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title External Speaker Connectors
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
SPK_LSPK-SPK+
SPEAKER
SPK_RSPK-SPK+
SPEAKER12
J38
1x2 PH
12
J37
1x2 PH
External Speakers Left
External Speakers Right
1
1
2
2
3
3
4
4
D D
C C
B B
A A
35 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMCON_RS485_RJ45.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title RS485 Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
8
567
234
1
J1955012881
CONTX_N
RX_NRX_P
TX_P
RS485_EXTRS485_RXNRS485_RXP
RS485_TXNRS485_TXP RS485_RXN
RS485_RXPRS485_TXNRS485_TXP
1
1
2
2
3
3
4
4
D D
C C
B B
A A
36 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMNB2_CommonMemory_128Mb_Flash.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Common-Bus Memory Block
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
A[20..2]D[31..0]NCS
NWENOENBE[3..0]
SRAM
D[15..0]A[24..1]
FLASH_NCS
NOENWE
FLASH_NRESETFLASH_NBUSY
FLASH
A[16..2]D[31..0]
NBE[3..0]NWE
SDRAM_NCASSDRAM_NRASSDRAM_CKESDRAM_CLK
SDRAM_NCS
SDRAM
BUS_A[24..1]BUS_D[31..0]
BUS_A[16..2]BUS_D[31..0]
BUS_A[24..1]BUS_D[15..0]
BUS_A[20..2]BUS_D[31..0]
SDRAM
COM_SDRAMSDRAM_MT48LC16M16A2TG_16Mx32.SchDoc
SRAM
COM_SRAMSRAM_256Kx32_TSOP44_1.SchDoc
BUS_A[24..1]BUS_D[31..0]
BUS_NOEBUS_NWE
BUS_NBE[3..0]
BUS_SRAM_NCS
BUS_FLASH_NCS
BUS_SDRAM_NCS
BUS_SDRAM_CKEBUS_SDRAM_CLK
BUS_SDRAM_NCASBUS_SDRAM_NRAS
BUS_FLASH_NRESETBUS_FLASH_NBUSY
HOSTMEMORY
MEM
CM_SDRAM
CM_FLASH
CM_SRAM
FLASH
COM_FLASHFLASH_S29GL128P11FFI010_128Mbit.SchDoc
Common-Bus Memory Block
256K x 32-bit SRAM (1 MByte)16M x 32-Bit SDRAM (64 MByte)8M x 16-Bit Flash (16 MByte)
1
1
2
2
3
3
4
4
D D
C C
B B
A A
37 77
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPSU_1084_ADJ.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL ADJ
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
C310uF 20V
C4220uF 10V
C110uF 20V
GND GND
C21uF 25V
GND
VIN VOUT
ADJ
IN3
1
OUT2
ADJ
U1AP1084KL
1
1
2
2
3
3
4
4
D D
C C
B B
A A
Altium Limited
3 Minna CloseBelroseNSW 2085Australia
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMSDRAM_MT48LC16M16A2TG_16Mx32.SchDoc
Project Title
Size: Assy:
Date:File:
Revision:
Time:
A4
Sheet Title
37 106Sheet of
SDRAM_1
TBA
BUS_SDRAM_CLKBUS_SDRAM_CKE
BUS_SDRAM_CLKBUS_SDRAM_CKE
BUS_A[16..2]BUS_A[16..2]
BUS_D[31..0]BUS_D[31..0]BUS_NBE[3..0]
BUS_NBE[3..0]
BUS_SDRAM_NCASBUS_SDRAM_NRAS
BUS_SDRAM_NCASBUS_SDRAM_NRAS
VD
D1
DQ02
VD
DQ
3
DQ14
DQ25
VS
SQ
6
DQ37
DQ48
VD
DQ
9
DQ510
DQ611
VS
SQ
12
DQ713
VD
D14
DQML15
WE16
CAS17
RAS18
CS19
BA020
BA121
A1022
A023
A124
A225
A326
VD
D27
VS
S28
A429
A530
A631
A732
A833
A934
A1135
A1236
CKE37
CLK38
DQMH39
NC40
VS
S41
DQ842
VD
DQ
43
DQ944
DQ1045
VS
SQ
46
DQ1147
DQ1248
VD
DQ
49
DQ1350
DQ1451
VS
SQ
52
DQ1553
VS
S54
U3_CMSDRAM-16Mx16
VD
D1
DQ02
VD
DQ
3
DQ14
DQ25
VS
SQ
6
DQ37
DQ48
VD
DQ
9
DQ510
DQ611
VS
SQ
12
DQ713
VD
D14
DQML15
WE16
CAS17
RAS18
CS19
BA020
BA121
A1022
A023
A124
A225
A326
VD
D27
VS
S28
A429
A530
A631
A732
A833
A934
A1135
A1236
CKE37
CLK38
DQMH39
NC40
VS
S41
DQ842
VD
DQ
43
DQ944
DQ1045
VS
SQ
46
DQ1147
DQ1248
VD
DQ
49
DQ1350
DQ1451
VS
SQ
52
DQ1553
VS
S54
U2_CMSDRAM-16Mx16
BUS_SDRAM_CLKBUS_SDRAM_CKE
BUS_SDRAM_CLKBUS_SDRAM_CKE
BUS_NWEBUS_NWE
BUS_A2BUS_A3BUS_A4BUS_A5BUS_A6BUS_A7BUS_A8BUS_A9BUS_A10BUS_A11BUS_A12
BUS_D0
BUS_D2BUS_D1
BUS_D4BUS_D3
BUS_D6BUS_D5
BUS_D7BUS_D8BUS_D9BUS_D10
BUS_D12BUS_D11
BUS_D15BUS_D14BUS_D13
BUS_A15BUS_A16
BUS_A2BUS_A3BUS_A4BUS_A5BUS_A6BUS_A7BUS_A8BUS_A9BUS_A10BUS_A11BUS_A12
BUS_SDRAM_NCSBUS_NWEBUS_SDRAM_NCASBUS_SDRAM_NRAS
BUS_NBE0BUS_NBE1
BUS_NBE2BUS_NBE3
BUS_SDRAM_NCSBUS_NWEBUS_SDRAM_NCASBUS_SDRAM_NRAS
BUS_A13BUS_A14
BUS_A13BUS_A14
BUS_SDRAM_NCSBUS_SDRAM_NCS
3V3
C9_CM0.1uF 16V
C11_CM10nF 16V
C8_CM10nF 16V
C7_CM10nF 16V
C12_CM10nF 16V
C14_CM0.1uF 16V
C10_CM0.1uF 16V
C13_CM0.1uF 16V
BUS_D16
BUS_D18BUS_D17
BUS_D20BUS_D19
BUS_D22BUS_D21
BUS_D23BUS_D24BUS_D25BUS_D26
BUS_D28BUS_D27
BUS_D31BUS_D30BUS_D29
BUS_A15BUS_A16
3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3
3V3
1
1
2
2
3
3
4
4
D D
C C
B B
A A
38 77
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPSU_1084SET_2V5.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL SET TO 2V5
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
VOUT
ADJ
Vout = VREF { R21+ R1 }VREF = 1.25v
+ IADJ
I ADJ = 55uA (0.000055)
2.5V Output
R1120R 1%
R2120R 1%
R2
Calculation for 2.5V;
= 1.25V x (1+R2/R1) + 0.000055 x R2
= 1.25V x (1+120/120) + 0.000055 x 120
= 1.25V x 2 + 0.0066
= 2.50066V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
38 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMFLASH_S29GL128P11FFI010_128Mbit.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title 128M-bit Flash Memory (BGA)
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
D[15..0]
A[24..1]
FLASH_NCSNOENWE
FLASH_NRESET
FLASH_NBUSY
FLASH
BUS_A[24..1]
BUS_D[15..0]
GND
BUS_D0BUS_D1BUS_D2BUS_D3BUS_D4BUS_D5BUS_D6BUS_D7BUS_D8BUS_D9BUS_D10BUS_D11BUS_D12BUS_D13BUS_D14BUS_D15
BUS_A24
BUS_A1BUS_A2BUS_A3BUS_A4BUS_A5BUS_A6BUS_A7BUS_A8BUS_A9BUS_A10BUS_A11BUS_A12BUS_A13BUS_A14BUS_A15BUS_A16BUS_A17BUS_A18BUS_A19BUS_A20BUS_A21
3V3
C310nF 16V
C10.1uF 16V
C20.1uF 16V
C410nF 16V
C510nF 16V
C60.1uF 16V
BUS_A22BUS_A23
3V3
GND
3V3
GND
3V3
GND
3V3
GND
3V3
GND
3V3
GND
3V3
FLASH
NC
H8
NC
A1
NC
B1
NC
C1
NC
G1
NC
D1
NC
H1
NC
E1
WP#/ACCB4
WE#A5
VSSH7
VSSE8
VSSH2
DQ4H5
A2C2
A3A2
A4B2
A5D3
A6C3
A7A3
A8B6
A9A6
A10C6
A11D6
A13A7
A14C7
A15D7
A16E7
A17B3
A18C4
A19D5
A20D4
A21C5
A22B8
BYTE#F7
RESET#B5
RY/BY#A4
VCCG5
VIOD8
DQ5E5
DQ6H6
DQ7E6
DQ8F3
DQ9G3
DQ10F4
DQ11G4
DQ12F5
DQ13G6
DQ14F6
NC
A8
NC
F8
A12B7
A23C8
DQ1H3
CE#F2
DQ2E4
DQ3H4
NC
G8
DQ15/A-1G7
OE#G2
DQ0E3
A0E2
A1D2
VIOF1
U1S29GL128P11FFI010
1
1
2
2
3
3
4
4
D D
C C
B B
A A
39 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMSRAM_256Kx32_TSOP44_1.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title 256K x 32 SRAM - TSOP44 x 2
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
A[20..2]D[31..0]
NCSNWENOE
NBE[3..0]
SRAM
SRAM_NWE
SRAM_NOE
SRAM_NCS
A01
A12
A23
A34
A45
CS6
VDD11
WE17
A518
A619
A720
A821
D07
D18
D29
VSS12
D310
D413
VDD33
D514
D615
VSS34
D716
A922
A1023
A1124
A1225
A1326
BLE39
A1427
NC28
A1542
A1643
A1744
D829
D930
D1031
D1132
D1235
D1336
D1437
D1538
BHE40
OE41
U1SRAM-256Kx16
A01
A12
A23
A34
A45
CS6
VDD11
WE17
A518
A619
A720
A821
D07
D18
D29
VSS12
D310
D413
VDD33
D514
D615
VSS34
D716
A922
A1023
A1124
A1225
A1326
BLE39
A1427
NC28
A1542
A1643
A1744
D829
D930
D1031
D1132
D1235
D1336
D1437
D1538
BHE40
OE41
U2SRAM-256Kx16
SRAM_A[20..2]SRAM_D[31..0]
SRAM_A20
SRAM_A19SRAM_A2SRAM_A3SRAM_A4SRAM_A5SRAM_A6
SRAM_A7SRAM_A8SRAM_A9SRAM_A10SRAM_A11 SRAM_A12
SRAM_A13SRAM_A14SRAM_A15SRAM_A16
SRAM_A17SRAM_A18
SRAM_NBE1
SRAM_NWE
SRAM_NOE
SRAM_NCSSRAM_D0SRAM_D1SRAM_D2SRAM_D3
SRAM_D4SRAM_D5SRAM_D6SRAM_D7 SRAM_D8
SRAM_D9SRAM_D10SRAM_D11
SRAM_D12SRAM_D13SRAM_D14SRAM_D15 SRAM_D16
SRAM_D17SRAM_D18SRAM_D19
SRAM_D20SRAM_D21SRAM_D22SRAM_D23 SRAM_D24
SRAM_D25SRAM_D26SRAM_D27
SRAM_D28SRAM_D29SRAM_D30SRAM_D31
SRAM_NWESRAM_NOE
SRAM_NCS
SRAM_NBE0SRAM_NBE3SRAM_NBE2
SRAM_NBE[3..0]
C40.1uF 16V
C810nF 16V
C710nF 16V
C20.1uF 16V
C610nF 16V
C510nF 16V
C10.1uF 16V
C30.1uF 16V
SRAM_A20
SRAM_A19SRAM_A2SRAM_A3SRAM_A4SRAM_A5SRAM_A6
SRAM_A7SRAM_A8SRAM_A9SRAM_A10SRAM_A11 SRAM_A12
SRAM_A13SRAM_A14SRAM_A15SRAM_A16
SRAM_A17SRAM_A18
GND
GND
GND
GND3V33V3
3V33V3
GND
3V3
GND GND
3V3
GND
3V33V3
GND
3V3
GND GND
3V3
GND
3V3 3V3
SRAM
A18 is connected so that 512KBx16 device can be fitted
1
1
2
2
3
3
4
4
D D
C C
B B
A A
40 106
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPSU_TC1017R_3V3.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU TC1017R 3V3
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
VIN
VIN1
GND2
SHDN3
NC4
VO5
U1TC1017R-3.3VLTTR
C31uF 10V
C210uF 20V
C11uF 10V
VOUT
3V3
150mA
COM
50uVRMS
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
40
02
9/22/2011 10:42:12 PMUSB_ISP1760.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A3
Sheet Title USB-host Controller IC
Assy:
80
NB3000AL - ALTERA
TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
1
3
24
GND
Y112MHz XTAL
C30.1uF 16V
GNDGND
C40.1uF 16V
C50.1uF 16V
C60.1uF 16V
C710uF 20V
C810uF 20V
C910uF 20V
R7150R 1%
R6150R 1%
R5150R 1%
R410K 1%
R312K 1%
R212K 1%
R112K 1%
C34422pF 50V
C34522pF 50V
BUS_A1BUS_A2BUS_A3BUS_A4BUS_A5BUS_A6BUS_A7BUS_A8BUS_A9BUS_A10BUS_A11BUS_A12BUS_A13BUS_A14BUS_A15BUS_A16BUS_A17
BUS_D0BUS_D1BUS_D2BUS_D3BUS_D4BUS_D5BUS_D6BUS_D7BUS_D8BUS_D9BUS_D10BUS_D11BUS_D12BUS_D13BUS_D14BUS_D15BUS_D16BUS_D17BUS_D18BUS_D19BUS_D20BUS_D21BUS_D22BUS_D23BUS_D24BUS_D25BUS_D26BUS_D27BUS_D28BUS_D29BUS_D30BUS_D31
BUS_NWEBUS_NRD
BUS_ISP176X_DREQ
BUS_ISP176X_NIRQ
BUS_ISP176X_NCS
BUS_ISP176X_DACK
ISP176X_NRESET
GND
GNDGNDGNDGNDGNDGNDGNDGNDGNDGND
GNDGND
GND
GNDGNDGND
GNDGNDGNDGNDGND
GNDGND
GND
GND
3V33V33V33V33V33V33V33V33V33V3
5V05V0
GNDGND
GND
GND
GND
GNDGND GND
GND GND
3V3
VBUSDMINUSDPLUS
USB_CON
PORT3
VBUSDMINUSDPLUS
USB_CON
PORT2
VBUSDMINUSDPLUS
USB_CON
PORT1
GND
5V0
3V3
GND
3V3
3V3
C34310uF 20V
GND
3V3
C2040.1uF 16V
R26410K 1%
C205220nF 16V
5V0
I/O11
NC3
VN2
NC4
VP5
I/O26
U60NUP2201MR6T1G R265
10K 1%
5V0
GND
I/O11
NC3
VN2
NC4
VP5
I/O26
U61NUP2201MR6T1G R266
10K 1%
5V0
GND
I/O11
NC3
VN2
NC4
VP5
I/O26
U62NUP2201MR6T1G R267
10K 1%
5V0
GND
PORT1_DMINUSPORT1_DPLUS
PORT2_DMINUSPORT2_DPLUS
PORT3_DMINUSPORT3_DPLUS
F2MF-SM250
3V3R26810K 1%
DREQ114
CLKIN13
A182
A284
A386
VCC(5V0)6
A487
A589
A691
A792
A893
VCC(I/O)40
DATA3180
DATA3078
DATA2977
DATA2876
VCC(5V0)7
DATA2774
DATA2673
DATA2572
DATA2470
DATA2369
DATA2268
DATA2166
DATA2065
DATA1964
DATA1862
DATA1761
DATA1660
VCC(I/O)10
VCC(I/O)48
VCC(I/O)59
VCC(I/O)67
DATA1558
DATA1457
DATA1356
DATA1254
DATA1152
DATA1051
DATA949
DATA847
DATA746
DATA645
DATA543
DATA442
DATA341
DATA239
DATA138
DATA037
A995
A1096
A1197
A1298
A13100
A14101
A15102
A16103
A17105
GND(RREF1)15
GND(RREF2)22
GND(RREF3)29
GNDA4
GND(OSC)8
GNDA26
GNDA33
GNDA123
GNDA-PORT117
GNDA19
GNDA-PORT331
GNDC53
GNDC88
GNDC121
GNDA-PORT224
GNDD36
GNDD44
GNDD55
GNDD63
GNDD14
GNDD79
GNDD90
GNDD99
GNDD109
GNDD71
VCC(I/O)75
VCC(I/O)104
VCC(I/O)83
VCC(I/O)94
VCC(I/O)115
REG1V85
REG1V850
REG1V885
REG1V8118
REG3V39
DM118
DM225
DM332
DP120
DP227
DP334
CS_N106
DACK116
RD_N107
RESET_N122
WR_N108
IRQ112
NC111
NC113
TEST13
TEST281
TEST3117
TEST4120
TEST5124
TEST6125
TEST7126
OC1_N127
OC2_N128
OC3_N1
REF5V2
RREF116
RREF223
RREF330
XTAL111
XTAL212
SUSPEND-WAKEUP_N119
BAT_ON_N110
PSW1_N21
PSW2_N28
PSW3_N35
U59ISP1760
BUS_A[17..1]BUS_D[31..0]
BUS_NWEBUS_NRD
BUS_ISP176X_DREQ
BUS_ISP176X_NIRQ
BUS_ISP176X_NCS
BUS_ISP176X_DACK
ISP176X_NRESET
ISP176X
BUS_A[17..1]BUS_D[31..0]BUS_NREAD
BUS_NCSBUS_DMA_REQBUS_DMA_ACKBUS_NIRQ
BUS_NWRITE
ISP176X_NRESET
ISP176X
VBUS
VBUS
1
1
2
2
3
3
4
4
D D
C C
B B
A A
41 106
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPSU_NCP630_ADJ.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU NCP630A ADJ
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND GND
VOUT
ADJ
GND
C310uF 20V
C4220uF 10V
IN2
OUT4
ADJ5
EN1
GN
D3
U1NCP630A
GND GND
VIN
C210uF 20V
C1220uF 10V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
41 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMCON_NB3000_LEDKB.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title LED and Button Ext. Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
SW0 SW1SW3SW2
SW4
SPAREIO1 SPAREIO2SPAREIO4SPAREIO3
135 6
42
79 10
8
1113 14
12
15 1617 181921 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
20
J12x20 FFC VERT
SW_PDASW0
SW2
SW4
SW1
SW3
SW[4..0]D[4..0]
SW5
SPARE_IO
1234
SPAREIOSPAREIO1SPAREIO2SPAREIO3SPAREIO4
LED0_RLED0_GLED0_B
LED1_RLED1_GLED1_B
LED2_RLED2_GLED2_B
LED3_RLED3_GLED3_B
LED4_RLED4_GLED4_B
LED5_RLED5_GLED5_B
LED6_RLED6_GLED6_B
LED7_RLED7_GLED7_B
5V0
GND
12NT1
12NT2
12NT3
GND
GND
1 2NT4
1 2NT5
12NT6
GND
5V01 2
NT8
5V0
USER_LEDS
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
USER_LEDS
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
REDGREEN
BLUE
RGB_LED
LED0_R
LED0_GLED0_B LED1_R
LED1_G
LED1_BLED2_R
LED2_GLED2_B
LED3_RLED3_G
LED3_B LED4_R
LED4_G
LED4_BLED5_RLED5_G
LED5_B LED6_R
LED6_G
LED6_BLED7_R
LED7_G
LED7_B
1
1
2
2
3
3
4
4
D D
C C
B B
A A
42 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMSW_PB_SPNOx5_SMD.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PDA-Style 5 x SPNO Switch
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R14K7 1%
R34K7 1%
R54K7 1%
SW2
SW3
SW0
SW1
SW[4..0]
SW4
R24K7 1%
R44K7 1%
3V3
D[4..0]
SW5
INT
GND3V3
GND3V3
GND3V3
GND3V3
GND
CONSW[4..0]
D[4..0]
SW5
12
34SW1
SPNO
12
34SW2
SPNO
12
34SW3
SPNO
12
34SW4
SPNO
12
34SW5
SPNO
1
1
2
2
3
3
4
4
D D
C C
B B
A A
43 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMADC_ADC084S021_SPI.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title ADC084S021 8-Bit ADC IC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
SPI
CON
CSCLK
DINDOUT
ADC_SPI
ADC[3..0]
ADC_CON
ADC[3..0]
CSCLK
DINDOUT
AGND
ADCDAC_3V3
CS1
VA2
GND3
IN44
IN35
IN26
IN17
DIN8
DOUT9
SCLK10
U1ADC084S021
ADC0ADC1ADC2ADC3
C333nF 25V
R127R 1%
C433nF 25V
C133nF 25V
C233nF 25V
1
2
3456
U2SMF05C
AGND AGND AGND AGND AGND
R227R 1%
R327R 1%
R427R 1%
fc1
ππππ
Low Pass Input filter Calculations:
=2 RC
1=
6.38 x 27 x 33Hz
=
-9
178715.6777
= Corner frequency rolloff (Knee) of ~ 178KHz
R = 27 OhmsC = 33nF (0.033uF)
ADC maximum sample rate:
8 bit @ 200Ksps
Maximum sample rate (nyquist) : 100kHz
0.012890625v = 1 bit (3V3 ref) resolution
1
1
2
2
3
3
4
4
D D
C C
B B
A A
44 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMCON_ADCx4_KMRJIO3_5MM_6WAY.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Screw Header For ADC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
CON ADC[3..0]
ADC_CON
ADC[3..0]ADC0ADC1ADC2ADC3ADC_GND
ADC_PWR 123456
J1KMRJ103-5.0/508 6WAYS
5V0
AGND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
45 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMDAC_DAC084S085_SPI.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title DAC084S085 8-bit DAC IC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
DAC[3..0]
CSCLK
DIN
AGND
DAC0DAC1DAC2DAC3
C333nF 25V
R127R 1%
C433nF 25V
C133nF 25V
C233nF 25V
1
2
3456
U2SMF05C
AGND AGND AGND AGND AGND
R227R 1%
R327R 1%
R427R 1%
SPI
CON
CSCLK
DIN
DAC_SPI
DAC[3..0]
DAC_CON
ADCDAC_3V3
VA1
GND6
VREFIN7
VOUTA2
VOUTB3
VOUTC4
VOUTD5
DIN8
SYNC9
SCLK10
U1DAC084S085CIMM
1
1
2
2
3
3
4
4
D D
C C
B B
A A
46 77
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPSU_1084SET_3V3.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL SET TO 3V3
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
VOUT
ADJ
Vout = VREF { R21+ R1 }VREF = 1.25v
+ IADJ
I ADJ = 55uA (0.000055)
3.3V Output
R1120R 1%
R2200R 1%
R2
Calculation for 3.3V;
= 1.25V x (1+R2/R1) + 0.000055 x R2
= 1.25V x (1+200/120) + 0.000055 x 200
= 1.25V x 2.67 + 0.011
= 3.34433V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
46 80
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPWRCTRL_RELAY_PWM_28V2A_X4.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Power Control or PWM
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
PWM CON
PWM OUT
PWRPWM0PWM_5.8A_30V.SchDoc
PWM OUT
PWRPWM1PWM_5.8A_30V.SchDoc
PWM OUT
PWRPWM2PWM_5.8A_30V.SchDoc
PWM OUT
PWRPWM3PWM_5.8A_30V.SchDoc
P0_PWM
P1_PWM
P2_PWM
P3_PWM
PWM0
PWM1
PWM2
PWM3
PWM4
OUT[3..0]
PWM_CON
OUT0
OUT1
OUT2
OUT3
OUT[3..0]
P0_PWM
P1_PWM
P2_PWM
P3_PWM
5V0 PWMPWR
F1MF-SM250
1
1
2
2
3
3
4
4
D D
C C
B B
A A
47 77
NB3000AL - ALTERA
02
9/22/2011 10:42:12 PMPSU_1084SET_1V8.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL 1V8
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R1120R 1%
R256R 1%
GND
VOUT
ADJ
Vout = VREF { R21+ R1 }VREF = 1.25v
+ IADJ
I ADJ = 55uA (0.000055)
1.8V Output
R2
Calculation for 1.8V;
= 1.25V x (1+R2/R1) + 0.000055 x R2
= 1.25V x (1+56/120) + 0.000055 x 56
= 1.25V x 1.47 + 0.00308
= 1.83641V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
47 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMRELAY_X4_IMO3GR.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Power Control or PWM
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
RELAYS CON
RELAYNO
CNC
U_RELAY0RELAY_SMT_5V_IM03GR.SchDoc
RELAYNO
CNC
U_RELAY1RELAY_SMT_5V_IM03GR.SchDoc
RELAYNO
CNC
U_RELAY2RELAY_SMT_5V_IM03GR.SchDoc
RELAYNO
CNC
U_RELAY3RELAY_SMT_5V_IM03GR.SchDoc
R0
R1
R2
R3
NO0
C0NC0
NO1
C1NC1
NO2
C2NC2
NO3
C3NC3
RELAY_CON4
R[3..0]RELAY[3..0]
RELAY4
1
1
2
2
3
3
4
4
D D
C C
B B
A A
48 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_DACx4_KMRJIO3_5MM_6WAY.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Screw Header For DAC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
CON DAC[3..0]
DAC_CON
DAC[3..0]DAC0DAC1DAC2DAC3DAC_GND
DAC_PWR 123456
J2KMRJ103-5.0/508 6WAYS
5V0
AGND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
49 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_PWMx4_KMRJIO3_5MM_6WAY.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Screw Header For Power PWM
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
CON
PWM0PWM1PWM2PWM3PWM_GND
PWM_PWR 123456
J3KMRJ103-5.0/508 6WAYS
OUT[3..0]
PWM_CON
PWM[3..0]
GND
PWMPWR
1
1
2
2
3
3
4
4
D D
C C
B B
A A
50 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_RELAYx4_KMRJIO3_5MM_12WAY.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Screw Header For Relays
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
123456789
101112
J4KMRJ103-5.0/508 12WAYS
CON
NO0C0
NC0
NO1C1
NC1
NO2C2
NC2
NO3C3
NC3
RELAY_CON4
1
1
2
2
3
3
4
4
D D
C C
B B
A A
50 78
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMUSB_CY7C68001-56LFC.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title High-Speed USB 2.0 Controller
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R22K7 1%R3
5K6 1%
HUSB_D[15..0]
R627R 1%
3V3
GND
AV
CC
3A
GN
D6
DM
INU
S9
DP
LU
S8
RE
SE
T42
XT
AL
IN5
XT
AL
OU
T4
NC
54
READY33
INT34
SLOE35
FIFOADR236
FIFOADR037
FIFOADR138
PKTEND39
FLAGD/CS40
FD[0]18
FD[1]19
FD[2]20
FD[3]21
FD[4]22
FD[5]23
FD[6]24
FD[7]25
FD[8]45
FD[9]46
FD[10]47
FD[11]48
FD[12]49
FD[13]50
FD[14]51
FD[15]52
SL
RD
1
SL
WR
2
FLAGA29
FLAGB30
FLAGC31
IFC
LK
13
Res
erved
14
WAKEUP44
SCL15
SDA16V
CC
55
VC
C7
VC
C11
VC
C17
VC
C27
VC
C32
VC
C43
GN
D53
GN
D56
GN
D10
GN
D12
GN
D26
GN
D28
GN
D41
U3CY7C68001-56LFC
R84K7 1%
R94K7 1%
HUSB_D0HUSB_D1HUSB_D2HUSB_D3HUSB_D4HUSB_D5HUSB_D6HUSB_D7
HUSB_D8HUSB_D9HUSB_D10HUSB_D11HUSB_D12HUSB_D13HUSB_D14HUSB_D15
GND
GND
R74K7 1%
GND
3V3
I/O11
NC3
VN2
NC4
VP5
I/O26
U2NUP2201MR6T1G
R410K 1%
VBUSDMINUSDPLUS
READYINT_N
SLOE
FIFOADR2FIFOADR0FIFOADR1
PKTEND
FLAGD_CS_NFLAGAFLAGBFLAGC
WR_NRD_ND[15..0]RESET_NIFCLKXTALIN
VBUS
XTALOUT
USB_INTF
VBUSDMINUSDPLUS
USB_CON
EXT
INT
WR_NRD_N
IFCLKRESET_N
XTALIN
HUSB_D[15..0]
HUSB_VBUS
IFCLK
RD_NWR_N
HUSB_VBUS
XTALOUT
C30.1uF 16V
C90.1uF 16V
GND
C710uF 20V
C50.1uF 16V
C40.1uF 16V
C80.1uF 16V
3V3
3V3 3V3
XT
AL
INX
TA
LO
UT
GND
3V3
C20.1uF 16V
C610uF 20V
12
NT1
3V3
RESET_N
GND
USB_RST
US
B_R
ST
R10004K7 1%
3V3
A3V
3_U
SB
A3V3_USB
Reset Threshold: 2.63v
Reset Duration: 1.5ms
GND1
RESET2
MR3
VCC4
U1000MAX6315US26D1
PCB footprint to implement thermal pad. See CY7C68001 data sheet for details.
Place R3_US close to U1 end.
1
1
2
2
3
3
4
4
D D
C C
B B
A A
51 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_SPDIF_INOUT_A.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title S/PDIF RCA IN/OUT
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
2341
J2
RCA Header
R875R 1%
R610K 1%
D2200mA 30V
D1200mA 30V
C20.1uF 16V
R7100R 1%
C10.1uF 16V
11
22
33
44
55
66
77
88
T1PT4812
2341
J1
RCA Header
INOUT
SPDIF
SPDIF
R333R 1%
R475R 1%
R2120R 1%
R1120R 1%
R510K 1%
GNDGND
3V3
GND
GND
3V3
GND
GND
3V3
GNDGND
GALVANIC ISOLATION
TYP. SPDIF INPUT = 250-500mVP-P INTO 75R
SPDIF OUT
SPDIF IN
NOTE:
INVERTER MUST BE UNBUFFERED (U TYPE)
TYP. SPDIF OUTPUT = 1VP-P INTO 75R
12
U1A74HCU04
34
U1B
74HCU04
56
U1C74HCU04
89
U1D
74HCU04
1011
U1E
74HCU04
12 13
14
7
U1F74HCU04
1
1
2
2
3
3
4
4
D D
C C
B B
A A
52 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_SD_KSDC012551.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title SD-CARD
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
DAT[3..0]
CMDCLK
DETECT
PROTECT
SD
SD_DAT0SD_DAT1SD_DAT2SD_DAT3
SD_DAT[3..0]
R14K7 1%
R24K7 1%
3V3
CON
GND
CLK5
CMD2
DAT29
VDD4
VSS13
DAT18
DAT07
CD/DAT31
VSS26
GNDGND1
GNDGND2
WPWP
CDCD
J1SD CARD HEADER
BOTTOM SIDE MOUNTING
3V3
WRITE PROTECT (PIN WP):
PROTECTED (LOCKED): OPEN - FLOATING
UNPROTECTED (UNLOCKED): WP CONNECTED TO GND
CARD DETECT (PIN CD):
CARD INSERTED: CONNECTED TO GND
CARD REMOVED: OPEN - FLOATING
3V3
SD CARD FACES DOWN
NC1
A2
GND3
Y4
VCC5
U65SN74LVC1G04DBV
NC1
A2
GND3
Y4
VCC5
U66SN74LVC1G04DBV
GND
3V3
1
1
2
2
3
3
4
4
D D
C C
B B
A A
53 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_USER_20WBOXHDRRAMx2.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title 36-Way User I/O Headers
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
1 23 45 67 89 1011 1213 1415 1617 1819 20
UH1
2x10 HEADER
1 23 45 67 89 1011 1213 1415 1617 1819 20
UH2
2x10 HEADER
IO[35..0]
IO0IO1 IO2IO3 IO4IO5 IO6IO7 IO8IO9 IO10IO11 IO12IO13 IO14IO15 IO16IO17
IO18IO19 IO20IO21 IO22IO23 IO24IO25 IO26IO27 IO28IO29 IO30IO31 IO32IO33 IO34IO35
GND GNDUSER HEADER A USER HEADER B
V_USERAV_USERB
1 23 4
JP1
2x2 HEADER MALE
1 23 4
JP2
2x2 HEADER MALE
3V3 5V03V3 5V0
IO[35..0]
IO36
CON
AIN
BINAOUT
BOUT
USERPOWER
USERPOWER
1
1
2
2
3
3
4
4
D D
C C
B B
A A
54 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_VGA_DB15.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Video Out Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
SVGA
17
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
J1HDR-15S11G1R
RED
GREEN
BLUE
VSYNCHSYNC
KEYID2
ID3/SCL/DDC
ID1/SDA/DDCID0
VGA_CON
CON INTERFACE
SHIELD
GND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
55 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_ETHERNET_RJ45_LEDS.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Ethernet Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
TX_P
TX_N
RX_P
RX_NRX_CT
TX_CT
LINK_K
ACT_A
ETHERNET_CON
CON
TD+1
TD-2
RD+3
NC7
GND8
RD-6
CT4
CT5
A1(YEL)9
K1(YEL)10
A2(GRN)12
K2(GRN)11
MH1MH2
J1RJ45_LEDS
SHIELD GND
3V3
GND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
56 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_MINI_USBB_RA_KME04-USBMU03A01-1.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title USB 2.0 Type B Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
VBUSDMINUSDPLUS
USB_CON
SHIELD
CON
GND
VBUS1
D-2
D+3
ID4
GND5
MH16
MH27
MH38
MH49
J1
USB MINI
1
1
2
2
3
3
4
4
D D
C C
B B
A A
57 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_RS232DCE_DB9_TH.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title RS232-DCE DB9
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND SHIELD
CON
DCD
RXD
TXD
DTR
DSR
RTS
CTS
RI
RS232_EXT
Transmitted Data
Received Data
Data Terminal Ready
Data Set Ready
Request To Send
Clear To Send
Carrier Detect
Ring Indicator
1
2
3
4
5
6
7
8
9
11
10
J1DRB-09P11G1R
RS232 DB-9 Male ConnectorEIA-574 Standard
1
1
2
2
3
3
4
4
D D
C C
B B
A A
58 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_PS2PORT_MINIDIN6F_BLACK.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PS2 MINIDIN6F Connector (Black)
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
DATA
CLOCK
PS2
5V0
PS2 PORT
SHIELDGND
CON
12
34
65
5
12
34
6
J1MINIDIN 6P
1
1
2
2
3
3
4
4
D D
C C
B B
A A
59 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMPROTOTYPE_A.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title User Prototyping Area
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
PROTOTYPEIO[35..0]
IO[35..0]
IO36
IO36B32
IO1B1
IO2A1
IO3H1
IO4H2
IO5H3
IO6H4
IO7H5
IO8H6
IO9H7
IO10H8
IO11H9
IO12H10
IO13H11
IO14H12
IO15H13
IO16H14
IO17H15
IO18H16
IO19H17
IO20H18
IO21H19
IO22H20
IO23H21
IO24H22
IO25H23
IO26H24
IO27H25
IO28H26
IO29H27
IO30H28
IO31H29
IO32H30
IO33H31
IO34H32
IO35A32
GND1
1V22
GND3
1V84
GND5
2V56
GND27
3V328
GND29
5V030
GND31
B+32
PROTOTYPE
IO0IO1IO2IO3IO4IO5IO6IO7IO8IO9IO10IO11IO12IO13IO14IO15IO16IO17IO18IO19IO20IO21IO22IO23IO24IO25IO26IO27IO28IO29IO30IO31IO32IO33IO34IO35
1V2GND
1V8GND
2V5GND
3V3GND
5V0GND
+BGND
1
1
2
2
3
3
4
4
D D
C C
B B
A A
59 78
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMFPGA_Bypass_3V3.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title FPGA Bypass 3V3
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
C68_F
P10
nF
16V
C69_F
P10
nF
16V
C38_F
P10uF
20V
C41_F
P10uF
20V
C70_F
P10
nF
16V
C71_F
P10
nF
16V
C73_F
P10
nF
16V
C74_F
P10
nF
16V
C40_F
P10uF
20V
C39_F
P10uF
20V
C85_F
P0.1
uF
16V
C84_F
P10nF
16V
C58_F
P0.1
uF
16V
C63_F
P10
nF
16V
C62_F
P10
nF
16V
C65_F
P10
nF
16V
C64_F
P10
nF
16V
C52_F
P0.1
uF
16V
C53_F
P0.1
uF
16V
C54_F
P0.1
uF
16V
C55_F
P0.1
uF
16V
C56_F
P0.1
uF
16V
C57_F
P0.1
uF
16V
GND
3V3
C89_F
P10nF
16V
C91_F
P10nF
16V
C46_F
P0.1
uF
16V
C47_F
P0.1
uF
16V
C48_F
P0.1
uF
16V
C49_F
P0.1
uF
16V
C50_F
P0.1
uF
16V
C51_F
P0.1
uF
16V
GND
3V3
C59_F
P0.1
uF
16V
C60_F
P0.1
uF
16V
C88_F
P10nF
16V
C87_F
P0.1
uF
16V
GND
3V3
C94_F
P10nF
16V
C95_F
P0.1
uF
16V
C96_F
P10nF
16V
C97_F
P0.1
uF
16V
C98_F
P0.1
uF
16V
C99_F
P10nF
16V
C100_F
P0.1
uF
16V
C101_F
P10nF
16V
GND
3V3
C79_F
P10
nF
16V
C80_F
P10
nF
16V
C81_F
P10
nF
16V
1V2
3V3
3V3
1V2
The FPGA bypass capacitors are physically grouped as 10nF and 100nF pairs on all major accessible power pins on the FPGA.
1
1
2
2
3
3
4
4
D D
C C
B B
A A
60 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMSW_RESET_SPNO.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Push Button SPNO Switch
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R14K7 1%
INT
GND
3V3
12
34
SW1
SPNO
1
1
2
2
3
3
4
4
D D
C C
B B
A A
60 78
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_AUDIO_AC99_NOMIC.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title AUDIO AC99 Interface
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
Headphone Out
Line In
Amplifier Test
Line Out
AUGND
AUGND
AUGND
AUGND
HEADPHONE R
HEADPHONE L
HEADPHONE SENSE
AMPTEST L
AMPTEST R
LINEIN R
LINEIN L
1110
3
21
J1
AUDIO BLACK HEADER
1110
3
21
J5
AUDIO BLACK HEADER
1110
3
21
J4
AUDIO BLUE HEADER
1110
3
21
J3
AUDIO GREEN HEADER
CON
AMP_LAMP_R
HP_L
HP_RHP_SENSE
LIN_LLIN_R
LOUT_L
LOUT_R
AUDIO_EXT
1
1
2
2
3
3
4
4
D D
C C
B B
A A
61 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMCON_MIDI_DIN5.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title MIDI Connectors
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
12345
MH1
1
2
345
MH2
J1KMFCDIN76005
MIDI IN
MIDI THRU
MIDI OUT
CON
12345
MH1
1
2
345
MH2
J2KMFCDIN76005
12345
MH1
1
2
345
MH2
J3KMFCDIN76005
SHIELD
MIDI_RX_NMIDI_RX_P
MIDI_THRU_TX
MIDI_TX_NMIDI_OUT_PWR
MIDI_TX_GND
MIDI_THRU_GND
MIDI_THRU_PWR
MIDI_IO
SHIELD
SHIELD
MIDI IN
MIDI OUT
IN OUT THRU
MIDIMASTER
PRIMARY
INSTRUMENT
SECONDARY
INSTRUMENT
IN OUT THRU
SECONDARY
INSTRUMENT
IN OUT THRUNB3000
1
1
2
2
3
3
4
4
D D
C C
B B
A A
61 78
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMFPGA_Bypass_1V2.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title FPGA Bypass 1V2
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
C5_FP0.1uF 16V
C13_FP10nF 16V
C18_FP10nF 16V
C15_FP10nF 16V
C16_FP10nF 16V
C2_FP10uF 20V
C8_FP0.1uF 16V
C9_FP0.1uF 16V
C1_FP10uF 20V
1V2
GND
1V2
GND
GND
1V2
C3_FP10uF 20V
C11_FP0.1uF 16V
C42_FP10uF 20V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
62 80
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMSW_DIP8_SMT.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title 8-Way SPST DIP Switch (SMT)
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
12345678
161514131211109
CT
S
SW1219-8LPST
GND
DIP0DIP1DIP2DIP3DIP4DIP5DIP6DIP7
DIP-SWITCHDIP[7..0]
R14K7 1%
3V3
R24K7 1%
R34K7 1%
R44K7 1%
R54K7 1%
R64K7 1%
R74K7 1%
R84K7 1%
D[7..0]
SW8
INT
1
1
2
2
3
3
4
4
D D
C C
B B
A A
Altium Limited
3 Minna CloseBelroseNSW 2085Australia
NB3000AL - ALTERA
63 02
9/22/2011 10:42:13 PMCON_BATT_COIN.SchDoc
Project Title
Size: Number:
Date:File:
Revision:
Time:
A4
Sheet Title
63 106Sheet of
CON_BATT_1
BT1
CELLBATT 20mm HEADER
VBATT
TO RTC
(CR2032)
1
1
2
2
3
3
4
4
D D
C C
B B
A A
63 78
NB3000AL - ALTERA
02
9/22/2011 10:42:13 PMVIDEO_DAC_THS8134B.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Video DAC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
RED2RED1
RED[7..0]
RED0
RED3RED4
GREEN[7..0]
GREEN0
BLUE[7..0]
GREEN1GREEN2GREEN3GREEN4
BLUE0BLUE1BLUE2BLUE3BLUE4
R1430R 1%
GND
5V0
L1
4.7uH 650mA 0.15R
C410uF 10V
GND
C30.1uF 16V
GND
RED5RED6RED7
GREEN5GREEN6GREEN7
BLUE5BLUE6BLUE7
3V3
+5V_VIDOUT
C20.1uF 16V
C50.1uF 16V
BP71
BP62
BP53
BP44
BP35
BP26
BP17
BP08
NC9
NC10
DV
SS
11
DV
DD
12
NC13
NC14
RP015
RP116
RP217
RP318
RP419
RP520
RP621
RP722
BLANK23
SYNC24
SYNC_T25
CLK26
GY727
GY628
GY529
GY430
GY331
GY232
GY133
GY034
NC35
NC36
VREF37
FSADJ38
COMP39
AV
DD
40
AGY41
AV
SS
42
ARPr43
AV
DD
44
ABPb45
AV
SS
46
M147
M248
U1
THS8134BCPHP
C1
0.1uF 16V
GND
R4150R 1%
R3150R 1%
R2150R 1%
R6150R 1%
R5150R 1%
R7150R 1%
GND
B
R
G
VIDEO_DAC_OUT
VIDEO_DAC_OUT
RED[7..0]GREEN[7..0]
BLUE[7..0]VGA_CLK
VIDEO_DAC_IN
VIDEO_DAC_IN
GND
3V3
1
1
2
2
3
3
4
4
D D
C C
B B
A A
64 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMRS485_ISL8491.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title RS485 Communication IC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
NC1
RO2
RE3
DE4
DI5
GND6
GND7
NC8
Y+9
Z-10
B-11
A+12
NC13
VCC14
U1ISL8491IB
GND
5V0
C11uF 10V
GND
5V0
R1100R 1%
INTTX_EN
RXD
RX_EN
TXD
RS485_INT
EXTTX_N
RX_NRX_P
TX_P
RS485_EXTRS485_RXNRS485_RXP
RS485_TXNRS485_TXP
12
J11x2 HEADER MALE
R2120R 1%
TERMINATIONENABLE
1
1
2
2
3
3
4
4
D D
C C
B B
A A
64 78
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMCON_FFC40_LCDTFT.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title LCD Module Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
135 6
42
79 10
8
1113 14
12
15 1617 181921 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
20
J272x20 FFC VERT
3V3
GND
1 2NT34
12
NT39
LED-K3LED-K2
LED-K4
LED-K1LED-A
IM3
NC
R101
5R6 1%
R100
5R6 1%
GND
R214
120R 1%
55mAQ11AO3400
Tds(on) = 5nS
Tds(off) = 40nS
MAX
5A
TFT_IOTFT_CSTFT_RSTFT_WRTFT_RDTFT_RESET
TFT_DB[17..0]
CSRS
WRRD
RESET
DB[17..0]
BL
IR38KTXIR38KRX
TFT_IO
IR38KTXIR38KRX
TFT_CSTFT_RSTFT_WRTFT_RD
TFT_RESET
IR38KTXIR38KRXTFT_DB0TFT_DB1TFT_DB2TFT_DB3
TFT_DB4
TFT_DB5TFT_DB6TFT_DB7
TFT_DB10TFT_DB11TFT_DB12TFT_DB13TFT_DB14TFT_DB15TFT_DB16TFT_DB17
GND1 2
NT38IM0
3V33V3
3V3GND
GND
X_PLUSY_PLUSX_MINUSY_MINUS
X+X-Y+Y-
TFT_TOUCH
TFT_TOUCH
X_PLUS
Y_PLUSY_MINUS
X_MINUS
TS8003K
1 2NT37
1 2NT41
12NT40
12NT36
12NT35
1
1
2
2
3
3
4
4
D D
C C
B B
A A
65 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPC_PS2.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PC PS2
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
DATA
CLOCK
PS2
5V0
R14K7 1%
R24K7 1%
R3100R 1%
R4100R 1%
C110uF 20V
GND
EXTINT
DATA
CLOCK
PS2
1
1
2
2
3
3
4
4
D D
C C
B B
A A
66 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMMIDI_FULL.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title MIDI Sub-system
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R2220R 1%
EXT
MIDI_RX_N
MIDI_RX_P
MIDI_THRU_TX
MIDI_TX_N
MIDI_OUT_PWR
MIDI_TX_GND
MIDI_THRU_GND
MIDI_THRU_PWR
MIDI_IO
D1ZHCS400
3V3
R1270R 1%
INT
MIDI_TX
MIDI_RX
MIDI_INT
R7 220R 1%
5V0
R5 220R 1%
GND
5V0
GND
3V3
GND
NC1
A2
GND3
Y4
VCC5
U2SN74LVC1G04DBV
R35R6 1%
NC1
A2
GND3
Y4
VCC5
U3SN74LVC1G04DBV
MIDI LINE SIGNALING SPEED: 31.25KHZ
U1
PC900V0NSZXF
GND
17mA
1 2
NT47
1 2
NT48
Rt(on) = 0.5uS
Rt(off) = 0.5uS
MAX. RECEIVE SIGNALING SPEED: 230KHZ
3V3
GND
3V3
5V0
GND
NC1
A2
GND3
Y4
VCC5
U71SN74LVC1G04DBV
5V0
GND
24mA
24mA
MIDI INTERFACE
MIDI 1.0 SPEC 4.2 COMPLIANT (1995)
NC1
A2
GND3
Y4
VCC5
U72SN74LVC1G04DBV
R198 220R 1%
R200 220R 1%
1
1
2
2
3
3
4
4
D D
C C
B B
A A
67 106
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_NCP630SET_1V2.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU NCP630A SET TO 1V2
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
VOUT
ADJ
Vout = VREF { R11+ R2 }VREF = 1.216v
+ IADJ
I ADJ = 40nA (0.000000040)
1.2V Output
R210K 1%
R2
R10R 5%
Calculation for 1.2V;
= 1.216V x (1+R1/R2) + 0.000000040 x R2
= 1.216V x (1+0/10000) + 0.000000040 x 10000
= 1.216V x 1 + 0.0004
= 1.2164V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
67 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMRS232_HIN232.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title RS232 Communication IC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
DCD
RXD
TXD
DTR
DSR
RTS
CTS
RI
RS232_EXT
C30.1uF 16V
C10.1uF 16V
C20.1uF 16V
C40.1uF 16V
GND
5V0
R2
100R 1%
R1
100R 1%
RS232_RX#
RS232_CTS#
RS232_C1+RS232_C1-RS232_C2+RS232_C2-
RS232_V+
RS232_V-
GND
INT
EXT
RXD
TXD
RTS
CTS
RS232_INT
13
10
11
8
12
9
14
7
C1+1
C2+4
GND15
C1-3
VCC16
C2-5
V-6
V+2
U45HIN232ACBNZ-T
1
1
2
2
3
3
4
4
D D
C C
B B
A A
68 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMCON_USBA_RA_UPRIGHT.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title USBA RA Upright Connector
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
VBUSDMINUSDPLUS
USB_CON
SHIELD GND
CONVBUS
1
D-2
D+3
GND4
MH1MH1
MH2MH2
MH3MH3
MH4MH4
J34USB A UPRIGHT
1
1
2
2
3
3
4
4
D D
C C
B B
A A
69 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPWM_5.8A_30V.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PWM 30V/4A
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
LED1LED, 0603, Yellow (1608)
PWM
OUT
GND GND
R227R 1%
R11K 1%
Q1AO3400
5A MAX
Tds(on) = 5nS
Tds(off) = 40nS
1
2
3456
U2SMF05C
GND
BASE
COLLECTOR
1
1
2
2
3
3
4
4
D D
C C
B B
A A
70 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMRELAY_SMT_5V_IM03GR.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Power Control
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R1120R 1%
5V0
GND
LED1LED, 0603, Orange (1608)
R21K 1%
D1ZHCS400
6
2
4
18
3
NC
CNO
5
7
RLY1IMO3 - 5VDC
Q12N7002
RELAYC
NC
NO
28mACOMMON
MAX. SWITCHING POWER: 60W
NORMALLY OPEN
NORMALLY CLOSED
+-
1
1
2
2
3
3
4
4
D D
C C
B B
A A
71 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMJTAG_ALTIUM_AUTO.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Auto-Detect JTAG Circuit
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
HARD
SOFT
DETECT
JTAG_CONFIG
TDITDO
TCKTMS
JTAG
TDITDO
TCKTMS
JTAG
HARD
SOFT
DETECT
JTAG_CONFIG
TDITDO
TCKTMS
JTAG
TDITDO
TCKTMS
JTAG
R5 100R 1%R6 100R 1%
R8 100R 1%R7 100R 1%
R14K7 1%
R44K7 1%
R34K7 1%
R24K7 1%
R13 100R 1%R14 100R 1%
R16 100R 1%R15 100R 1%
R94K7 1%
R124K7 1%
R114K7 1%
R104K7 1%
R18100R 1%
R174K7 1%
3V3
3V3
3V3
EXT
INT
1
1
2
2
3
3
4
4
D D
C C
B B
A A
72 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMAUDIO_AMP_PT2300.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title AUDIO AMP & MIXER PT2300
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
AUGND
C150.1uF 16V
AUGND
5V0
LineAOUT_R
LineAOUT_L
R131K 1%
R161K 1%
AUGND AUGND
C12
220uF 10V
C16
220uF 10VC101uF 10V
C181uF 10V
C240.1uF 16V
C141uF 10V
R11
10K 1%
R18
10K 1%
R19100K 1%
R10100K 1%
C250.1uF 16V
C2310uF 20V
R211K 1%
R252K2 1%
R261K 1% R27
2K2 1%
AUGND AUGND
5V0
AUGND
5V0
AUGND
5V0
AUGND
C280.1uF 16V
5V0
AUGND
Line Out
SPK_L-SPK_L+
SPK_R-SPK_R+
VOL
SPEAKERSSPK
R
LSTEREO
IN
R
L
STEREOLINEOUT
RIGHT
LEFT
SENSE
HEADPHONESHEADPHONE
SHDN1
VCC2
DC Vol3
VO14
VIN15
VIN26
VO27
GND8
+OUT29
VCC10
-OUT211
SE/BTL12
BYPASS13
-OUT114
VCC15
+OUT116
U1PT2300-S
AUGND
5V0
1
1
2
2
3
3
4
4
D D
C C
B B
A A
73 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_TC1017R_3V3.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU TC1017R 3V3
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
VIN
VIN1
GND2
SHDN3
NC4
VO5
U1TC1017R-3.3VLTTR
C31uF 10V
C210uF 20V
C11uF 10V
VOUT
3V3
150mA
COM
50uVRMS
1
1
2
2
3
3
4
4
D D
C C
B B
A A
74 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMAUDIO_CODEC_CS4270.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Audio CODEC
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
AUGNDAUGND
SDIN1
LRCK2
MCLK3
SCLK4
VD5
DGND6
SDOUT7
VLC8
SDA/CDOUT9
SCL/CCLK10
AD0/CS11
AD1/CDIN12
AD213
RST14
AINA15
AINB16
VQ17
FILT+18
VA19
AGND20
MUTEA21
AOUTA22
AOUTB23
MUTEB24
U1
CS4270
3V3
GND
C210uF 10V
C110uF 10V
C3100nF 16V
C4100nF 16V
GNDC5
10uF 10V
C6
100nF 16V
C7
10uF 10V
C8
100nF 16V
R3 33R 1%R5 33R 1%
R1 33R 1%
R4 33R 1%R6 10K 1%
R2 33R 1%
R7
4K7 1%
R104K7 1%
C9
10uF 10VC10
220pF 50V 1005 COG
R124K7 1%
C13
10uF 10VC14
220pF 50V 1005 COG
AUGND
R114K7 1%
AUGND
AUGND
C1110nF 16V
C1210nF 16V
R8 430R 1%R9 430R 1%
AUGND
AUGND
SDOUTSDIN
SCLKLRCKMCLK
M/S
LineIn_LLineIn_R
AOUTAAOUTB
APWR
SCL_CCLK
AD1
SDA_CDOUT
AD0
AD2
/RST
MUTEA
MUTEB
AUDIO_CODEC
AUDIO_CODEC
1
1
2
2
3
3
4
4
D D
C C
B B
A A
75 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_1084_ADJ.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL ADJ
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
C310uF 20V
C4220uF 10V
C110uF 20V
GND GND
C21uF 25V
GND
VIN VOUT
ADJ
IN3
1
OUT2
ADJ
U1AP1084KL
1
1
2
2
3
3
4
4
D D
C C
B B
A A
76 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_1084SET_3V3.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL SET TO 3V3
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
VOUT
ADJ
Vout = VREF { R21+ R1 }VREF = 1.25v
+ IADJ
I ADJ = 55uA (0.000055)
3.3V Output
R1120R 1%
R2200R 1%
R2
Calculation for 3.3V;
= 1.25V x (1+R2/R1) + 0.000055 x R2
= 1.25V x (1+200/120) + 0.000055 x 200
= 1.25V x 2.67 + 0.011
= 3.34433V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
77 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_1084SET_2V5.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL SET TO 2V5
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
VOUT
ADJ
Vout = VREF { R21+ R1 }VREF = 1.25v
+ IADJ
I ADJ = 55uA (0.000055)
2.5V Output
R1120R 1%
R2120R 1%
R2
Calculation for 2.5V;
= 1.25V x (1+R2/R1) + 0.000055 x R2
= 1.25V x (1+120/120) + 0.000055 x 120
= 1.25V x 2 + 0.0066
= 2.50066V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
78 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_NCP630_ADJ.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU NCP630A ADJ
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND GND
VOUT
ADJ
GND
C310uF 20V
C4220uF 10V
IN2
OUT4
ADJ5
EN1
GN
D3
U1NCP630A
GND GND
VIN
C210uF 20V
C1220uF 10V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
79 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_NCP630SET_1V2.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU NCP630A SET TO 1V2
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
GND
VOUT
ADJ
Vout = VREF { R11+ R2 }VREF = 1.216v
+ IADJ
I ADJ = 40nA (0.000000040)
1.2V Output
R210K 1%
R2
R10R 5%
Calculation for 1.2V;
= 1.216V x (1+R1/R2) + 0.000000040 x R2
= 1.216V x (1+0/10000) + 0.000000040 x 10000
= 1.216V x 1 + 0.0004
= 1.2164V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
80 80
NB3000AL - ALTERA
02
9/22/2011 10:42:14 PMPSU_1084SET_1V8.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title PSU AP1084KL 1V8
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
R1120R 1%
R256R 1%
GND
VOUT
ADJ
Vout = VREF { R21+ R1 }VREF = 1.25v
+ IADJ
I ADJ = 55uA (0.000055)
1.8V Output
R2
Calculation for 1.8V;
= 1.25V x (1+R2/R1) + 0.000055 x R2
= 1.25V x (1+56/120) + 0.000055 x 56
= 1.25V x 1.47 + 0.00308
= 1.83641V
1
1
2
2
3
3
4
4
D D
C C
B B
A A
* *
NB3000AL - ALTERA
02
9/22/2011 10:42:15 PMAudio_Codec.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Audio CODEC Top
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
AUDIO_CODEC
CODEC_CS4270AUDIO_CODEC_CS4270
I2S_DINI2S_DOUT
I2S_BCLK
I2S_MCLKI2S_WCLK
LineOut_RLineOut_L
SPI_DOUT
SPI_DIN
SPI_CLK
SPI_CS_N
SDOUTSDIN
SCLKLRCKMCLK
M/S
LineIn_LLineIn_R
AOUTAAOUTB
APWR
SCL_CCLK
AD1
SDA_CDOUT
AD0
AD2
/RST
MUTEA
MUTEB
AUDIO_CODEC
3V3
GND
LineOut_RLineOut_L
I2S_DINI2S_DOUTI2S_BCLK
I2S_MCLKI2S_WCLK
SPI_DOUTSPI_DIN
SPI_CLKSPI_CS_N
DIGITAL
CODEC_AUD
I2S_DOUTI2S_DIN
I2S_BCLKI2S_WCLKI2S_MCLK
SPI_CLK
SPI_DINSPI_DOUTSPI_CS_N
AUDIO_DIGITAL
A3V3_CODEC
5V0A3V3_CODEC
AUGND
AIN.LAIN.R
AINAIN
LR
STEREO
3V3
GND
CODEC_RST
R1544K7 1%
3V3
CODEC_RST
R984K7 1%
3V3
Reset Threshold: 2.63v
Reset Duration: 1.5ms
GND1
RESET2
MR3
VCC4
U2000MAX6315US26D1
VINVOUT
COM
PSU_A3V3_CODECPSU_TC1017R_3V3
3V3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
D D
C C
B B
A A
02
9/22/2011 10:42:15 PMFPGA.SCHDOC
Project Title
Size: Assy:
Date:File:
Revision:
Time:
A0
Sheet Title
*Sheet of
USER FPGA Connections
*
NB3000AL - ALTERA
TBA
Altium Limited
3 Minna CloseBelrose
NSW 2085Australia
FPGA_TCK
FPGA_TDI
FPGA_TMS
FPGA_TDO
FPGA_PROGRAM
FPGA_M0
3V3
FPGA_PROGRAM
FPGA_TDO
FPGA_INIT
SRAM1_NCS
SRAM1_A[18..0]SRAM1_D[15..0]
SRAM1_NBHE
SRAM1_NWESRAM1_NOE
FPGA_DONE
FPGA_ID3
FPGA_ID0
FPGA_ID1
STATUS_LED
BUZZERBUZZER
SCLSDA
IO[35..0]
FPGA_CCLK
FPGA_DINFPGA_DONE
FPGA_ID[3..0]
FPGA_INIT
FPGA_M[2..0]
FPGA_PROG_CLKFPGA_PROG_PWR_ON
FPGA_PROGRAM
SW[4..0]
ONE_WIRE_DB_PBONE_WIRE_DB_PB
SRAM2_NCS
SRAM2_A[18..0]SRAM2_D[15..0]
SRAM2_NBHE
SRAM2_NWESRAM2_NOE
R14K7 1%
R2
4K7 1%
R34K7 1%
R4
4K7 1%
R8
100R 1%R9
100R 1%R10
100R 1%R12
100R 1%
R18 100R 1%
R23 100R 1%
R24
100R 1%R22
100R 1%R20
100R 1%
SRAM1_NBLE
SRAM2_NBLE
BUS_SDRAM_CLKBUS_SDRAM_FEEDBACK
1 2
NT2
1 2
NT3
1 2
NT4
1 2
NT5
A[18..0]D[15..0]
NCS
NWENOE
NBHE
NBLE
SRAM-256Kx16
SRAM2
A[18..0]D[15..0]
NCSNWENOE
NBHENBLE
SRAM-256Kx16
SRAM1
BUS_A[24..1]BUS_D[31..0]
BUS_NOE
BUS_NWEBUS_NBE[3..0]
BUS_SRAM_NCS
BUS_FLASH_NCSBUS_SDRAM_NCS
BUS_SDRAM_CKE
BUS_SDRAM_CLKBUS_SDRAM_NCASBUS_SDRAM_NRAS
BUS_FLASH_NRESET
BUS_FLASH_NBUSY
HOSTMEMORY
BUS_A[24..1]BUS_D[31..0]
BUS_NBE[3..0]BUS_NWE
BUS_NOE
BUS_FLASH_NCS
BUS_FLASH_NRESETBUS_FLASH_NBUSY
BUS_SDRAM_NCS
BUS_SDRAM_CKE
BUS_SDRAM_CLKBUS_SDRAM_NCAS
BUS_SDRAM_NRAS
BUS_SRAM_NCS
COMMON MEMORY RESOURCES
MEM_COMMON
STANDALON MEMORY RESOURCES
DINDONE
INSTALLEDID[3..0]
CCLK
PROGRAMM[2..0]
INIT
PROG_PWR_ON
PROG_CLK
DAU_CTRL
JTAG
PROGRAM
CLOCKS
DB_PROGRAM
DAU_RESET_SW
PERIPHERALS
SW D[4..0]
SW5
DATA
CLOCK
PS2
KBCLOCKKBDATA
MOUSECLOCKMOUSEDATA
RS232_CTS
RS232_RTSRS232_RX
RS232_TX
RS232
KEYBOARD
MOUSE
RXD
TXD
RTS
CTS
RS232_INT
DATA
CLOCK
PS2
DAU_RESET_SW
USERIO IO[35..0]
IO36
SCL
SDA
I2C
I2C
3V3
GND
GND
GND
TFT_TSC_CLK
TFT_TSC_DINTFT_TSC_CS_N
TFT_TSC_BUSYTFT_TSC_DOUT
GREENRED
BLUE
LED0_R
LED0_GLED0_B
LED1_R
LED1_GLED1_B
LED2_R
LED2_GLED2_B
LED3_RLED3_G
LED3_B
LED4_RLED4_G
LED4_B
LED5_RLED5_G
LED5_B
LED6_RLED6_G
LED6_B
LED7_RLED7_G
LED7_B
CODECI2S_DIN
CODECI2S_DOUTCODECI2S_BCLK
CODECI2S_MCLK
CODECI2S_WCLK
CODECSPI_DOUTCODECSPI_DIN
CODECSPI_CLKCODECSPI_CS
CODEC
I2S_DOUTI2S_DIN
I2S_BCLKI2S_WCLK
I2S_MCLK
SPI_CLK
SPI_DINSPI_DOUT
SPI_CS_N
AUDIO_DIGITAL
DIP[7..0]DIP D[7..0]
SW8
DBUSB
CLK
CMDDAT[3..0]
DETECTPROTECT
SD
DBSD
SDCLKSDCMD
SDDETECT
SDPROTECT
SDDAT[3..0]
E_RXC
E_MDIOE_MDC
E_RXERE_CRS
E_RXDVE_RESETB_E
E_TXENE_COL
E_TXC
E_RXCE_TXC
E_TXD[3..0]
E_TXENE_COL
E_RXD[3..0]
E_RXDVE_RESETB_E
E_MDIOE_MDC
E_RXERE_CRS
Ethernet
E_TXD[3..0]E_RXD[3..0]
ETH
IN
OUT
SPDIF
SPDIFSPDIF_OUTSPDIF_IN
RED[7..0]GREEN[7..0]
BLUE[7..0]VGA_CLK
VGA_VSYNCVGA_HSYNC
VGA
VGA
VGA_RED[7..0]VGA_GREEN[7..0]
VGA_BLUE[7..0]VGA_CLK
VGA_VSYNC
VGA_HSYNC
TFT_CSTFT_RS
TFT_WRTFT_RD
TFT_RESET
TFT_DB[17..0]
TFT_TSC_IRQ_N
TFT_BLIGHT
RELAYRELAY[3..0]
RELAY[3..0]
RELAY4
ADC
CSCLK
DIN
DOUT
ADC_SPIADC_CS
ADC_CLK
ADC_DINADC_DOUT
DACCS
CLK
DIN
DAC_SPI
DAC_CSDAC_CLK
DAC_DIN
MIDIMIDI_TXMIDI_RX
MIDI_INT
MIDI_TX
MIDI_RX
TMSTDO
TDITCK
JTAG
TMS
TDO
TDI
TCK
JTAG
HARD
SOFT
HARDSOFT_JTAG
FPGA_TDI
FPGA_TCKFPGA_TMSFPGA_TDO
NEXUS_TMS
NEXUS_TDO
NEXUS_TDI
NEXUS_TCK
DB_JTAG
REF_CLK
FPGA_CLK
FPGA_CLK1
DB_CLOCKS
REF_CLKaFPGA_CLK
DAU_FPGA_CLK1
DB_CLOCKS
PWM
PWM0
PWM1PWM2
PWM3
PWM4P0_PWM
P1_PWMP2_PWM
P3_PWM
RS485TX_EN
RXDRX_EN
TXD
RS485_INT
MODE
SEL
CLKDIN
DOUT
DB_SPIDAU_SPI_CLK
DAU_SPI_DIN
DAU_SPI_DOUT
DAU_SPI_MODE
DAU_SPI_SEL
DB_SPI
TFT_TSC
TFT_IO
CS
RSWR
RDRESET
DB[17..0]
BL
IR38KTX
IR38KRX
TFT_IO
485_RXD485_RX_EN
485_TX_EN485_TXD
USER_LEDS
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
USER_LEDS
GREENRED
BLUE
GREENRED
BLUE
GREENRED
BLUE
GREENRED
BLUE
GREENRED
BLUE
GREENRED
BLUE
GREENRED
BLUE
EXT_AEXTEND_A[49..0]
D[49..0]
PBIO
READY
INT_N
SLOE
FIFOADR2FIFOADR0
FIFOADR1PKTEND
FLAGD_CS_N
FLAGA
FLAGBFLAGC
WR_N
RD_ND[15..0]
RESET_N
IFCLK
XTALIN
VBUS
XTALOUT
USB_INTF
USB2
USB_WR_NUSB_RD_NUSB_D[15..0]
USB_RESET_N
USB_READYUSB_INT_N
USB_SLOE
USB_FIFOADR2USB_FIFOADR0
USB_FIFOADR1USB_PKTEND
USB_FLAGAUSB_FLAGB
USB_FLAGC
USB_IFCLK
USB_VBUS
USB_FLAGD_CS_N
USER/DB FPGA
SPI
FPGA_DIN
FPGA_INIT
FPGA_CCLK
1V2 3V3USER_DECOUPLING_CAPS_1V2
FPGA_Bypass_1V2.SCHDOC
USER_DECOUPLING_CAPS_3V3
FPGA_Bypass_3V3.SCHDOC
1 2
NT3
BUS_A[17..1]
BUS_D[31..0]
BUS_NWE
BUS_ISP176X_DREQ
BUS_ISP176X_NIRQ
BUS_ISP176X_NCS
BUS_ISP176X_DACK
PROTOTYPEIO[35..0]
IO[35..0]
IO36
R272
2K2 1%
R273
2K2 1%
R2742K2 1%
R2752K2 1%
3V3
3V3
GND
GNDBUS_SDRAM_CKE
BUS_SDRAM_CLK
BUS_NOE
ISP176X_RST
DAU_FPGA_CLK1BUS_SDRAM_FEEDBACK
FPGA_CLK
NEXUS_TCK
REF_CLKa
BUS_SDRAM_CLK
SPAREIO1
SPAREIO2
SPAREIO4
SPAREIO3
IR38KTXIR38KRX
BUS_A[17..1]BUS_D[31..0]
BUS_NREAD
BUS_NCSBUS_DMA_REQ
BUS_DMA_ACKBUS_NIRQ
BUS_NWRITE
ISP176X_NRESET
ISP176X
ISP176X
R2774K7 1%
R2784K7 1%
3V3 3V3
ONE_WIRE_DB_PB
R283
4K7 1%
3V3
12
34
SPAREIO
SPAREIO
BA
NK
1
IO, DIFFIO_L1pD3
IO, DIFFIO_L1n, (DQ2L)/(DQ1L)/(DQ1L)C2
IOM9
IO, DIFFIO_L2p, (DQ2L)/(DQ1L)/(DQ1L)D2
IO, DIFFIO_L2n, (DQ2L)/(DQ1L)/(DQ1L)D1
IO, VREFB1N0H7
IO, DIFFIO_L3pE5
IO, DIFFIO_L3nE4
IO, DIFFIO_L4p, (nRESET), (DQ2L)/(DQ1L)/(DQ1L)G6
IO, DIFFIO_L4n, (DQ2L)/(DQ1L)/(DQ1L)G5
IO, DIFFIO_L5pH4
IO, DIFFIO_L5nH3
IO, DIFFIO_L6pJ5
IO, DIFFIO_L6nG7
IO, DIFFIO_L7p, (DQS2L/CQ3L,CDPCLK0)/(DQS2L/CQ3L,CDPCLK0)/(DQS2L/CQ3L,CDPCLK0)E3
IO, DIFFIO_L7n, (DQ2L)/(DQ1L)/(DQ1L)F3
IO, DIFFIO_L8p, (DQ2L)/(DQ1L)/(DQ1L)F5
IO, DIFFIO_L8n, (DATA1, ASDO)F4
IO, VREFB1N1L5
IO, DIFFIO_L9p, (DQ2L)/(DQ1L)/(DQ1L)G4
IO, DIFFIO_L9nG3
IO, DIFFIO_L10p, (FLASH_nCE, nCSO)E2
IO, DIFFIO_L10nJ6
IO, DIFFIO_L11p, _/(DQ1L)/(DQ1L)E1
IO, DIFFIO_L11nJ7
IO, DIFFIO_L12p, (DM2L)/(DM1L0/BWS#1L0)/(DM1L0/BWS#1L0)F2
IO, DIFFIO_L12n, (DQ0L)/(DQ1L)/(DQ1L)F1
IO, DIFFIO_L13pK4
IO, DIFFIO_L13nK3
IO, DIFFIO_L14pK7
IO, DIFFIO_L14nL6
IO, DIFFIO_L15pL8
IO, DIFFIO_L15nL7
IO, DIFFIO_L16pM8
IO, DIFFIO_L16nM7
IO, DIFFIO_L17pL4
IO, DIFFIO_L17nL3
IO, DIFFIO_L18pH6
IO, DIFFIO_L18nH5
IO, DIFFIO_L19pJ4
IO, DIFFIO_L19n, (DQ0L)/(DQ1L)/(DQ1L)J3
IO, VREFB1N2N8
IO, DIFFIO_L20p, (DQ0L)/(DQ1L)/(DQ1L)G2
IO, DIFFIO_L20nG1
IO, DIFFIO_L21pM3
IO, DIFFIO_L21n, (DQ0L)/(DQ1L)/(DQ1L)K1
IO, DIFFIO_L22pN4
IO, DIFFIO_L22nN3
IOM4
IO, (DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0)K2
IO, DIFFIO_L23pL2
IO, DIFFIO_L23n, (DQ0L)/(DQ1L)/(DQ1L)L1
IO, VREFB1N3M5
IO, DIFFIO_L24pM2
IO, DIFFIO_L24n, (DQ0L)/(DQ1L)/(DQ1L)M1
IO, DIFFIO_L25pP2
IO, DIFFIO_L25n, (DQ0L)/(DQ1L)/(DQ1L)P1
IO, (DATA0)N7
U8AEP3C40F780C8N
BA
NK
2 IO, DIFFIO_L26p, (DQ0L)/(DQ1L)/(DQ1L)R2
IO, DIFFIO_L26n, _/(DQ1L)/(DQ1L)R1
IO, DIFFIO_L27p, (DM0L)/(DM1L1/BWS#1L1)/(DM1L1/BWS#1L1)U3
IO, DIFFIO_L27nU2
IO, DIFFIO_L28p, (DQ1L)/(DQ3L)/(DQ1L)R3
IO, DIFFIO_L28nR6
IO, DIFFIO_L29p, (DQ1L)/(DQ3L)/(DQ1L)R4
IO, DIFFIO_L29nR7
IO, DIFFIO_L30p, (DQ1L)/(DQ3L)/(DQ1L)T4
IO, DIFFIO_L30nT3
IO, VREFB2N0T8
IO, DIFFIO_L31pU4
IO, DIFFIO_L31n, (DQ1L)/(DQ3L)/(DQ1L)R5
IO, DIFFIO_L32p, (DQ1L)/(DQ3L)/(DQ1L)U1
IO, DIFFIO_L32n, (DQ1L)/(DQ3L)/(DQ1L)V4
IO, DIFFIO_L33pV3
IO, DIFFIO_L33n, (DQ1L)/(DQ3L)/(DQ1L)V2
IOV9
IO, DIFFIO_L34p, (DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1)AB2
IO, DIFFIO_L34nAB1
IO, (DQ1L)/(DQ3L)/(DQ1L)V1
IO, DIFFIO_L35p, (DQ1L)/(DQ3L)/(DQ1L)W2
IO, DIFFIO_L35n, (DM1L/BWS#1L)/(DM3L0/BWS#3L0)/(DM1L2/BWS#1L2)W1
IO, DIFFIO_L36pW3
IO, DIFFIO_L36nW4
IO, DIFFIO_L37pV6
IO, DIFFIO_L37nU5
IO, DIFFIO_L38pY5
IO, DIFFIO_L38nY6
IO, DIFFIO_L39pV5
IO, DIFFIO_L39n, (DQ3L)/(DQ3L)/(DQ1L)U6
IO, DIFFIO_L40pAA7
IO, DIFFIO_L40nAA6
IO, VREFB2N1T7
IO, DIFFIO_L41pAA8
IO, DIFFIO_L41nY7
IO, DIFFIO_L42p, (DQ3L)/(DQ3L)/(DQ1L)Y4
IO, DIFFIO_L42nY3
IO, DIFFIO_L43pT9
IO, DIFFIO_L43n, (DQ3L)/(DQ3L)/(DQ1L)AC2
IO, DIFFIO_L44pW8
IO, DIFFIO_L44n, (DQ3L)/(DQ3L)/(DQ1L)AC1
IO, DIFFIO_L45pV7
IO, DIFFIO_L45n, (DQ3L)/(DQ3L)/(DQ1L)AC3
IO, DIFFIO_L46p, (DQ3L)/(DQ3L)/(DQ1L)AD2
IO, DIFFIO_L46nAD1
IO, DIFFIO_L47p, (DQ3L)/(DQ3L)/(DQ1L)AB3
IO, DIFFIO_L47n, (DQ3L)/(DQ3L)/(DQ1L)AA4
IOW9
IO, DIFFIO_L48pAB7
IO, DIFFIO_L48nAC7
IO, VREFB2N2V8
IO, DIFFIO_L49pAE1
IO, DIFFIO_L49n, (DQ3L)/(DQ3L)/(DQ1L)AE2
IO, DIFFIO_L50pAA5
IO, DIFFIO_L50n, (DM3L/BWS#3L)/(DM3L1/BWS#3L1)/(DM1L3/BWS#1L3)AF2
IO, DIFFIO_L51pAB6
IO, DIFFIO_L51nAB5
IOAA3
IO, RUP1U7
IO, RDN1U8
IO, DIFFIO_L52pAC4
IO, DIFFIO_L52nAD3
IOAD4
IO, (DQS3L/CQ3L#,CDPCLK1)/(DQS3L/CQ3L#,CDPCLK1)/(DQS3L/CQ3L#,CDPCLK1)AE3
IO, VREFB2N3AB4
IOAB8
IO, DIFFIO_L53pAC5
IO, DIFFIO_L53nAD5
IO, DIFFIO_L54pAE4
IO, DIFFIO_L54nAF3
U8BEP3C40F780C8N
BA
NK
3 IO, DIFFIO_B1pAC11
IO, DIFFIO_B1nAD11
IO, DIFFIO_B2pAD12
IO, DIFFIO_B2n, (DM1B)/_/_AE6
IO, DIFFIO_B3p, (DQ1B)/_/_AF4
IO, DIFFIO_B3nAB12
IO, VREFB3N3Y10
IO, DIFFIO_B4pAG4
IO, DIFFIO_B4n, (DQ1B)/_/_AG3
IO, DIFFIO_B5pAE7
IO, DIFFIO_B5nAE8
IO, DIFFIO_B6p, (DQS1B/CQ1B#,CDPCLK2)/(DQS1B/CQ1B#,CDPCLK2)/(DQS1B/CQ1B#,CDPCLK2)AD7
IO, DIFFIO_B6nY12
IO, PLL1_CLKOUTpAE5
IO, PLL1_CLKOUTnAF5
IO, DIFFIO_B7p, (DQ1B)/_/_AH3
IO, DIFFIO_B7nW10
IO, (DQ1B)/_/_AF6
IO, VREFB3N2AA12
IO, DIFFIO_B8pAC12
IO, DIFFIO_B8n, (DQ1B)/_/_AH4
IO, DIFFIO_B9pAC10
IO, DIFFIO_B9n, (DQ1B)/_/_AD8
IO, DIFFIO_B10p, (DQ1B)/_/_AG6
IO, DIFFIO_B10nAB13
IO, DIFFIO_B11p, (DQ1B)/_/_AH6
IO, DIFFIO_B11nAA13
IO, DIFFIO_B12p, (DM3B/BWS#3B)/(DM3B1/BWS#3B1)/(DM5B3/BWS#5B3)AB9
IO, DIFFIO_B12n, (DQ3B)/(DQ3B)/(DQ5B)AD10
IO, DIFFIO_B13p, (DQ3B)/(DQ3B)/(DQ5B)AG7
IO, DIFFIO_B13nY13
IO, (DQ3B)/(DQ3B)/(DQ5B)AH7
IO, DIFFIO_B14p, (DQ3B)/(DQ3B)/(DQ5B)AC8
IO, DIFFIO_B14n, (DQ3B)/(DQ3B)/(DQ5B)AA10
IOY14
IO, DIFFIO_B15p, (DQ3B)/(DQ3B)/(DQ5B)AG8
IO, DIFFIO_B15nY15
IO, VREFB3N1AB11
IO, DIFFIO_B16p, (DQS3B/CQ3B#,DPCLK2)/(DQS3B/CQ3B#,DPCLK2)/(DQS3B/CQ3B#,DPCLK2)AE10
IO, DIFFIO_B16n, (DQ3B)/(DQ3B)/(DQ5B)AH8
IO, DIFFIO_B17p, (DQ3B)/(DQ3B)/(DQ5B)AF7
IO, DIFFIO_B17nAH10
IO, DIFFIO_B18p, (DQ3B)/(DQ3B)/(DQ5B)AF9
IO, DIFFIO_B18nAH12
IO, DIFFIO_B19p, (DM5B/BWS#5B)/(DM3B0/BWS#3B0)/(DM5B2/BWS#5B2)AF8
IO, DIFFIO_B19nAF12
IO, DIFFIO_B20p, (DQ5B)/(DQ3B)/(DQ5B)AE9
IO, DIFFIO_B20nAF13
IO, DIFFIO_B21p, (DQ5B)/(DQ3B)/(DQ5B)AF10
IO, DIFFIO_B21n, (DQS5B/CQ5B#,DPCLK3)/(DQS5B/CQ5B#,DPCLK3)/(DQS5B/CQ5B#,DPCLK3)AF11
IO, VREFB3N0AA14
IO, DIFFIO_B22p, (DQ5B)/(DQ3B)/(DQ5B)AG10
IO, DIFFIO_B22n, (DQ5B)/(DQ3B)/(DQ5B)AE12
IO, DIFFIO_B23p, (DQ5B)/(DQ3B)/(DQ5B)AE11
IO, DIFFIO_B23n, (DQ5B)/(DQ3B)/(DQ5B)AG11
IO, DIFFIO_B24p, (DQ5B)/(DQ3B)/(DQ5B)AH11
IO, DIFFIO_B24nAB14
IO, DIFFIO_B25p, (DQ5B)/(DQ3B)/(DQ5B)AE13
IO, DIFFIO_B25nAC14
IO, DIFFIO_B26p, (DQ5B)/(DQ3B)/(DQ5B)AG12
IO, DIFFIO_B26nAD14
IO, DIFFIO_B27pAE14
IO, DIFFIO_B27nAF14
U8CEP3C40F780C8N
BA
NK
4 IO, DIFFIO_B28pAB15
IO, DIFFIO_B28n, (DM4B)/(DM5B1/BWS#5B1)/(DM5B1/BWS#5B1)AC15
IO, DIFFIO_B29pAD15
IO, DIFFIO_B29n, _/(DQ5B)/(DQ5B)AE15
IOAA16
IO, VREFB4N3AA15
IO, DIFFIO_B30p, (DQ4B)/(DQ5B)/(DQ5B)AF15
IO, DIFFIO_B30n, (DQ4B)/(DQ5B)/(DQ5B)AG17
IO, DIFFIO_B31p, (DQ4B)/(DQ5B)/(DQ5B)AH17
IO, DIFFIO_B31nW16
IO, DIFFIO_B32p, (DQ4B)/(DQ5B)/(DQ5B)AF16
IO, DIFFIO_B32n, (DQS4B/CQ5B,DPCLK4)/(DQS4B/CQ5B,DPCLK4)/(DQS4B/CQ5B,DPCLK4)AF17
IO, DIFFIO_B33p, (DQ4B)/(DQ5B)/(DQ5B)AB16
IO, DIFFIO_B33nAE16
IO, DIFFIO_B34p, (DQ4B)/(DQ5B)/(DQ5B)AE17
IO, DIFFIO_B34n, (DQ4B)/(DQ5B)/(DQ5B)AG18
IO, DIFFIO_B35p, (DQ4B)/(DQ5B)/(DQ5B)AH18
IO, DIFFIO_B35n, (DM2B)/(DM5B0/BWS#5B0)/(DM5B0/BWS#5B0)AH19
IO, DIFFIO_B36p, (DQ2B)/(DQ5B)/(DQ5B)AD17
IO, DIFFIO_B36nAF18
IO, (DQS2B/CQ3B,DPCLK5)/(DQS2B/CQ3B,DPCLK5)/(DQS2B/CQ3B,DPCLK5)AE18
IO, VREFB4N2Y17
IO, DIFFIO_B37p, (DQ2B)/(DQ5B)/(DQ5B)AG21
IO, DIFFIO_B37nAC17
IO, DIFFIO_B38p, (DQ2B)/(DQ5B)/(DQ5B)AH21
IO, DIFFIO_B38n, (DQ2B)/(DQ5B)/(DQ5B)AG22
IO, DIFFIO_B39p, (DQ2B)/(DQ5B)/(DQ5B)AH22
IO, DIFFIO_B39nAG19
IO, DIFFIO_B40p, (DQ2B)/(DQ5B)/(DQ5B)AH23
IO, DIFFIO_B40n, (DQ2B)/(DQ5B)/(DQ5B)AE19
IO, DIFFIO_B41p, (DQ2B)/(DQ5B)/(DQ5B)AF24
IO, DIFFIO_B41nAF19
IO, DIFFIO_B42p, (DM0B)/(DQ5B)/(DQ5B)AF25
IO, DIFFIO_B42n, (DQ0B)/_/_AF20
IO, (DQ0B)/_/_AD18
IO, DIFFIO_B43pY19
IO, DIFFIO_B43n, (DQ0B)/_/_AE21
IO, VREFB4N1AC18
IO, DIFFIO_B44pAB18
IO, DIFFIO_B44nAA19
IO, DIFFIO_B45pAD19
IO, DIFFIO_B45nAE20
IO, DIFFIO_B46pAC19
IO, DIFFIO_B46nAB19
IO, RUP2AA17
IO, RDN2AB17
IOAD21
IO, DIFFIO_B47pAF21
IO, DIFFIO_B47n, (DQ0B)/_/_AE25
IO, DIFFIO_B48pAC21
IO, DIFFIO_B48n, (DQS0B/CQ1B,CDPCLK3)/(DQS0B/CQ1B,CDPCLK3)/(DQS0B/CQ1B,CDPCLK3)AF26
IO, DIFFIO_B49pAG25
IO, DIFFIO_B49n, (DQ0B)/_/_AH25
IO, VREFB4N0AB20
IO, DIFFIO_B50pAG23
IO, DIFFIO_B50n, (DQ0B)/_/_AF22
IO, DIFFIO_B51p, (DQ0B)/_/_AE24
IO, DIFFIO_B51n, (DQ0B)/_/_AG26
IO, PLL4_CLKOUTpAE23
IO, PLL4_CLKOUTnAF23
IO, DIFFIO_B52pAD22
IO, DIFFIO_B52nAE22
IO, DIFFIO_B53pAB21
IO, DIFFIO_B53nAC22
IOAH26
U8DEP3C40F780C8N
BA
NK
5 IO, DIFFIO_R56nAA21
IO, DIFFIO_R56pAB22
IO, DIFFIO_R55n, (DM3R/BWS#3R)/(DM3R1/BWS#3R1)/(DM1R3/BWS#1R3)AB24
IO, DIFFIO_R55pAC24
IO, RUP3AA22
IO, RDN3AB23
IOAD25
IO, (DQS3R/CQ3R#,CDPCLK4)/(DQS3R/CQ3R#,CDPCLK4)/(DQS3R/CQ3R#,CDPCLK4)AF27
IO, DIFFIO_R54nAE26
IO, DIFFIO_R54pAE27
IO, DIFFIO_R53nY22
IO, DIFFIO_R53pAD24
IO, VREFB5N3AA24
IO, DIFFIO_R52nAC25
IO, DIFFIO_R52p, (DQ3R)/(DQ3R)/(DQ1R)AD26
IO, DIFFIO_R51n, (DQ3R)/(DQ3R)/(DQ1R)AE28
IO, DIFFIO_R51pAA23
IO, DIFFIO_R50n, (DQ3R)/(DQ3R)/(DQ1R)AD28
IO, DIFFIO_R50pY23
IO, DIFFIO_R49n, (DQ3R)/(DQ3R)/(DQ1R)AD27
IO, DIFFIO_R49pAC26
IO, DIFFIO_R48n, (DQ3R)/(DQ3R)/(DQ1R)Y24
IO, DIFFIO_R48pW22
IO, DIFFIO_R47n, (DQ3R)/(DQ3R)/(DQ1R)AC28
IO, DIFFIO_R47pW21
IO, DIFFIO_R46n, (DQ3R)/(DQ3R)/(DQ1R)AC27
IO, DIFFIO_R46p, (DQ3R)/(DQ3R)/(DQ1R)AB26
IOV26
IO, VREFB5N2U24
IOV22
IO, DIFFIO_R45n, (DQ3R)/(DQ3R)/(DQ1R)AA26
IO, DIFFIO_R45pU26
IO, DIFFIO_R44n, (DM1R/BWS#1R)/(DM3R0/BWS#3R0)/(DM1R2/BWS#1R2)AB28
IO, DIFFIO_R44p, (DQ1R)/(DQ3R)/(DQ1R)AB27
IO, DIFFIO_R43nV21
IO, DIFFIO_R43p, (DQ1R)/(DQ3R)/(DQ1R)Y26
IO, DIFFIO_R42nU20
IO, DIFFIO_R42p, (DQ1R)/(DQ3R)/(DQ1R)W26
IO, DIFFIO_R41n, (DQ1R)/(DQ3R)/(DQ1R)W27
IO, DIFFIO_R41p, (DQ1R)/(DQ3R)/(DQ1R)W28
IO, DIFFIO_R40nAB25
IO, DIFFIO_R40p, (DQ1R)/(DQ3R)/(DQ1R)V28
IO, DIFFIO_R39nAA25
IO, DIFFIO_R39pV27
IO, VREFB5N1U23
IOW25
IO, DIFFIO_R38n, (DQ1R)/(DQ3R)/(DQ1R)V25
IO, DIFFIO_R38pR22
IO, DIFFIO_R37nV24
IO, DIFFIO_R37pU27
IO, DIFFIO_R36nV23
IO, DIFFIO_R36p, (DQ1R)/(DQ3R)/(DQ1R)U28
IO, DIFFIO_R35nY25
IO, DIFFIO_R35pT26
IO, DIFFIO_R34nW20
IO, DIFFIO_R34pU22
IO, DIFFIO_R33nV20
IO, DIFFIO_R33p, (DQS1R/CQ1R#,DPCLK6)/(DQS1R/CQ1R#,DPCLK6)/(DQS1R/CQ1R#,DPCLK6)T25
IO, DIFFIO_R32n, (DEV_OE)T22
IO, DIFFIO_R32p, (DEV_CLRn)T21
IO, DIFFIO_R31n, (DQ1R)/(DQ3R)/(DQ1R)R26
IO, DIFFIO_R31pR25
IO, DIFFIO_R30n, (DM0R)/(DM1R1/BWS#1R1)/(DM1R1/BWS#1R1)R28
IO, DIFFIO_R30pU25
IO, VREFB5N0R24
IO, _/(DQ1R)/(DQ1R)R27
IO, DIFFIO_R29nR23
IO, DIFFIO_R29pR21
IOP21
U8EEP3C40F780C8N
BA
NK
6
IO, DIFFIO_R28nK25
IO, DIFFIO_R28pM24
IO, DIFFIO_R27n, (INIT_DONE)P26
IO, DIFFIO_R27p, (CRC_ERROR)P25
IO, DIFFIO_R26nH26
IO, DIFFIO_R26pL25
IO, VREFB6N3N21
IO, DIFFIO_R25nN25
IO, DIFFIO_R25pG24
IO, DIFFIO_R24n, (nCEO)P28
IO, DIFFIO_R24p, (CLKUSR)P27
IO, DIFFIO_R23n, (DQS0R/CQ1R,DPCLK7)/(DQS0R/CQ1R,DPCLK7)/(DQS0R/CQ1R,DPCLK7)N26
IO, DIFFIO_R23pL22
IO, DIFFIO_R22n, (DQ0R)/(DQ1R)/(DQ1R)M28
IO, DIFFIO_R22pM23
IO, (DQ0R)/(DQ1R)/(DQ1R)M27
IO, DIFFIO_R21nL20
IO, DIFFIO_R21p, (DQ0R)/(DQ1R)/(DQ1R)M26
IO, DIFFIO_R20nK22
IO, DIFFIO_R20pL23
IOJ26
IO, DIFFIO_R19nH25
IO, DIFFIO_R19pK21
IO, VREFB6N2M25
IO, DIFFIO_R18nJ23
IO, DIFFIO_R18p, (DQ0R)/(DQ1R)/(DQ1R)L28
IO, DIFFIO_R17n, (DQ0R)/(DQ1R)/(DQ1R)L27
IO, DIFFIO_R17p, (DQ0R)/(DQ1R)/(DQ1R)L24
IO, DIFFIO_R16nE25
IO, DIFFIO_R16p, (DQ0R)/(DQ1R)/(DQ1R)K28
IO, DIFFIO_R15nF24
IO, DIFFIO_R15p, (DQ0R)/(DQ1R)/(DQ1R)K27
IO, DIFFIO_R14nJ24
IO, DIFFIO_R14p, (DM2R)/(DM1R0/BWS#1R0)/(DM1R0/BWS#1R0)L26
IO, DIFFIO_R13nH23
IO, DIFFIO_R13p, _/(DQ1R)/(DQ1R)J25
IO, DIFFIO_R12n, (nWE), (DQ2R)/(DQ1R)/(DQ1R)G28
IO, DIFFIO_R12p, (nOE), (DQ2R)/(DQ1R)/(DQ1R)G27
IO, DIFFIO_R11nH22
IO, DIFFIO_R11pH24
IO, VREFB6N1M21
IO, DIFFIO_R10nG25
IO, DIFFIO_R10p, (DQ2R)/(DQ1R)/(DQ1R)K26
IO, DIFFIO_R9nG26
IO, DIFFIO_R9pG23
IO, DIFFIO_R8n, (nAVD), (DQ2R)/(DQ1R)/(DQ1R)F28
IO, DIFFIO_R8p, (RDY)F27
IO, DIFFIO_R7n, (PADD23), (DQ2R)/(DQ1R)/(DQ1R)E28
IO, DIFFIO_R7pG22
IO, DIFFIO_R6n, (DQ2R)/(DQ1R)/(DQ1R)E27
IO, DIFFIO_R6pH21
IO, (DQ2R)/(DQ1R)/(DQ1R)F26
IO, DIFFIO_R5n, (PADD22)D28
IO, DIFFIO_R5p, (PADD21), (DQ2R)/(DQ1R)/(DQ1R)D27
IO, DIFFIO_R4n, (PADD20), (DQS2R/CQ3R,CDPCLK5)/(DQS2R/CQ3R,CDPCLK5)/(DQS2R/CQ3R,CDPCLK5)C27
IO, DIFFIO_R4pF25
IO, VREFB6N0J22
IO, DIFFIO_R3nE26
IO, DIFFIO_R3pE24
IO, DIFFIO_R2nD25
IO, DIFFIO_R2pD24
IO, DIFFIO_R1nD26
IO, DIFFIO_R1pC26
U8FEP3C40F780C8N
BA
NK
7
IOG21
IO, DIFFIO_T52n, (DQ0T)/_/_B26
IO, DIFFIO_T52p, (DQ0T)/_/_D22
IO, DIFFIO_T51n, (DQ0T)/_/_E22
IO, DIFFIO_T51pJ19
IO, DIFFIO_T50n, (DQ0T)/_/_A26
IO, DIFFIO_T50pG20
IO, (DQ0T)/_/_B25
IO, DIFFIO_T49nG19
IO, DIFFIO_T49p, (DQS0T/CQ1T,CDPCLK6)/(DQS0T/CQ1T,CDPCLK6)/(DQS0T/CQ1T,CDPCLK6)A25
IO, DIFFIO_T48n, (DQ0T)/_/_F21
IO, DIFFIO_T48p, (DQ0T)/_/_C25
IO, VREFB7N0F22
IO, (DQ0T)/_/_A23
IO, DIFFIO_T47nH19
IO, DIFFIO_T47p, (DM0T)/_/_B23
IO, PLL2_CLKOUTnC23
IO, PLL2_CLKOUTpD23
IO, DIFFIO_T46n, (DQ2T)/(DQ5T)/(DQ5T)C24
IO, DIFFIO_T46pE21
IO, RUP4F19
IO, RDN4E19
IO, (DQ2T)/(DQ5T)/(DQ5T)C22
IO, DIFFIO_T45n, (DQ2T)/(DQ5T)/(DQ5T)D21
IO, DIFFIO_T45p, (PADD0)B22
IO, VREFB7N1F18
IO, DIFFIO_T44n, (DQ2T)/(DQ5T)/(DQ5T)C21
IO, DIFFIO_T44pD19
IO, DIFFIO_T43n, (DQ2T)/(DQ5T)/(DQ5T)A22
IO, DIFFIO_T43p, (DQ2T)/(DQ5T)/(DQ5T)A21
IO, DIFFIO_T42n, (DQ2T)/(DQ5T)/(DQ5T)B21
IO, DIFFIO_T42p, (DQ2T)/(DQ5T)/(DQ5T)E18
IO, DIFFIO_T41n, (PADD1), _/(DQ5T)/(DQ5T)C18
IO, DIFFIO_T41p, (PADD2)D18
IO, DIFFIO_T40n, (DM2T)/(DM5T0/BWS#5T0)/(DM5T0/BWS#5T0)C20
IO, DIFFIO_T40pH17
IO, VREFB7N2G17
IO, DIFFIO_T39n, (DQ4T)/(DQ5T)/(DQ5T)D20
IO, DIFFIO_T39p, (DQ4T)/(DQ5T)/(DQ5T)C19
IO, DIFFIO_T38n, (PADD3), (DQ4T)/(DQ5T)/(DQ5T)C17
IO, DIFFIO_T38pG18
IOH15
IO, DIFFIO_T37nF17
IO, DIFFIO_T37p, (PADD4), (DQS2T/CQ3T,DPCLK8)/(DQS2T/CQ3T,DPCLK8)/(DQS2T/CQ3T,DPCLK8)D17
IO, DIFFIO_T36n, (PADD5), (DQ4T)/(DQ5T)/(DQ5T)A19
IO, DIFFIO_T36p, (PADD6), (DQ4T)/(DQ5T)/(DQ5T)B19
IO, DIFFIO_T35n, (PADD7)A18
IO, DIFFIO_T35p, (PADD8), (DQ4T)/(DQ5T)/(DQ5T)B18
IO, DIFFIO_T34n, (DQ4T)/(DQ5T)/(DQ5T)E17
IO, DIFFIO_T34pJ16
IO, DIFFIO_T33nJ17
IO, DIFFIO_T33pH16
IO, DIFFIO_T32nG16
IO, DIFFIO_T32pF15
IO, VREFB7N3G15
IO, DIFFIO_T31n, (PADD9), (DQ4T)/(DQ5T)/(DQ5T)C16
IO, DIFFIO_T31p, (PADD10)D16
IO, DIFFIO_T30nH14
IO, DIFFIO_T30pK15
IO, DIFFIO_T29n, (PADD11), _/(DQ5T)/(DQ5T)A17
IO, DIFFIO_T29p, (PADD12), (DQS4T/CQ5T,DPCLK9)/(DQS4T/CQ5T,DPCLK9)/(DQS4T/CQ5T,DPCLK9)B17
IO, DIFFIO_T28n, (DM4T)/(DM5T1/BWS#5T1)/(DM5T1/BWS#5T1)E15
IO, DIFFIO_T28pJ14
IO, DIFFIO_T27n, (PADD13)C15
IO, DIFFIO_T27p, (PADD14), (DQ5T)/(DQ3T)/(DQ5T)D15
U8GEP3C40F780C8N
BA
NK
8
IO, DIFFIO_T26n, (DQ5T)/(DQ3T)/(DQ5T)C13
IO, DIFFIO_T26p, (DQ5T)/(DQ3T)/(DQ5T)D13
IO, DIFFIO_T25n, (DQ5T)/(DQ3T)/(DQ5T)C14
IO, DIFFIO_T25p, (PADD15)D14
IO, DIFFIO_T24n, (PADD16), (DQ5T)/(DQ3T)/(DQ5T)C12
IO, DIFFIO_T24p, (PADD17), (DQS5T/CQ5T#,DPCLK10)/(DQS5T/CQ5T#,DPCLK10)/(DQS5T/CQ5T#,DPCLK10)D12
IO, DIFFIO_T23n, (DQ5T)/(DQ3T)/(DQ5T)A12
IO, DIFFIO_T23pB12
IO, VREFB8N0G14
IO, DIFFIO_T22nK13
IO, DIFFIO_T22pF14
IO, (DQ5T)/(DQ3T)/(DQ5T)E14
IO, DIFFIO_T21nH12
IO, DIFFIO_T21pJ12
IO, DIFFIO_T20n, (DATA2), (DQ5T)/(DQ3T)/(DQ5T)A11
IO, DIFFIO_T20p, (DATA3), (DQ5T)/(DQ3T)/(DQ5T)B11
IO, DIFFIO_T19n, (PADD18)A10
IO, DIFFIO_T19p, (DATA4), (DM5T/BWS#5T)/(DM3T0/BWS#3T0)/(DM5T2/BWS#5T2)B10
IO, DIFFIO_T18n, (PADD19)G13
IO, DIFFIO_T18p, (DATA15), (DQ3T)/(DQ3T)/(DQ5T)H13
IO, DIFFIO_T17nB8
IO, DIFFIO_T17p, (DQ3T)/(DQ3T)/(DQ5T)C10
IOD11
IO, VREFB8N1F11
IO, DIFFIO_T16n, (DATA14), (DQS3T/CQ3T#,DPCLK11)/(DQS3T/CQ3T#,DPCLK11)/(DQS3T/CQ3T#,DPCLK11)E12
IO, DIFFIO_T16p, (DATA13)F12
IO, DIFFIO_T15n, (DQ3T)/(DQ3T)/(DQ5T)D10
IO, DIFFIO_T15pF10
IO, DIFFIO_T14n, (DQ3T)/(DQ3T)/(DQ5T)E11
IO, DIFFIO_T14pE8
IO, DIFFIO_T13nE10
IO, DIFFIO_T13pE7
IO, DIFFIO_T12n, (DQ3T)/(DQ3T)/(DQ5T)A7
IO, DIFFIO_T12pG10
IO, DIFFIO_T11nG11
IO, DIFFIO_T11p, (DATA5), (DQ3T)/(DQ3T)/(DQ5T)B7
IO, DIFFIO_T10nB3
IO, DIFFIO_T10pJ10
IO, DIFFIO_T9nF8
IO, DIFFIO_T9pF7
IO, VREFB8N2G12
IO, DIFFIO_T8nA6
IO, DIFFIO_T8p, (DATA6), (DQ3T)/(DQ3T)/(DQ5T)B6
IO, DIFFIO_T7n, (DATA7), (DQ3T)/(DQ3T)/(DQ5T)C11
IO, DIFFIO_T7pH10
IOG8
IO, DIFFIO_T6n, (DQ3T)/(DQ3T)/(DQ5T)C9
IO, DIFFIO_T6p, (DATA8)D9
IO, DIFFIO_T5n, (DATA9), (DM3T/BWS#3T)/(DM3T1/BWS#3T1)/(DM5T3/BWS#5T3)A8
IO, DIFFIO_T5p, (DQ1T)/_/_C8
IO, (DQ1T)/_/_D8
IO, DIFFIO_T4n, (DATA10), (DQ1T)/_/_C7
IO, DIFFIO_T4p, (DATA11)D7
IO, VREFB8N3G9
IO, (DQ1T)/_/_D6
IO, DIFFIO_T3n, (DQ1T)/_/_A4
IO, DIFFIO_T3p, (DATA12), (DQS1T/CQ1T#,CDPCLK7)/(DQS1T/CQ1T#,CDPCLK7)/(DQS1T/CQ1T#,CDPCLK7)B4
IO, DIFFIO_T2n, (DQ1T)/_/_A3
IO, DIFFIO_T2p, (DQ1T)/_/_C6
IO, DIFFIO_T1nH8
IO, DIFFIO_T1p, (DQ1T)/_/_C4
IO, (DM1T)/_/_D4
IO, PLL3_CLKOUTnC5
IO, PLL3_CLKOUTpD5
IOC3
U8HEP3C40F780C8N
TMS
CONF_DONE
DCLK
TCK
nSTATUS
TDI
nCONFIG
TDO
U_FPGA_PowerFPGA_NonIO.SchDoc
CLK0, DIFFCLK_0pJ2
CLK1, DIFFCLK_0nJ1
CLK2, DIFFCLK_1pY2
CLK3, DIFFCLK_1nY1
CLK15, DIFFCLK_6pAG14
CLK14, DIFFCLK_6nAH14
CLK13, DIFFCLK_7pAG15
CLK12, DIFFCLK_7nAH15
CLK7, DIFFCLK_3nY28
CLK6, DIFFCLK_3pY27
CLK5, DIFFCLK_2nJ28
CLK4, DIFFCLK_2pJ27
CLK8, DIFFCLK_5nA15
CLK9, DIFFCLK_5pB15
CLK10, DIFFCLK_4nA14
CLK11, DIFFCLK_4pB14
U8I
EP3C40F780C8N
PLL1
PLL2
PLL3
PLL4
FPGA_CLKDAU_FPGA_CLK1
REF_CLKb
DAU_FPGA_CLK1
REF_CLKa
FPGA_CLK
AVOID PIN
AVOID PIN
FPGA_DONE
E_CRS
VGA_RED0
RELAY3
SRAM2_D12
SRAM2_D14
BUZZER
TFT_DB17
USB_FLAGB
USB_FLAGA
EXTEND_A11
DIP3
DIP0
BUS_NOE
EXTEND_A3
LED2_G
EXTEND_A13
EXTEND_A1
ISP176X_RST
P1_PWM
VGA_RED1
VGA_BLUE4
BUS_A19
SRAM1_D13
RELAY0
VGA_RED4
RELAY1
VGA_HSYNC
BUS_A3
BUS_A5
BUS_A18
BUS_A6
SRAM2_D2
VGA_GREEN0
CODECSPI_CLK
SRAM2_A17
BUS_FLASH_NBUSY
SRAM1_NOE
SRAM2_D11
E_TXD1
E_RESETB_E
SRAM1_A1
ADC_DIN
E_TXEN
E_TXD0
E_TXD3
VGA_BLUE6
CODECI2S_MCLK
SRAM1_NBHE
SRAM2_D1
SRAM1_D6
SRAM1_D8
IO24
E_RXD3E_TXD2
VGA_VSYNC
SRAM2_A16
SRAM1_D7
IO22
IO20
VGA_BLUE2
SRAM2_D0
SRAM1_A14
BUS_A7
SRAM1_NWE
SRAM1_A6
IO4
SRAM2_A11
BUS_A10
IO26
BUS_D30BUS_D1
BUS_D4
BUS_D3
SDA
EXTEND_A33
BUS_D26
BUS_D5
SRAM1_A4
BUS_NBE1
TFT_TSC_DIN
SRAM2_A2
SRAM2_NBLE
SRAM2_D13
SRAM2_NOE
SRAM2_NBHE
SRAM1_D2
E_RXDV
E_MDIO SRAM1_A3
SRAM1_NCS
SRAM2_D3
USB_WR_N
EXTEND_A18
485_RX_EN
P3_PWM
VGA_CLK
MIDI_RX
P2_PWM
E_RXD0
RS232_RTS
ADC_CS
RS232_RX
NC1NC2
NC3
NC4
NC5
NC6
NC7
VGA_GREEN1
BUS_A4
SW4
EXTEND_A45
EXTEND_A40
IO35SPAREIO1
SPAREIO2
EXTEND_A0
TFT_DB2
IR38KRXUSB_D3
TFT_DB13
BUS_SDRAM_NCS
TFT_TSC_DOUT
LED6_G
LED5_G
LED6_B
BUS_D21
SW2EXTEND_A29
EXTEND_A28
EXTEND_A39
EXTEND_A16
SW3
EXTEND_A41
CODECI2S_DIN
SPAREIO3
EXTEND_A8
SPAREIO4
BUS_ISP176X_NCS
IR38KTX
TFT_TSC_CLK
TFT_DB15
TFT_TSC_IRQ_N
LED5_B
USB_RD_N
LED4_B
LED4_R
LED5_R
BUS_D23
DAU_SPI_DOUT
BUS_D22
EXTEND_A27
EXTEND_A22
EXTEND_A30
DIP7
DIP6
LED2_R
DIP1
LED3_G
SDPROTECT
USB_FIFOADR0
USB_FIFOADR2
NEXUS_TDO
TFT_DB10
BUS_SDRAM_NRAS
USB_FIFOADR1
BUS_SDRAM_NCAS
BUS_NBE2
LED7_G
EXTEND_A26
SCL
EXTEND_A31
EXTEND_A38
EXTEND_A15
KBDATA
LED2_B
LED3_B
BUS_A17
SDDETECT
TFT_DB1
USB_SLOE
NEXUS_TDI
USB_FLAGC
SDDAT0
LED4_G
LED7_B
TFT_TSC_CS_N
EXTEND_A14
EXTEND_A24
EXTEND_A23
EXTEND_A21
CODECI2S_DOUT
KBCLOCK
DIP5
MOUSECLOCK
DIP2
TFT_DB7
SDCLK
DAU_SPI_CLK
USB_IFCLK
USB_VBUS
TFT_DB12
NEXUS_TMS
DAU_SPI_SEL
BUS_A12BUS_A15
USB_D4
EXTEND_A10
EXTEND_A20
SPDIF_IN
EXTEND_A17
EXTEND_A9
EXTEND_A7
EXTEND_A2
BUS_ISP176X_DACK
CODECI2S_WCLK
TFT_DB0
BUS_ISP176X_NIRQBUS_A1
TFT_DB16
USB_D0
TFT_RS
TFT_DB14
TFT_RD
TFT_WR
USB_INT_N
SDDAT1
TFT_BLIGHT
DAU_SPI_MODE
EXTEND_A19
CODECSPI_DOUT
EXTEND_A12
EXTEND_A6
DIP4
DAU_RESET_SW
TFT_DB3
TFT_CS
USB_D2
USB_D6
USB_FLAGD_CS_N
DAU_SPI_DIN
USB_RESET_N
TFT_DB4
SPDIF_OUT
EXTEND_A5
EXTEND_A4
TFT_DB6
TFT_DB5BUS_ISP176X_DREQ
USB_D5
USB_D7
USB_PKTEND
BUS_A16
TFT_DB11
E_RXER
RELAY2
E_MDC
485_TXD
VGA_GREEN3
VGA_RED7
BUS_A2
DAC_CLK
SRAM1_A15
SRAM1_D4
BUS_FLASH_NCS
E_RXD1
RS232_TX
MIDI_TX
VGA_GREEN4
VGA_GREEN2
VGA_BLUE5
BUS_SRAM_NCS
SRAM1_A2
SRAM1_NBLE
SRAM1_D15
SRAM1_D0
SRAM1_D14
SRAM1_D10
SRAM2_D10
SRAM1_D11
SRAM2_D7
E_RXD2
VGA_GREEN7
VGA_GREEN5
485_RXDVGA_BLUE7
SRAM1_A17
SRAM2_A0
SRAM2_A15
SRAM2_A3
SRAM2_D15
SRAM1_D1
SRAM2_D5
SRAM2_D6
SRAM1_D9
DAC_CS
VGA_GREEN6
P0_PWM
VGA_RED2
VGA_BLUE1
ADC_CLK
SRAM1_D3
SRAM2_A1
SRAM2_A4
SRAM2_D9
SRAM2_D8BUS_D24
BUS_NWE
VGA_RED5
VGA_RED6
SRAM1_D12
VGA_BLUE3
SRAM1_A0
E_RXC
SRAM1_D5
BUS_D7
SRAM1_A18
SRAM1_A7
485_TX_EN
VGA_RED3
VGA_BLUE0
SRAM1_A16
SRAM1_A12
BUS_A21
BUS_A8
E_COLIO18
E_TXC
SRAM2_NCS
SRAM2_A5
SRAM1_A13
BUS_A20
RS232_CTS
IO27
DAC_DINIO25
IO21
CODECI2S_BCLK
SRAM1_A5
BUS_A9
BUS_D8
BUS_A14
IO12
IO19
ADC_DOUTIO14
IO16
IO23
IO6IO10
SRAM1_A11
SRAM2_A18
SRAM2_A14
BUS_A11
SRAM2_A8
BUS_A13
IO13IO17
SW0
IO8
IO11IO2
IO15
SRAM2_NWE
BUS_A22
SRAM2_A12
SRAM2_A6
SRAM1_A8
BUS_A24
SRAM2_A10
IO5
IO0
SRAM2_A13
BUS_D0
IO29
BUS_FLASH_NRESET
BUS_D31BUS_D15
BUS_D14
BUS_D2
IO31LED0_R
LED0_B
IO3
IO7
IO1
SRAM2_A7
SRAM1_A10
BUS_D11
BUS_D12USB_READY
BUS_D16
LED1_G
EXTEND_A47
IO9
BUS_D13
BUS_A23
BUS_D17
LED0_G
ONE_WIRE_DB_PBEXTEND_A48
IO30
IO33
IO28
EXTEND_A46EXTEND_A43
SRAM2_A9
BUS_D29
BUS_D18
BUS_D10
SRAM1_A9
EXTEND_A44
EXTEND_A37LED1_B
IO34
EXTEND_A49
IO32
BUS_D27
BUS_D28
BUS_NBE3
BUS_D19
BUS_D9
SW1
EXTEND_A42
EXTEND_A36
CODECSPI_CS
EXTEND_A32
LED1_R
EXTEND_A34
SDDAT2
BUS_NBE0
BUS_D25
LED6_RBUS_D20
TFT_TSC_BUSY
EXTEND_A35
CODECSPI_DINEXTEND_A25
MOUSEDATA
SDDAT3
LED3_R
SDCMD
TFT_RESET
USB_D1
LED7_R
BUS_SDRAM_CKE
BUS_D6
SRAM2_D4
FPGA_ID2
FPGA_ID = 0x1 (Altera)
HOST_SPARE1
HOST_SPARE1
CLK
CS_NDIN
DOUTBUSY
TFT_INT
TFT_TSC
REF1
CLK22
CLK13
GND4
CLK35
VDD6
CLK47
CLKOUT8
U70
CY2305 Zero-delay Buffer
3V3
GND
DB_REF_CLK
R213
5R6 1%
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
R3145R6 1%
REF_CLKb
R14
27R 1%
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
*
02
9/22/2011 10:42:15 PMHost_FPGA.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A2
Sheet Title Host Controller - Altera - EP3C10
Assy:
*
NB3000AL - ALTERA
TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
FLASH2_CS_NDIN
DOUTSCLK
FLASH1_CS_N
SERIALFLASH
TMSTDO
TDITCK
TMSTDO
TDITCK
HARD
SOFT
HARDSOFT_JTAG
DAT[3..0]CMDCLK
DETECTPROTECT
SDTMS
TDO
TDI
TCK
TMS
TDOTDI
TCK
HARD
SOFT
HARDSOFT_JTAG
FPGA_TDIFPGA_TCKFPGA_TMSFPGA_TDO
NEXUS_TMSNEXUS_TDO
NEXUS_TDINEXUS_TCK
CLKOE
USER FPGA JTAG HOST USB SRAM - 64K/256K x 16
HOSTUSB
HOST_SOFT_TDI
HOST_SOFT_TMS
HOST_SOFT_TDO
HOST_SOFT_TCK
REF_CLKFPGA_CLK
HOST JTAG
HOST_JTAG
HOST_HARD_TDIHOST_HARD_TMS
HOST_HARD_TDOHOST_HARD_TCK
ONE WIRE ID
USERFLASH_DOUT
USERFLASH1_CS_N
USERFLASH2_CS_N
CLKGEN_CS_N
RTC_CS
RTC_DOUT
USERFLASH_SCLK
CLKGEN_SCLK
RTC_SCLK
USERFLASH_DIN
CLKGEN_DIN
RTC_DIN
SD_DAT[3..0]SD_CMDSD_CLKSD_DETECTSD_PROTECT
SD
DB_JTAG
SYSTEM CLOCKS
FLASH_USER
HOST RTC
FLASH_BOOT_CLKFLASH_BOOT_DIN
USER 8MB SPI FLASH x2
SYSBOOT
LED1_GREENLED1_BLUE
LED1_RED
LED2_GREENLED2_BLUE
LED2_RED
Host LEDsHOST SD CARD
HOST AUDIO - Delta-Sigma
USER FPGA PROGRAM
USER FPGA SPI
USER FPGA CLOCKS
TMSTCK
TDI
TDO
DCLK
HOST_NonIOHost_FPGA_NonIO.SchDoc
LR
STEREO
AOUT_RAOUT_L
HOST_AUDIO
CS_N
DINDOUT
INT_N
SCLK
CLKOUTCLKOE
RTC
RTC
CLKOUTRTC_INT_N
FPGA_CCLK
FPGA_DINFPGA_DONE
FPGA_ID[3..0]
FPGA_INITFPGA_M[2..0]
FPGA_PROG_CLKFPGA_PROG_PWR_ON
FPGA_PROGRAM
DINDONE
INSTALLEDID[3..0]
CCLKPROGRAM
M[2..0]INIT
PROG_PWR_ONPROG_CLK
DAU_CTRL
DB_PROGRAM
R1_HOST5R6 1%
DATAEXT_PROG
1W
1WID
CLK_FIXEDCLK_PROG
CS_NDIN
SCLK
CLK_PLL
CLK_PLL
A[18..0]D[15..0]
NCSNWENOE
NBHENBLE
SRAM-256Kx16SRAM_A[18..0]SRAM_D[15..0]
SRAM_NWESRAM_NOE
SRAM_NCS
SRAM_NBHE
SRAM
SRAM_NBLE
GREENRED
BLUE
RGB_LED
LED1
GREENRED
BLUE
RGB_LED
LED2
REF_CLKFPGA_CLK
FPGA_CLK1
DB_CLOCKSREF_CLKFPGA_CLK
DB_CLK1DB_CLOCKS
MODESEL
CLKDIN
DOUT
DB_SPIDAU_SPI_CLK
DAU_SPI_DINDAU_SPI_DOUT
DAU_SPI_MODEDAU_SPI_SEL
DB_SPI
PLATFORM UPGRADE
HARD
SOFT
DETECT
TDITDOTCKTMS
TDITDOTCKTMS
ENCLK[2..0]
IDPIO[1..2]
ONE_WIRE_PB_ID_AONE_WIRE_PIOA[1..2]
PB_SPAREA[1..4]
CLK_ENACLK_EXTA[2..0]
EXTSPI_CSA_N[1..0]
AUTO_TDI_HARDAUTO_TDO_HARD
AUTO_TMS_HARDAUTO_TCK_HARD
AUTO_TDI_SOFTAUTO_TDO_SOFTAUTO_TCK_SOFTAUTO_TMS_SOFT
AUTO_JTAG
JTAG
CLK
1W
SPI_CS_N[1..0]SPARE[1..4]
PBCTRL
PB_A
PB - Control
DOUTDIN
SCLK
EXTSPI
EXTSPI_SCLK
EXTSPI_DOUTEXTSPI_DIN
EXTSPIDIN
DOUT
SCLK
FLASH_CS_N
SERFLASH
FLASH_BOOT
GOLDEN
FLASH_GOLD_CS_N
DINDOUT
SCLK
FLASH_CS_N
SERFLASH
FLASH_GOLDEN
READYINT_N
SLOEFIFOADR2FIFOADR0FIFOADR1
PKTENDFLAGD_CS_N
FLAGAFLAGBFLAGC
WR_NRD_N
D[15..0]RESET_N
IFCLKXTALIN
VBUS
XTALOUT
USB_INTF
USB2
HUSB_WR_NHUSB_RD_NHUSB_D[15..0]HUSB_RESET_N
HUSB_READYHUSB_INT_N
HUSB_SLOEHUSB_FIFOADR2HUSB_FIFOADR0HUSB_FIFOADR1HUSB_PKTEND
HUSB_FLAGAHUSB_FLAGBHUSB_FLAGC
HUSB_IFCLK
HUSB_VBUS
HUSB_FLAGD_CS_N
R1
4K7 1%3V3
R2
4K7 1%R327R 1%
GND
3V3
PB SPI
1V2
3V3
HOST_DECOUPLING_CAPS_1V2FPGA_Bypass_1V2.SCHDOC
HOST_DECOUPLING_CAPS_3V3FPGA_Bypass_3V3.SCHDOC
USB_XTALINUSB_XTALOUT
3V3
3V3
R269330R 1%
R2702K2 1%
R2711K 1%
DIAG_DOUT
DIAG_CLKDIAG_DIN
DIAG_CS_N
DINDOUT
SCLK
FLASH_CS_N
DIAGCOMMS
DIAGCOMMS
3V3DIAG_CS_N
R99
4K7 1%
ONE_WIRE_ID
BA
NK
1
IOD4
IOE5
IOF5
IO, (DQS2L/CQ3L)/(DQS2L/CQ3L)B1
IO, DIFFIO_L1pC2
IO, DIFFIO_L1n, (DATA1, ASDO)C1
IO, VREFB1N0F3
IO, DIFFIO_L2p, (FLASH_nCE, nCSO)D2
IO, DIFFIO_L2nD1
IOG5
IO, DIFFIO_L3pF2
IO, DIFFIO_L3nF1
IO, DIFFIO_L4p, (DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0)G2
IO, DIFFIO_L4nG1
IO, (DATA0)H2
U30A
EP3C10F256C8
BA
NK
2
IO, DIFFIO_L5p, (DQ1L)/_J2
IO, DIFFIO_L5n, (DQ1L)/_J1
IOJ6
IO, DIFFIO_L6pK6
IO, DIFFIO_L6nL6
IO, DIFFIO_L7pK2
IO, DIFFIO_L7n, (DQ1L)/_K1
IO, DIFFIO_L8p, (DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1)L2
IO, DIFFIO_L8n, (DQ1L)/_L1
IO, VREFB2N0L3
IO, DIFFIO_L9p, (DQ1L)/_N2
IO, DIFFIO_L9n, (DQ1L)/_N1
IO, RUP1, (DQ1L)/_K5
IO, RDN1, (DQ1L)/_L4
IO, (DQS3L/CQ3L#)/(DQS3L/CQ3L#)R1
IO, DIFFIO_L10p, (DQ1L)/_P2
IO, DIFFIO_L10n, (DM1L/BWS#1L)/_P1
U30B
EP3C10F256C8
BA
NK
3
IO, DIFFIO_B1pN3
IO, DIFFIO_B1n, (DM3B/BWS#3B)/(DM5B1/BWS#5B1)P3
IO, DIFFIO_B2p, (DQ3B)/(DQ5B)R3
IO, DIFFIO_B2nT3
IO, (DQS1B/CQ1B#,DPCLK2)/(DQS1B/CQ1B#,DPCLK2)T2
IO, PLL1_CLKOUTpR4
IO, PLL1_CLKOUTnT4
IO, DIFFIO_B4p, (DQ3B)/(DQ5B)N5
IO, DIFFIO_B4n, (DQ3B)/(DQ5B)N6
IO, (DQ3B)/(DQ5B)M6
IO, VREFB3N0P6
IO, DIFFIO_B5p, (DQS3B/CQ3B#)/(DQS3B/CQ3B#)M7
IO, DIFFIO_B5nK8
IO, DIFFIO_B6p, (DQ3B)/(DQ5B)R5
IO, DIFFIO_B6nT5
IO, DIFFIO_B7p, (DQ3B)/(DQ5B)R6
IO, DIFFIO_B7nT6
IO, (DQ3B)/(DQ5B)L7
IO, DIFFIO_B8p, (DQ3B)/(DQ5B)R7
IO, DIFFIO_B8n, (DQS5B/CQ5B#)/(DQS5B/CQ5B#)T7
IO, DIFFIO_B9p, (DQ3B)/(DQ5B)L8
IO, DIFFIO_B9n, (DM5B/BWS#5B)/(DM5B0/BWS#5B0)M8
IO, DIFFIO_B10p, (DQ5B)/(DQ5B)N8
IO, DIFFIO_B10n, (DQ5B)/(DQ5B)P8
IO, DIFFIO_B11pR8
IO, DIFFIO_B11nT8
U30C
EP3C10F256C8
BA
NK
4IO, DIFFIO_B12p
R9
IO, DIFFIO_B12nT9
IO, DIFFIO_B13pK9
IO, DIFFIO_B13nL9
IO, DIFFIO_B14pM9
IO, DIFFIO_B14n, (DQ5B)/(DQ5B)N9
IO, DIFFIO_B15p, (DQ5B)/(DQ5B)R10
IO, DIFFIO_B15n, (DQS4B/CQ5B)/(DQS4B/CQ5B)T10
IO, DIFFIO_B16p, (DQ5B)/(DQ5B)R11
IO, DIFFIO_B16nT11
IO, DIFFIO_B17p, (DQ5B)/(DQ5B)R12
IO, DIFFIO_B17n, (DQ5B)/(DQ5B)T12
IO, DIFFIO_B18pK10
IO, DIFFIO_B18nL10
IO, (DQS2B/CQ3B)/(DQS2B/CQ3B)P9
IO, VREFB4N0P11
IO, DIFFIO_B19pR13
IO, DIFFIO_B19n, (DQ5B)/(DQ5B)T13
IO, RUP2M10
IO, RDN2N11
IO, DIFFIO_B20p, (DQ5B)/(DQ5B)T14
IO, DIFFIO_B20n, (DQS0B/CQ1B,DPCLK3)/(DQS0B/CQ1B,DPCLK3)T15
IOR14
IO, DIFFIO_B21pP14
IO, DIFFIO_B21nL11
IO, DIFFIO_B22pM11
IO, DIFFIO_B22nN12
U30D
EP3C10F256C8
BA
NK
5
ION13
IOM12
IOL12
IOK12
IO, RUP3, (DM1R/BWS#1R)/_N14
IO, RDN3, (DQ1R)/_P15
IO, DIFFIO_R11n, (DQS3R/CQ3R#)/(DQS3R/CQ3R#)P16
IO, DIFFIO_R11p, (DQ1R)/_R16
IOK11
IO, DIFFIO_R10n, (DQ1R)/_N16
IO, DIFFIO_R10p, (DQ1R)/_N15
IO, VREFB5N0L14
IO, (DQ1R)/_L13
IO, DIFFIO_R9n, (DQ1R)/_L16
IO, DIFFIO_R9pL15
IOJ11
IO, DIFFIO_R8n, (DQ1R)/_K16
IO, DIFFIO_R8p, (DQS1R/CQ1R#,DPCLK4)/(DQS1R/CQ1R#,DPCLK4)K15
IO, DIFFIO_R7n, (DEV_OE)J16
IO, DIFFIO_R7p, (DEV_CLRn)J15
IO, DIFFIO_R6n, (DQ1R)/_J14
IO, DIFFIO_R6pJ12
IO, (DQ1R)/_J13
U30E
EP3C10F256C8
BA
NK
6
IO, DIFFIO_R5nH16
IO, DIFFIO_R5pH15
IO, DIFFIO_R4n, (INIT_DONE)G16
IO, DIFFIO_R4p, (CRC_ERROR)G15
IOF13
IO, DIFFIO_R3n, (nCEO)F16
IO, DIFFIO_R3p, (CLKUSR)F15
IO, (DQS0R/CQ1R,DPCLK5)/(DQS0R/CQ1R,DPCLK5)B16
IO, VREFB6N0F14
IO, DIFFIO_R2nD16
IO, DIFFIO_R2pD15
IOG11
IO, DIFFIO_R1n, (DQS2R/CQ3R)/(DQS2R/CQ3R)C16
IO, DIFFIO_R1pC15
U30F
EP3C10F256C8
BA
NK
7
IO, DIFFIO_T21nC14
IO, DIFFIO_T21p, (DQ5T)/(DQ5T)D14
IO, DIFFIO_T20nD11
IO, DIFFIO_T20p, (DQS0T/CQ1T,DPCLK6)/(DQS0T/CQ1T,DPCLK6)D12
IO, DIFFIO_T19nA13
IO, DIFFIO_T19p, (DQ5T)/(DQ5T)B13
IO, PLL2_CLKOUTnA14
IO, PLL2_CLKOUTpB14
IO, RUP4E11
IO, RDN4E10
IO, DIFFIO_T18n, (DQ5T)/(DQ5T)A12
IO, DIFFIO_T18p, (DQ5T)/(DQ5T)B12
IO, DIFFIO_T17n, (DQ5T)/(DQ5T)A11
IO, DIFFIO_T17p, (DQ5T)/(DQ5T)B11
IO, VREFB7N0C11
IO, DIFFIO_T16nF10
IO, DIFFIO_T16p, (DQS2T/CQ3T)/(DQS2T/CQ3T)F9
IO, DIFFIO_T15nF11
IO, DIFFIO_T15pA15
IO, DIFFIO_T14n, (DQ5T)/(DQ5T)A10
IO, DIFFIO_T14p, (DQ5T)/(DQ5T)B10
IO, DIFFIO_T13n, (DQ5T)/(DQ5T)C9
IO, DIFFIO_T13p, (DM5T/BWS#5T)/(DM5T0/BWS#5T0)D9
IO, (DQS4T/CQ5T)/(DQS4T/CQ5T)E9
IO, DIFFIO_T12nA9
IO, DIFFIO_T12pB9
U30G
EP3C10F256C8
BA
NK
8
IO, DIFFIO_T11nA8
IO, DIFFIO_T11pB8
IO, (DQS5T/CQ5T#)/(DQS5T/CQ5T#)C8
IO, (DQ3T)/(DQ5T)D8
IO, DIFFIO_T10n, (DATA2), (DQ3T)/(DQ5T)E8
IO, DIFFIO_T10p, (DATA3)F8
IO, DIFFIO_T9n, (DQ3T)/(DQ5T)A7
IO, DIFFIO_T9p, (DATA4), (DQ3T)/(DQ5T)B7
IO, DIFFIO_T8nF6
IO, DIFFIO_T8pF7
IO, VREFB8N0C6
IO, DIFFIO_T7n, (DQS3T/CQ3T#)/(DQS3T/CQ3T#)A6
IO, DIFFIO_T7p, (DQ3T)/(DQ5T)B6
IO, (DATA5), (DQ3T)/(DQ5T)E7
IO, (DATA6), (DQ3T)/(DQ5T)E6
IO, (DATA7), (DQ3T)/(DQ5T)A5
IO, DIFFIO_T5nA2
IO, DIFFIO_T5p, (DQ3T)/(DQ5T)B5
IO, DIFFIO_T4n, (DM3T/BWS#3T)/(DM5T1/BWS#5T1)A4
IO, DIFFIO_T4pB4
IO, DIFFIO_T3nD5
IO, DIFFIO_T3pD6
IO, DIFFIO_T2nA3
IO, DIFFIO_T2p, (DQS1T/CQ1T#,DPCLK7)/(DQS1T/CQ1T#,DPCLK7)B3
IO, DIFFIO_T1nC3
IO, DIFFIO_T1pD3
U30H
EP3C10F256C8
CLK0, DIFFCLK_0pE2
CLK1, DIFFCLK_0nE1
CLK2, DIFFCLK_1pM2
CLK3, DIFFCLK_1nM1
CLK7, DIFFCLK_3nM16
CLK6, DIFFCLK_3pM15
CLK5, DIFFCLK_2nE16
CLK4, DIFFCLK_2pE15
U30I
EP3C10F256C8
FPGA_CLK
DAU_SPI_DIN
FPGA_DONE
FLASH_GOLD_CS_N
HUSB_D14
HUSB_RD_N
HUSB_D9
HUSB_D7
HUSB_D13
HUSB_D2
HUSB_D10
SRAM_D4
SRAM_A2
SRAM_D0
LED2_BLUE
FPGA_DIN
FPGA_ID3
NEXUS_TDO
FPGA_TCK
HUSB_FLAGD_CS_N
HUSB_PKTEND
DAU_SPI_MODE
HOST_SOFT_TDO
HUSB_FLAGA
HUSB_VBUS
SRAM_A1
SRAM_NOE
LED2_RED
HUSB_RESET_N
HUSB_D11
HUSB_INT_N
HUSB_IFCLK
SRAM_D6
SRAM_D14SRAM_NWE
RTC_DIN
LED1_GREEN
AUTO_TDO_HARD
FPGA_ID1
DAU_SPI_SELFPGA_INIT
HUSB_D8
HUSB_FIFOADR2
HUSB_D3SRAM_A0
SRAM_NBHE
SRAM_D11
NEXUS_TMS
DAU_SPI_DOUTDAU_SPI_CLK
HUSB_FIFOADR0
HUSB_FLAGC
HUSB_FLAGB
AUTO_TDI_HARDAOUT_R
CLKOE
LED1_RED
FPGA_TMSHUSB_D15
FPGA_TDI
HUSB_D0HUSB_D6
HUSB_D5
SRAM_NCS
DB_CLK1
CLKGEN_SCLKSRAM_D8
RTC_CS
SRAM_D10
HOST_SOFT_TMSSRAM_D15
PB_SPAREA2
SRAM_A16SRAM_A3
AUTO_TDI_SOFTUSERFLASH_SCLK
SRAM_A12
SRAM_A14HUSB_READY
HOST_SOFT_TDISRAM_A18HUSB_D4
PB_SPAREA3
DIAG_DOUT
CLK_EXTA0
SRAM_D12
SRAM_A10
HUSB_D12
REF_CLK
EXTSPI_DIN
CLK_EXTA1
CLK_EXTA2
SRAM_A11
ONE_WIRE_IDSRAM_D9
HOST_SOFT_TCK
HUSB_WR_N
FLASH_BOOT_CLK
RTC_INT_NONE_WIRE_PIOA1DIAG_CLK
USERFLASH_DOUT
EXTSPI_CSA_N0USERFLASH_DIN
SD_DETECT
SD_CLK
SRAM_A8
SRAM_A13
EXTSPI_DOUTDIAG_CS_N
SD_DAT0
AUTO_TMS_HARD
FPGA_ID0
SRAM_NBLECLKGEN_CS_N
SD_PROTECT
SD_DAT1
ONE_WIRE_PB_ID_A
SRAM_A15
SD_CMDSD_DAT3
DIAG_DIN
SD_DAT2
PLL1
PLL2
HUSB_SLOE
HUSB_FIFOADR1
AUTO_TCK_HARD
NEXUS_TCK
SRAM_A4
EXTSPI_SCLKAOUT_L
AUTO_TDO_SOFT
CLKOUT
EXTSPI_CSA_N1
FPGA_M0
RTC_DOUT
RTC_SCLK
FLASH_BOOT_DOUT
FLASH_BOOT_CS_N
NEXUS_TDI
SRAM_D1
AUTO_TCK_SOFT
FPGA_CCLK
PB_SPAREA4
ONE_WIRE_PIOA2
CLK_ENA
SRAM_A7
SRAM_A9
SRAM_A6
SRAM_A17
USERFLASH1_CS_N
CLKGEN_DIN
AUTO_JTAG
LED1_BLUE
AUTO_TMS_SOFT
LED2_GREEN
FPGA_TDO
FPGA_ID2
SRAM_D3
SRAM_D5
HUSB_D1
FLASH_BOOT_DIN
USERFLASH2_CS_N
PB_SPAREA1
FPGA_PROGRAM
SRAM_A5
SRAM_D13
SRAM_D7SRAM_D2
FLASH_GOLD_CS_NFLASH_BOOT_CS_N
FLASH_GOLD_CS_N
FLASH_BOOT_CLKFLASH_BOOT_DIN
FLASH_MAIN_CS_N
FLASH_MAIN_CS_N
PLATFORM UPGRADE
NO JUMPER INSTALLED - BOOT FROM MAIN FLASH
JUMPER PINS 1 AND 2 - BOOT FROM GOLD FLASH
Altera SCD
Altera SCD
FLASH_BOOT_SEL
GND
3V3
FLASH_BOOT_CLK
FLASH_BOOT_SELFLASH_BOOT_SEL
FLASH_BOOT_SEL
FLASH_MAIN_CS_N
B11
GND2
B03
A4
VCC5
S6
U69FSA4157
12
J241x2 HEADER MALE
FLASH_BOOT_DATAOUT
FLASH_BOOT_DATAOUT
FLASH_BOOT_DATAOUT
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
EXT INT
PULLDOWN
PULLDNx3.SCHDOC
1
1
2
2
3
3
4
4
D D
C C
B B
A A
* *
NB3000AL - ALTERA
02
9/22/2011 10:42:15 PMHOST_FPGA_NonIO.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title Host FPGA Pwr and Programming
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
TMSTCK
TDITDO
3V3
1V2
GNDGND
3V33V3
R24K7 1%
R34K7 1%
R14K7 1%
VCCINTG6
VCCINTG7
VCCINTG8
VCCINTG9
VCCINTG10
VCCINTH6
VCCINTH11
VCCINTK7
VCCIO1E3
VCCIO1G3
VCCIO2K3
VCCIO2M3
VCCIO3P4
VCCIO3P7
VCCIO3T1
VCCIO4P10
VCCIO4P13
VCCIO4T16
VCCIO5K14
VCCIO5M14
VCCIO6E14
VCCIO6G14
VCCIO7A16
VCCIO7C10
VCCIO7C13
VCCIO8A1
VCCIO8C4
VCCIO8C7
U30K
EP3C10F256C8
GNDH7
GNDH8
GNDH9
GNDH10
GNDJ7
GNDJ8
GNDJ9
GNDJ10
GNDB2
GNDB15
GNDC5
GNDC12
GNDD7
GNDD10
GNDE4
GNDE13
GNDG4
GNDG13
GNDK4
GNDK13
GNDM4
GNDM13
GNDN7
GNDN10
GNDP5
GNDP12
GNDR2
GNDR15
U30L
EP3C10F256C8
R154 100R 1%R155 100R 1%
R157 100R 1%R156 100R 1%
3V3
R2794K7 1%
3V3
R2804K7 1%
3V3
R2814K7 1%
3V3
R2824K7 1%
GND
GND3V3
GND
nSTATUSF4
DCLKH1
nCONFIGH5
TDIH4
TCKH3
TMSJ5
TDOJ4
nCEJ3
CONF_DONEH14
MSEL0H13
MSEL1H12
MSEL2G12
U30J
EP3C10F256C8
VCCA1L5
GNDA1M5
VCCD_PLL1N4
VCCA2F12
GNDA2E12
VCCD_PLL2D13
U30M
EP3C10F256C8
GND
PLL VCC Decoupling2V5
VCCA_PLL6
VCCA_PLL5
2V5
i PLL
i PLL
L81K at 100MHz 300mA
L91K at 100MHz 300mA
VCCA_PLL6
VCCA_PLL51V2
GND
C3592.2uF 6.3V
C3632.2uF 6.3V
C3600.1uF 16V
C3640.1uF 16V
C36510nF 16V
C36110nF 16V
C3621nF 50V
C3661nF 50V
GND
C3670.1uF 16V
C3680.1uF 16V
3V33V3
GNDGND
DCLK
3V3
1
1
2
2
3
3
4
4
D D
C C
B B
A A
* *
NB3000AL - ALTERA
02
9/22/2011 10:42:15 PMOSC_24MHZ.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title 24MHz Oscillator
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
CMOSOUT
XTALIN
XTALOUT
OSC
INT
XTALIN
XTALOUT
GND GNDGND
3V3
GND
CMOSOUT
3V3
GND
C122pF 50V
C222pF 50V
C30.1uF 16V
1
3
24
GND
Y124MHz
NC1
A2
GND3
Y4
VCC5
U1SN74LVC1G04DBV
R127R 1%
1
1
2
2
3
3
4
4
D D
C C
B B
A A
* *
NB3000AL - ALTERA
02
9/22/2011 10:42:17 PMPSU.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title NB3000 POWER SUPPLIES
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
C2220uF 10V
GROUND TEST POINTS
C1220uF 10V
i
PWRNET
i
PWRNET
5V0
VIN VOUT
ADJ
PSU_1V2PSU_NCP630_ADJ
1V2 POWER
1V2
C410uF 20V
C310uF 20V
TP25V0
TP43V3
TP52V5
TP61V8
TP71V2
TP3+B
TP1GND
GND
POWER TEST POINTS
GND5V0 3V3 2V5 1V8 1V2+BGND GND GND
GND
GND
5V0
GND
5V0
2V5
VOUT
ADJ
SET_1V2PSU_NCP630SET_1V2
1V2
VIN VOUT
ADJ
PSU_1V8PSU_1084_ADJ
1V8 POWER
1V8
3V3
VOUT
ADJ
SET_1V8PSU_1084SET_1V8
1V8
VIN VOUT
ADJ
PSU_2V5PSU_1084_ADJ
2V5 POWER
2V5
5V0
VOUT
ADJ
SET_2V5PSU_1084SET_2V5
2V5
VIN VOUT
ADJ
PSU_3V3PSU_1084_ADJ
3V3 POWER
3V3
5V0
VOUT
ADJ
SET_3V3PSU_1084SET_3V3
3V3
1 2NT1
GNDAUGND
i
PWRNET
12
J11x2 HEADER MALE
12
J21x2 HEADER MALE
12
J31x2 HEADER MALE
TP8GND
2V5SET 1V2SET
1V8SET3V3SET
GND SHIELD
R24810M 1%
C1694.7nF 250V
VINVOUT
COM
PSU_A3V3_ADCPSU_TC1017R_3V3
3V3
5V0ADCDAC_3V3
AGND
12NT2
12NT1
12
NT3
1 2NT11
GNDAGND
i
PWRNET
1
1
2
2
3
3
4
4
D D
C C
B B
A A
* *
NB3000AL - ALTERA
02
9/22/2011 10:42:17 PMUSERPWR.SchDoc
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title USER IO Power Loopback
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
AIN
BIN
AOUT
BOUT
USERPOWER
USERPOWER
USER HEADER
POWER LOOPBACK
1
1
2
2
3
3
4
4
D D
C C
B B
A A
* *
NB3000AL - ALTERA
02
9/22/2011 10:42:17 PMVGA_OUT.SCHDOC
Project Title
Size:
Date:File:
Revision:
Sheet ofTime:
A4
Sheet Title VGA Ouput
Assy: TBA
Altium Limited3 Minna CloseBelroseNSW 2085Australia
VIDEO_DAC_OUTVIDEO_DAC_IN
VIDEO_DACVIDEO_DAC_THS8134B.SchDoc
RED[7..0]
GREEN[7..0]BLUE[7..0]
VGA_CLK
VIDEO_DAC_IN
BR
G
VIDEO_DAC_OUTAn_RAn_BAn_G
RED[7..0]
GREEN[7..0]BLUE[7..0]
VGA_CLK
VGA_VSYNCVGA_HSYNC
VGA
INT
EXT
RED
GREENBLUE
VSYNCHSYNC
KEY
ID2
ID3/SCL/DDCID1/SDA/DDC
ID0
VGA_CON
1
2
3456
U1SMF05C
GND