Nanoscale Power Delivery & PI

OverviewThe Power Integrity (PI) WallPI AnalysisManagement & Innovation PotentialPublications & Discussion

Raj Nair, Anasim Corp. Aug. 21, 2013 (Updated)

08/21/13 Anasim Confidential 2

Power Integrity & the PI Wall

• 20nm SoC to 16nm FinFET transition• Appears Constant Power and Constant Power Density, higher cost

• ~40% PI degradation; with k = 0.8 and the inverse k-root-k metric

• 16nm to 10nm • Scale factor 0.625, leads to > 2X (> 100%) degradation in PI!!

• We have seen PI-related product failures (FMAX, INRUSH I) in the past and the present. Business as usual NOT an option.

PI degradation with scaling* ~= 1k √ k

For constant power density (CPD) or constant power (CP) scaling,where k is the process scaling factor, typically 0.7

Classical CPD/CP scaling → ~70% degradation in PI

* “Power Integrity Analysis and Management for ICs”, Prentice-Hall, May 2010

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PI analysis prior art (Droop, IR Drop)

• Lumped and Polygonal ⇒ Not True-Physical and Spatio-Temporal, eliminates spatial variance and temporal coincidence

• Not wideband, and leads to pessimistic, non-optimal chip/pkg/board design. Loses local resonances, constructive/destructive noise interference

W i t h D i e C a p s

W i t h o u t D i e C a p s

W i t h D i e C a p s

W i t h o u t D i e C a p s

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Differential¹ modeling & design

Grids, transmission lines/planesAbstract, system level, continuous²No freq/time domain discontinuities

² “Power Integrity Analysis and Management for ICs”, Prentice-Hall, May 2010¹ Integrity learning from the SI world and from fundamentals

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PI: How do droops REALLY look?

Supply differential

True-physical power grid noise (π-fp); droops and propagation

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Continuum³ analysis insight

True-physical noise wave propagation (rlcsim)

³ “Power Delivery, Integrity Analysis and Management for SoC's”, SoC 2007, FI

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PI mngmnt: Fundamental methods

0.0E+00

2.0E-07

4.0E-07

6.0E-07

8.0E-07

1.0E-06

1.2E-06

1.4E-06

1.6E-06

-2 -1 0 1 2

Vg [V]

C [

f/c

m^

2) �

�

�

1.5

1 nS

A

100

1 nS

V

1

∆V= 50mV

VCC

On-die capacitance− Quantity

− Type (fixed/variable)

− Degradation in deep nanoscale (Q, leak)

− Placement and distribution

~130nm process

Can a fine-grain distribution of de-coupling capacitors minimize the di/dt problem?

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PI management: Power Grid Design

Differential grid architectureNovel simulation algo. & IP*What-if analysis in minutes...

* “Power Integrity Analysis and Management for ICs”, Prentice-Hall, May 2010

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PI management: Power Grid Sims

Anasim Corp., Power Integrity Aware Methodology

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PI Management: Package Cap Loop-L4

4 “Power Delivery, Integrity Analysis and Management for SoC's”, SoC 2007, FI

st

d

pif I ret

C

LIVV −

∆−= − αω )s i n ( 1

d

p

C

LIV ∆=∆

1

1

1

12

11

1

1111 C

L

V

fVCk

C

LIVkV iv =∆==∆

2

2

2

12

22

2

2222 C

L

V

fVCk

C

LIVkV iv =∆==∆

2

1

fcl SS

S =Q u i n t u p l e t a n d T r i p l e t l o o p - L s c a l i n g

0 . 0 1

0 . 1

1

1 0

P 8 5 8 P 8 6 0 P 1 2 6 2 P 1 2 6 4

P r o c e s s

loo

p-L

, p

HQ - s c a l i n g T - s c a l i n g

Load-shift induced noise

− Transient & DC

− Package dependency

Scaling challenge

− Exponent of scale factor

− Pkg. caps help, but...

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PI management: Fast Regulation• Simulation (0.18μm)

• Idealized parasitics• 4:1 ESL ratio between

grids

• Capacitance evenly distributed

• N-Series-Pass• Inherently stable

• Fast response

• Charge Valve benefits• ~25% VCC droop

reduction in sim

• Apparently kicks in within 50pS

LVDCAP and HVDCAP were 5pF each in the active configuration and 10pF, 0pF in the inactive mode.

65mV droop88mV droop

Sub-50pS response

Raj Nair, “Distributed charge Valves”, research conducted in late 1999 at Intel Labs, Oregon

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PI mngmnt: Active Noise Regulation*

*Raj Nair, “Active Noise Regulators”, US Patent 7291896,http://www.anasim.com/active-noise-regulation/

Tested in lumped (b/w) and continuum (π-fp) model simulations

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Distributed Local Voltage Regulation5

5 “Power Delivery, Integrity Analysis and Management for SoC's”, SoC 2007, FI6 Nair, US patent appl. pub. US 2005/0168890 A1, filed Jan. 24, 2004

Split, distribute lumped regulator components

− Switches

− Inductors, CAPs

− Reducing IL per

branch

Increases Bandwidth− LC α (1/f2)

− Reducing CAP need

And Efficiency− I2R losses reduced

significantly (ind.)Transient-suppressing high-BW regulation6

Modular design

− Flexible form factor

− Distributes power and heat dissipation

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PI mngmnt. innovation opportunities• Board, package, and chip-level

• Regulation, form-factor dependent• Hybrid regulation

• Active noise regulation

• Distributed voltage regulation

• Integration (on-die, on-pkg...)

• Tools & Methodology (Architecture, Design, Verification...)

References

Power Integrity Analysis and Management for Integrated CircuitsRaj Nair & Donald BennettPrentice-Hall, Publication Date: May 17, 2010 | ISBN-10: 0137011229 | ISBN-13: 978-0137011223 | Edition: 1http://www.amazon.com/Integrity-Analysis-Management-Integrated-Circuits/dp/0137011229/

Power Integrity for Nanoscale Integrated SystemsMasanori Hashimoto & Raj NairMcGraw-Hill, Publication Date: December 22, 2013 | ISBN-10: 0071787763 | ISBN-13: 978-0071787765 | Edition: 1http://www.amazon.com/Power-Integrity-Nanoscale-Integrated-Systems/dp/0071787763/

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C P U

C a p s A c t i v e d e v i c eA c t i v e d e v i c e

C P U

C a p s A c t i v e d e v i c eA c t i v e d e v i c e

Backup slides

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5 4 p

L m b

0 . 4 2 m

R m b

6 m / n _ o s cR o s c

3 . 3 n / n _ o s cL o s c

5 0 4 u * n _ o s cC o s c

1 0 u * n _ 2 tC 2 t

3 8 5 p / n _ 2 tL 2 t

6 . 5 m / n _ 2 tR 2 t

3 . 5 p

L p k g

0 . 2 6 m

R p k g4 0 p s / 1 8 8 nR d i e

V 2

A N R S c h e m a t i c & t h e P S C P O R M o d e l : I l l u s t r a t i o n s

T r a c e

B o a r d

4 m

R 4

3 8 5 p

L 4

2 0 m

R 3

6 n

L 3

5 0 4 uC 1

3 . 3 nL 2

1 8 n

L 1

5V 1

3 0 m

R 16 mR 2

Q 1

A N R C o m p o n e n t

P a c k a g e c o n n .

2 2 uC 2

R e s e r v o i r C A P

G 1

1

1 8 8 nC d i e

6 . 5 m / n _ i d cR i d c

6 0 p / n _ i d cL i d c

2 . 2 u * n _ i d cC i d c

0 . 2 2 m

R s o c k

1 8 p

L s o c k

2 0 u * n _ m l c cC m l c c

1 . 2 n / n _ m l c cL m l c c

3 . 5 m / n _ m l c cR m l c cv i d

V v r

Lumped simulation model with ANR

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PRESCOTT Pre-ANR

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PRESCOTT Post-ANR