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Nanoelectronic Memory Devices: Space-Time-Energy Trade-offs

Ralph Cavin and Victor Zhirnov

Semiconductor Research Corporation

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Main Points

Many candidates for beyond-CMOS nano-electronics have been proposed for memory, but no clear successor has been identified. Methodology for system-level analysis

How is maximum performance related to device physics?  

SRC/NSF A*STAR Forum on 2020 Semiconductor Memory Strategies: Processes, Devices, and Architectures, Singapore, October 20-21, 2009http://grc.src.org/member/event/e003676/e003676_MeetingResults.asp

Space-Time-Energy Metrics

Essential parameters of the memory element are: cell size/density, retention time, access time/speed operating voltage/energy.

None of known memory technologies, perform well across all of these parameters

At the most basic level, for all memory elements, there is interdependence between operational voltage, the speed of operation and the retention time.

Cell dimensions are also part of the trade-off, hence the Space-Time-Energy compromise

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Space-Action Principle for Memory

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min VolumetimeEnergy

min VtE

min LtE

min atNtE

The Least Action principle is a fundamental principle in Physics

mintEPlank’s constanth=6.62x10-34 Js

(h)

Three essential components of a Memory Device:

1) ‘Storage node’ physics of memory operation

2) ‘Sensor’ which reads the state e.g. transistor

3) ‘Selector’ which allows a memory cell in an array to be addressed

transistor diode

All three components impact scaling limits for all memory devices

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Three Major Memory State Variables

Electron Charge (‘moving electrons’) e.g. DRAM, Flash

Electron Spin (‘moving spins’) (STT-) MRAM

Massive particle(s) (‘moving atoms’) e.g. ReRAM, PCM, Nanomechanical, etc.

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Note: Electrical I/O always wanted

DRAM schematic

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n n

p

Storage: N carriers

Barrier+Selector Eb, eV Max. retention0.6 1 ms

0.65 4 ms0.75 84ms1.1 ~1 h1.6 >10 years

Problem 1: In Si devices Ebmax<Eg=1.1 eV

Only volatile memory possible with FET barrier

Volatile electron-based memory: DRAM

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Eb,tr

Eb,C

dC

a

Selector

Sensor

Storage Node

cm

fF

L

C

1

88~0

int

25fF

Problem 2a: External sensing requires large Nel

Problem 2b: Large Nel requires large size of storage node (capacitor)

Problem 2c: Series resistance of the storage capacitor increases with scaling

Vcap=10-15 cm3Nel~105

(a=10 nm, K=100)

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Charge-based injection “easy” in DRAM: Barrierless transport…

Write

CRRRCI

CVt capFETw (>25fF)

a~10 nm

tw~0.1-1 ns

K=100

Dominates at a<10 nm

DRAM summary

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-Low barrier height-Volatility

a=15 nm

Volcap~106 nm3

Ew~310-14 J

DRAM inherent issues:

Selector

Sensor - Remote sensing – Large size of Storage node

EtV~10-9 J-ns-nm3

VolFET=105 nm3

Ew~10-14 J

Volcap~5105 nm3

VolFET=104 nm3

a=30 nm

EtV~10-8 J-ns-nm3

Ta=1 s Ta=10y

Flash in the limits of scaling

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Selector

Storage Node

Sensor

~10 nm ~6nm

~20nm

Nel~10

Volstorage=2000 nm3

VolFET~3a3 ~3000nm3

Nel~10

Voltage-Time Dilemma

For an arbitrary electron-charge based memory element, there is interdependence between operational voltage, the speed of operation and the retention time.

Specifically, the nonvolatile electron-based memory, suffers from the “barrier” issue: High barriers needed for long retention do not allow fast

charge injection It is difficult (impossible?) to match their speed and voltages

to logic

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Flash Summary

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E~10-16 J t~1 s=1000 ns

EtV~10-9 J-ns-nm3

The minimum space-action metric is approximatelythe same as for the DRAM

Volstorage=2000 nm3

VolFET~3a3 ~3000nm3

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Conclusion on ultimate charge-based memories All charge-based memories suffer from the “barrier”

issue: High barriers needed for long retention do not allow fast

charge injection It is difficult (impossible?) to match their speed and voltages

to logic

Voltage-Time Dilemma

Non-charge-based NVMs?The Choice of Information Carrier

Spin torque transfer MRAM (Moving spins): Energy Limit

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D. Weller and A. Moser, “Thermal Effect Limits in Ultrahigh-Density Magnetic Recording”, IEEE Trans. Magn. 36 (1999) 4423

Tk

KVf

Tk

Eff

BB

btr expexp 00

Tk

KV

ft

Bstore exp

1

0

tstore>10 y

Eb = KV > ~1.4 eV

(f0~109-1010 c-1)

the anisotropy constant of a material

volume

FET selector is biggest component of STT-MRAM in the limits of scaling

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11 nmV=1500 nm3

Nspin~105

J-G. Zhu, Proc. IEEE 96 (2008) 1786

Selecting FET

Storage N

ode

Eb = KV >1.4eV (the anisotropy constant of a material)K~0.1-1 J/cm3

volume

VolFET~3a3 ~3000nm3

STT-RAM summary

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(Alternative estimate based on optimistic write current/write time projections: Iw~107 A/cm2 and tw~1 ns

Ew~107 A/cm2 11nm2 1V 1 ns~10-14 J

V=1500 nm3 (e.g. 11nm22 nm)

EtV~10-11-10-10 J-ns-nm3

This looks a little better than the electron-basedwe looked at earlier!

Ew~Nspin Eb~105 10-19~10-14 J

VolFET~3a3 ~3000nm3

Scaled ReRAM (courtesy Dr. In YOO/Samsung)

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Ultimate ReRAM: 1-atom gap

A B

nmnaAu

257.0~3

1

Eb=0.38 eV

dt=0.075 nm

dt<<a

V=0.5 V

ON/OFF~1.61

Ultimate ReRAM: 2-atom gap

nmnaAu

514.02~3

1

Eb=2.63 eV

dt=0.37 nm

dt<a

V=0.5 V

ON/OFF~476

BA

Ultimate Atomic Relay: 4-atom gap

Energy

Eb (energy barrier for diffusion)

nmnaAu

1~3~3

1

sTk

E

Tk

ml

Tk

Ett

B

b

BB

btr 2~expexp 00

0.5-1 eV

Ultimate Atomic Relay: 4-atom gap

Energy

Eb (energy barrier for diffusion)

nmnaAu

1~4~3

1

yTk

E

Tk

ml

Tk

Ett

B

b

BB

btr 10expexp

3

0

3

0

0.5-1 eV

(Eb=0.5 eV, n>5)

Ultimate ReRAM: A summary

nma 1

V=1nm3

Nat~100 (64)

E~Nat*1eV~10-17J

tw~1 ns (can be shown)

EtV~10-17 J-ns-nm3

VolFET~3a3 ~3000nm3

EtV~10-14 J-ns-nm3

without FET

with FET

Summary

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DRAM

Flash

STT-RAM

ReRAM

Vstor, nm3

1

105

Ncarriers

100

Ew, J tw, nsBiggest component

Storage Node

Selector

Selector

1 ns

103 ns

1 ns

1 ns

Sensor FET

FET

FET

10-14

10-16

10-14

10-17

Space-Action,J-ns-nm3

105

10

105

103

103 ~10-10

~10-14

~10-9

Constraints by sensor not considered

Main constraints due to sensor

~10-8-10-9

without FET

VolFET~3000nm3

With FET

Summary

Memory cell design is a tradeoff between physical variables needed to achieve long retention times, and short write/read times.

A global metric, space-action, for all memory categories provides insights into most promising extremely-scaled memory devices based on fundamental physics

Scaling Limits of semiconductor component often dominate overall scaling for the memory cell

Our preliminary study suggests a good potential for ReRAM (some constraints are not considered)

Today’s memory technology meets Feynman’s challenge of placing the 24 volumes of Encyclopedia Britannica (~200 MB) on the head of a pin (~.025 cm^2).

Library of Congress (10 Terabytes) on 1 cm^2 by 2020?25