my report_finalise repaired)
TRANSCRIPT
INDUSTRIAL TRAINING REPORT AT ONSEMICONDUCTOR (SCG) INDUSTRIES MALAYSIA SDN BHD
BY,
LEE KOK YEW (EE081554)
DEPARTMENT OF ELECTRICAL & COMMUNICATION ENGINEERING
UNIVERSITI TENAGA NASIONALSTART DATE: 11 APRIL 2011
END DATE: 1 JULY 2011DURATION: 12 WEEKS
SCG INDUSTRIES MALAYSIA SDN BHDLOT 122, SENAWANG INDUSTRIAL ESTATE,
70450 SEREMBAN, NEGAERI SEMBILAN
INDUSTRIAL TRAINING REPORTS
NAME : LEE KOK YEWID : EE081554IC NO. : 890725-05-5541COURSE : ELECTRICAL &
COMMUNICATIONS ENGINEERING
UNIVERSITI : UNIVERSITI TENAGA NASIONALHOST LECTURER: DR. KANNAN M. MUNISAMYCOMPANY : ON SEMICONDUCTORDEPARTMENT : POWER PRODUCT DIVISION
INTEGRATED CIRCUITSUPERVISOR : YAP SHONG LAEYPERIOD : 11 APRIL 2011 – 1 JULY 2011
Report done by,Lee Kok Yew Page 2
ACKNOWLEDGEMENT
I would like to express my gratefulness to participate of the following
organization or any individuals who contribute in my industrial training program and the
case study project. During my 12 weeks of training, I have been assign under Mr Yap
Shong Laey which is my supervisor during the time. He is the production head of Power
IC department in ON Semiconductor. I want take this opportunity to thank my supervisor
for his guidance throughout the whole industrial training. Besides that, I would also like
to thank Mr Chow Yi Heng and Mr Chaw Wing Onn. Although they are not my
supervisor, but they are willing to teach and guide me in my training program.
A special thanks also to all the profession staff in ON Semiconductor who
following this below:
Mr Lee Yeu Wen, Manufacturing Engineer
Ms Koh Siew Ting, Process Engineer
Mr Ong Hao Yii, Process Engineer
Mr Azharsyah, Process Engineer
Mr Nor Halim, Process Engineer
Besides that, I also want take this opportunity to thank Mr. Kannan M. Munisamy
which are my visiting lecturer who really doing hard come all the way from UNITEN to
pay a visit in order to understand my training condition and my work over ON
Semiconductor.
Last but not least, I would like to send my special thanks to every personnel staff
in ON Semiconductor who give their support and guidance throughout my internship
period especially staffs and operators from Power Product Division-Integrated Circuit
(PPD-IC) and PPD-Wire.
Report done by,Lee Kok Yew Page 3
CONTENTS
1.0 ACKNOWLEDGEMENT
2.0 INTRODUCTION TO ON SEMICONDUCTOR
2.1 HISTORY OF MOTOROLA SPS
2.2 HISTORY OF ON SEMICONDUCTOR MALAYSIA
2.3 CHRONOLOGY OF ON SEMICONDUCTOR SEREMBAN
2.4 VISION & MISSION
3.0 OVERVIEW OF ON SEMICONDUCTOR SEREMBAN
3.1 DEPARTMENT CHART ON SEMICONDUCTOR SEREMBAN
3.2 COMPANY ORGANIZATION CHART
3.3 ORGANIZATION CHART FOR POWER IC DEPARTMENT
4.0 PROCESS FLOW IN POWER IC
4.1 FRONT END
4.1.1 WAFER MOUNT
4.1.2 WAFER SAW AND WASH
4.1.3 DIE BOND
4.1.4 WIRE BOND / CLIP BOND
4.2 BACK END
4.2.1 MOLD
4.2.2 PLATING
4.3 FINAL TEST
4.3.1 TRIM / FORM (SINGULATION)
4.3.2 ELECTRICAL TEST
4.3.3 MARKING
4.3.4 PACKING
4.4 PRODUCT OF POWER-IC
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5.0 TRAINING ACTIVITIES
5.1 FRONT END
5.2 BACK END
5.2.1 DELAM (SAT ANALYSIS)
5.2.2 WIRE SWEEP ANALYSIS (X-RAY)
5.2.3 CROSS-SECTIONING
5.3 FINAL TEST
5.3.1 LOW POWER MICROSCOPE
5.3.2 HIGH POWER MICROSCOPE
6.0 PROJECT
7.0 PROBLEM
8.0 REFERENCES
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2.0 INTRODUCTION TO ON SEMICONDUCTOR
ON Semiconductor is one of the world largest suppliers of performance chips for
power management in electronics systems. ON Semiconductor produces power and
signal management, logic, discrete and customs devices for automotive, communications,
computing, consumer, industrial, LED lighting, medical, military or aerospace and power
applications. ON Semiconductor is a world-renowned company today with
manufacturing facilities standing firmly in all parts of the world. Subsidiary of Texas
Pacific Group, ON Semiconductor’s headquarters is in Phoenix, Arizona(USA) and her
sibling in Guadalajara, Mexico; Pestany, Slovak Republic; Roznov, Chech Republic;
Toulouse, France; Seremban, Malaysia; Leshan, China and Aizu, Japan. It also has sales
offices throughout the world. ON Semiconductor’s internal manufacturing base is global,
with 8 manufacturing sites including the first wafer FAB in western China dedicated to
building state of the art power management products. This diversity and distributed
matrix of sources reduces supply side risk and enables cost effective manufacturing and
delivery of our products anywhere in the world.
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2.1 HISTORY OF MOTOROLA SPS
ON Semiconductor ( Formerly a Division of Motorola). ON Semiconductor is just
beginning but its rooted back to its former parent, Motorola indefinitely. Motorola was
established by two brother during the late 20’s, Paul V Galvin and Joseph E Galvin. In
September 25th ,1928, both founder of Motorola bought over battery eliminator business
from Stewart Storage, a company based in Chicago which at that time faces near
bankruptcy. They incorporated the Galvin manufacturing Corporation until it was change
to Motorola. From the day they own the company until the 1930 there were no innovation
nor invention produced. Hence the company’s early battery eliminator, private-label
home radios and pioneering auto radios had no distinctive trademark other than the
corporate name. In 1930, Paul Galvin conceived the name Motorola to convey the
excitement new idea of music in motion for the company’s auto radios, the first mass
production. This new trademark so widely known took Motorola as its corporate name in
1947. The first Motorola trademark registered in1930 had the appearance of being hand
written with a lightning bolt crossing the T. Other variations were used over the years,
emblazoned on highway signs, product billboards , packaging and print advertising until
the modern design is introduced .
2.2 HISTORY OF ON SEMICONDUCTOR MALAYSIA
ON Semiconductor Malaysia, managed and operated wholly by Malaysians, is the
discrete semiconductor power house. ON Semiconductor Malaysia, has its beginning in
1979 with the incorporation of Motorola Semiconductor Sdn.Bhd (MSSB). In 1987, it
established the second facility with the incorporation of Motorola Electronics Sdn.Bhd
( MESB). It went on to achieve a historic first for the nation with the establishment of
Integrated Surface-mount Manufacturing Facility (ISMF).This first such facility in the
country strategically aligns wafer fabrication, assembly and testing under one roof,
producing discrete transistors, biased resistor-transistors and switching diodes in world
class cycle time. From two world-class manufacturing facilities in Senawang Industrial
Estate, Seremban, Malaysia. ON SEMICONDUCTOR is providing Original Equipment
Manufacturing (OEMs) worldwide with a broad range of discrete and analog products in
Report done by,Lee Kok Yew Page 7
Surface Mount and Power packages such as power and signal management, logic,
discrete and customs devices for automotive, communications, computing, consumer,
industrial, LED lighting, medical, military or aerospace and power applications. The
mission of ON Semiconductor is to become “The Premier Power Solutions Provider”.
And the vision is to enable ON Semiconductor to dominate Power and Data Management
segments by providing Advanced Packaging solutions with competitive cost through
operational excellence.
ON semiconductors Malaysia has 2 plants which both located in Seremban. Site 1
is the main manufacturing line for ON Semiconductor Malaysia branch. Site 2 is mainly
wafer fabrication and laboratory work.
2.3 CHRONOLOGY OF ON SEMICONDUCTOR SEREMBAN
1979- 15 Motorola Kuala Lumpur personnel relocated to start-up 12,000 sq. ft.
Facility purchased from Spraque.First product was
Silicon Power Metal (SPM).
1981- Added 100,000 sq. feet building
1982- Purchased adjacent factory with additional 28,000 sq. feet
1983- Started Test Operation for Standard Logic (14/16/20 LD PDIP) & discretes
(SOT23)
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SITE 1 – MANUFACTURING PLANT SEREMBAN, MALAYSIA
SITE 2 – WAFER FABRICATION PLANT SEREMBAN, MALAYSIA
1984- Held the 1st Service Recognition Award for pioneer employees
1985- CEO Award of Excellence in Quality, Productivity & Delivery of IC 14/16 ld
D.I.P.
1986- Consolidated Discrete Assy/Test & moved out IC operation.
1987- Build ISMF (integrated Semiconductor Manufacturing Facility), Malaysia's
first Wafer Fabrication Plant.
1988- ISMF officially opened by Minister of Trade & Industry.
1990- Won Gold Award in Corporate first TCS Showcase.
Won SPS Patent of the Year Award.
1991- Motorola Malaysia won Prime Minister’s National Quality Award.
Presented 11 technical papers in Internecine. Judged best in 5 out of 8 categories,
also won Best Paper Overall Award.
Established Product Engineering organization.
1992- Provided key management and technical support to Motorola- Philips JV
(SMP) start-up.
1993- Expanded Wafer Fabrication operation to include Ion Implantation process.
1994- Obtained ISO 9002 certification.
Provided management team to start-up Motorola’s most successful JV in China.
1995- Added 43000 sq. feet at ISMF, MESB Added 83,000 sq. feet at North Wing,
MSSB.
1996- Established Technical Operation organization.
Won Malaysia’s Hibiscus Award for Exceptional Achievement in Environmental
Performance.
1997- Developed & introduced new surface mount packages (TSOP6 & Power mite).
Certified QS9000 - The first SCG plant.
Accounted for 11 out of 28 patents filed from all SPS Asian manufacturing sites.
ISMF engineers designed the 1st die- integrated dual inductive load driver that
replaces three SOT23 with one.
1998- Successfully transferred 500 devices from BP5 to ISMF fab.
Accounted for 77% patent pursues (33 out of 43)for Asian manufacturing sites.
RF Linear Modules won ‘Best Overall Supplier of the Year’ Award from Philips
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Broadband and ‘Component Supplier of the Year’ Award from C-COR.
TPM was officially launched on September 9 at 9:09 am.
1999- The first Analog Micro-8device was qualified.
Successfully executed Analog SOT23L transfer from Aizu.
Successfully transferred Analog IC-DPAKfrom KLM.
Won the 4th Gold Award from Malaysian Society of Safety & Health(MSOSH).
Motorola Corporation awarded ON Semiconductor Sbn "The Excellence In EHS
Performance".
On August 5 1999, SCG becomes ON Semiconductor.
Official Launching of ON Semi Seremban by US Ambassador to Malaysia.
Awarded the 1st. ON Semiconductor corporate quality Award for "Excellence in
Continous Quality Improvement for SOT23".
2000- Became a Public Listed Company on April 28th.
Won the 5th Gold Award from Malaysian Society of Safety & Health (MSOSH).
DaimlerChrysler Corp Gold Award.
RF products transferred to Motorola KLM after 18 years in SBN.
Site 1 Reconfiguration for more production space.
Certified for QS90003rd Edition.
New Products Introduction – SC88/A, SC82AB.
Komala Ramasamy awarded Model Female Employee of the Year for Malaysia
by Human Resource Ministry.
11 Patentsfiled.
2001- Rated #1 in Supplier Quality by Seagate.
Certified for QS9000 3rd Edition (including Package Design Control).
Certified for TS16949 : 1999 (1st semiconductor firm in the industry).
Introduced Chip FET package (half footprint of TSOP6).
JIPM TPM Excellence Award - First Category (1st & only site in ON Semi).
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2.4 VISION & MISSION
I. Vision
-To become “The Premier Power Solution Provider”
II. Mission
-Enable ON Semiconductor to dominate Power and Data Management segments by
providing Advanced Packaging solutions with competitive cost through operational
excellence.
III. Quality Policy
-We will exceed Customer Expectations with our Superior Products and Services.
IV. Quality Statement
-Every ON employee is personally responsible for ensuring the highest Quality in the
products and services delivered to internal and external customer. Continuous
improvement in the quality of our processes, products and services is fundamental to the
achievement of customer satisfaction. Original Equipment Manufacturing (OEMs)
worldwide with a broad range of discrete and analog products in Surface Mount and
Power packages. Nowadays, ON Semiconductor Seremban has almost 1900 employees to
manage and operate the company.
V. Objective
Enables energy efficient solutions for a greener world
Provides a broad array of products and solutions
Helps customers solve their unique design challenges
Operates a world-class, value added supply chain
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ON SEMICONDUCTOR(SITE 2)
WAFER FRIBRICATION LABORATORY WORK
ON SEMICONDUCTOR(SITE 1)
PPD (POWER PRODUCT DIVISION) SOSM (SMALL OUTLINESURFACE-MOUNT)
PPD-IC(POWER PRODUCT DIVISION- INTEGRATED CIRCUIT)
PPD-WIRE(POWER PRODUCT DIVISION-WIRE)
PPD-CBSM(POWER PRODUCT DIVISION- CLIP BOND SURFACE-MOUNT)SOSM (SMALL OUTFIT SURFACE-MOUNT)QFN
(QUAD FLAT NO LEAD)
3.0 OVERVIEW OF ON SEMICONDUCTOR SEREMBAN
3.1 DEPARTMENT CHART ON SEMICONDUCTOR SEREMBAN
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3.2 COMPANY ORGANIZATION CHART
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Mohd Tarmizi SongOperations ManagerPPD/CBSM
Firdaus BadarudinProcess Engineer
Yap Shong LaeyManufacturing Equipment Engineer
Ong Hao YiiProcess Engineer
Koh Siew TingProcess Engineer
Sofia SulaimanQA/QC Engineer
Gan Chin SernProcess Engineer
Kam Mei SangManufacturing Equipment Engineer
Ng Then WaiManufacturing Engineer
Chaw Wing OnnManufacturing Engineer
Chong Kian HowEquipment Engineer
Lee Kok YewTrainee
Lee Chai PicTrainee
3.3 ORGANIZATION CHART FOR POWER IC DEPARTMENT
Report done by,Lee Kok Yew Page 14
4.0 PROCESS FLOW IN POWER IC
Throughout my 12 weeks of internship program, I had been placed in Power
Product Division – Integrated Circuit (PPD-IC) production line. My supervisor is Yap
Shong Laey. He is the head of manufacturing PPD-IC line. My given tasks are mostly
covered from front end, back end and final test.
In the production line, they are a total of 9 important steps required to produce a
unit. The first step will be wafer fabrication in Site 2. In this step, the chip or IC will be
mounting in a wafer that is ready to be shift out to Site 1 for production purpose. Second
step will be wafer saw and wash. The wafer will be mount by Mylar using ring and send
for wafer saw. Next, wafers will be send to the die bond machine. The chip or IC will be
place to the lead frame by the handler. After that, the lead frame will be move to next
process which is the wire bond or clip bond. There are 2 types of wires which are
commonly used, gold wire and copper wire. Size of wire are depends on type of products
that process. The fifth step will be the molding process. The lead frame that had already
connected with wire will send to back end for molding purpose. After molding, units are
then send for plating. The molded lead frame will be coat with a thin layer of chemical
Report done by,Lee Kok Yew Page 15
Frontend
Mounting
Saw
Die bond
Wire bond
Backend
Molding
Plating
FOI (Final Outgoing Inspection)
Final test
Trim and form
Testing and marking
Packing
material for anti rust purpose. The seventh step will be the trim and form, molded strip
will be cut into single unit and ready send for testing purpose. In the final test session,
unit will run through a sort of test like isolation test, high temp and low temp test, QA test
and many more. Unit that successful run through all the test will be send for marking and
ready for packing. The entire unit will be put in a tube or a reel. After packing, products
are then ready to deliver to customer.
4.1 Front End
4.1.1 Wafer Mount
Wafers are mounted on a Mylar tape that adheres to the back of the wafer. The
mounting tape provides support for handling during wafer saw and the dies attach
process. The qualities that will be control are broken wafer check, scratches and bubbles.
4.1.2 Wafer Saw and Wash
This process will cut the individual die from the wafer leaving the die on the
Mylar tape. After sawn, the wafer will be wash to remove silicon debris. The qualities
Report done by,Lee Kok Yew Page 16
that will be control are die chip or crack, kerfs width and scribe defects.
4.1.3 Die Bond
This process provides mechanical support to the silicon die and electrical
connection between die to lead frame. The qualities that will be control are die shear and
bond line thickness.
4.1.4 Wire Bond / Clip Bond
This process provides copper / gold wire interconnection between silicon die pad
and lead frame lead/post. The qualities that will be control are ball shear and wire pull.
Report done by,Lee Kok Yew Page 17
Lead Frame: TO220 based material TO220 with die on the lead frame
Copper Wire / Gold Wire as connection wire between the die and
the post/flag
Source pad
Gate pad
Clip
SO8 Flat Lead
4.2 Back End
4.2.1 Mold
Mold compound was used to protect the device mechanically and
environmentally. Transfer molding is used to encapsulate most plastic packages. The
qualities that will be control are wire sweep check, package offset and mismatch check.
4.2.2 Plating
This process allows for the
mechanical and electrical connection between the package and the printed circuit board.
Leadframe based packages most commonly use tin-lead solder plating as the final lead
finish. Pb-free packages use pure Sn as final lead finish. The qualities that will be control
are solder thickness and composition.
Report done by,Lee Kok Yew Page 18
TO220: Before Molding TO220: After Molding
Molding Machine: Lauffer
TO220: Before Plating
4.3 Final Test
4.3.1 Trim / Form (singulation)
This is process where the individual leads of the leadframe are separated from the
leadframe strip. For manual trim and form, the lead are cut and formed mechanically to
the specified shape with a single punch. For auto trim and form, individual units are
singulated from the leadframe strip through progressive trim and form. The quality that
will be control is lead dimensions.
4.3.2 Electrical Test
These processes continue after assembly process. This is electrical test where to
ensure units are meeting electrical specification before shipping. The qualities that will be
control are bin sort check and correlation.
4.3.3 Marking
Report done by,Lee Kok Yew Page 19
TO220: Before Trim TO220: After Trim
Trim / Form machine: Micron
RAW UNIT: TO220
TESTER TEST HANDLER
Corporate and product identification was place on a packaged device. This
marking allows for product differentiation. After test, only good units will be mark by
using laser method. The quality that will be control is marking verification.
4.3.4 Packing
This process is final packaging of product prior shipping to customers. The
quality that will be control is peel force check. The good unit will be pack in either tube
or tape and reel.
After that, the tube or reel filled with unit will be packed in a box. The box will be placed
in a pallet and ready to be shift out to customer.
4.4 Product of Power IC (PPD-IC)
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5.0 Training Activities
Report done by,Lee Kok Yew Page 21
Product of PPD IC
IC TO220
ICDPAK
ICD2PAK
Auto Thyristor
Iso Thyristor
ICD2PAK EG
In ON Semiconductor, I was placed under Mr. Yap Shong Laey. He is a
equipment engineer of Power-IC. He is also the manufacturing head of the production
line. My practical work in ON Semiconductor is more related with the whole production
line which covered front-end, back-end and final test.
5.1 Front End
In the front-end, there were few things I have done during my internship period.
Firstly is wire pull. Wire Pull Testing (WPT) is one of several available time-zero tests
for wire bond strength and quality. It consists of applying an upward force under the
wire to be tested, effectively pulling the wire away from the die. Wire pull testing
requires special equipment commonly referred to as a wire pull tester, which consists of
two major parts: 1) a mechanism for applying the upward pulling force on the wire using
a tool known as a pull hook; and 2) a calibrated instrument for measuring the force at
which the wire eventually breaks. The wire pull tester measures the pulling force at
which the wire or bond fails. The measured force is then recorded in grams-force. Aside
from the bond strength reading, the operator must also record the bond failure mode.
Failure mode in this context refers to one of the following: 1) first bond (ball bond)
lifting; 2) neck break; 3) midspan wire break; 4) heel break; and 5) second bond (wedge
bond) lifting. First or second bond lifting is unacceptable and should prompt the process
owner to investigate why such a failure mode occurred.
Report done by,Lee Kok Yew Page 22
Photos of a wire pull tester stage (left) and a pull hook (right)
Besides that, I have also leant concept of 5S in the front-end production line. 5S is
the name of a workplace organization methodology that uses a list if five Japanese words
which are seiri (sorting), seiton (straightening or setting in order), seiso (sweeping or
chinning or cleanliness), seiketsu (standardizing) and shitsuke (self discipline). Originary,
the machine and equipment in front-end was not arrange in order. I was assign to do so.
By doing that, I needed to do wire and pipe management which mean I need to use a
bracket or a plastic pipe to put all the wire all together so that it look nicer and not messy.
If the wire or cable is not arranged nicely and in order, it will cause accident to the
operator or staff that working in the production line. So in conclude, 5S concept is very
important for every company smoothly in the production line.
I also leant how to program a wire-bond machine to run the wire bond process.
This was learnt from a equipment engineer in the front-end. It consists a sort of steps to
teach the machine run wire-bond process. The machine that I have been teach is
shinkawa and ASM which is a Japanese machine.
Report done by,Lee Kok Yew Page 23
Wire and cable that is not arrange nicely
Wire Bond Process
5.2 Back-End
In the back-end of the production line, usually trainee will be assign to do
DELAM or Wire Sweep for the molded strip. This usually is done when there is a major
breakdown for the molding machine. During a break down or shut down for the machine,
the production will stop. There will be an air gap that will cause in between the
DAMBAR and the MOLD. Once the machine is run again, the air gap will occur inside
the molded strip. This will cause the unit in the strip contains a layer of air gap. This air
gap will cause the heat inside the IC can’t be throw out by the heat sink. This will
damage the IC and will affect the performance of the unit.
5.2.1 DELAM (SAT Analysis)
SAT ANALYSIS
SAT (Scanning Acoustic Topography) analysis is the transmission and reception of
ultrasonic waves in DI (diluted) water media.
What are Ultrasonic Waves?
Ultrasonic waves refer to sound waves above 20 kHz (not audible to the human ear)
Characteristics of Ultrasonic Waves
1. Freely propagate through liquids and solids
2. Reflect at boundaries of internal flaws and change of material
3. Capable of being focused, straight transmission
4. Suitable for Real-Time processing
5. Harmless to the human body
6. Non-destructive to material
Detectable Defects
1. Delamination
2. Package Crack
3. Die Crack
4. Void
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5. Die Tilt
When is SAT testing necessary for qualification?
1. New packages
2. New assembly sites
3. Assembly site BOM changes (mold compound, die attach, lead frame)
4. Fab backmetal changes (high power dissipation products)
5. Fab passivation or die coat changes
6. New products in qualified packages if the die size is 1.15X or greater than the
largest previously qualified die size
What is the criterion for
passing SAT?
1. Zero delamination over
the surface of the die in a
clearly defined region.
Scattered “points” of
phase inversion are
acceptable.
2. Lead fingers cannot be 100% delaminated, including the non-wirebonded area.
3. Wirebond post cannot be 100% delaminated.
4. Zero delamination under the surface of the die in the die attaches material (high
power dissipation products only).
5. Zero delamination in the flag area surrounding the die for products that utilize a
down-bond process (wires bonded directly to the flag).
6. Delamination from the edge of the package cannot extend into the inner locking
feature of the package (e.g. V-groove).
For the last 4 weeks I have done many SAT analysis which specialize to detect
delamination in a package.
Report done by,Lee Kok Yew Page 25
SAT MACHINE
Delamination
Delamination is the disbonding between two surfaces that are supposed to be attached. It
is important effects on the semiconductor package have emerged with improvements in
its detection. Delamination can occur between the molding compound and any of the
following: the die surface, the die paddle surface, the lead frame surface, and the die
attach material. Delamination between the molding compound and any of these can lead
to failure. Failure mechanisms that can result from die surface delamination include 'first
bond' lifting, wire necking, cratering, and intermetallic failures. Die paddle/lead frame
delamination, on the other hand, can cause 'second bond' lifting, heel cracking, and even
broken wires. Lead frame delamination can also lead to internal package cracking that
can allow conductive paths to form, which can result in current leakages. Corrosion is
also possible if the delamination reaches the package external, creating a path for
contaminants and moisture to enter the package. Cracks in the die passivation can also
result from die surface delamination after temperature cycling. Delamination can also
lead to package cracking during solder reflow.
Plastic package delamination is generally caused by:
1. non-optimized molding parameters
2. excessive temperature gradient across the mold die
3. inferior encapsulation material properties
Report done by,Lee Kok Yew Page 26
LID SEAL VOIDS DELAMINATION
DIE CRACK BGA DIE ATTACH
EXAMPLES FOR VOID PACKAGE
How does SAT process work?
Ultrasound
• A transducer produces a high frequency sound wave which interacts with the
sample.
• High frequency sound waves cannot propagate through air.
• Couplant- A material used to carry the high frequency sound waves.
• Water is the most common couplant for immersion testing.
Inspection Modes
• Pulse Echo
• Through Transmission
Sound Reflection
Whenever a sudden change in acoustic
impedance is encountered, like at a material boundary, a portion of sound is
reflected and the remainder propagates through the boundary. By measuring the
reflected ultrasound can provide amplitude information, polarity information and
time information. There are 3 kinds of acoustics scans which differentiate to ABC.
A-Scan- The raw ultrasonic data. It is the
received RF signal from a single point (x,y).
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H2OTransducer
Receive
Connector
Backing
Material
(Damping)
Transducer Element (Piezo Electric Crystal, generates ultrasound)
Thicker transducer element producesLOWER FREQUENCY ultrasound.
Acoustic Lens(Focuses ultrasound)
Input pulse & output RF waveform
Transducers convert electrical energy to sound and sound back to electrical energy.
Transducers convert electrical energy to sound and sound back to electrical energy.
Thinner transducer element producesHIGHER FREQUENCY ultrasound.
B-Scan- A line of A-scans. (Vertical cross-section)
C-Scan-Data from a specified depth over the entire scan area. (Horizontal cross-section.
Inspection modes
Pulse-Echo - One Transducer
• Ultrasound reflected from the sample is used.
• Can determine which interface is delaminated.
• Requires scanning from both sides to inspect all interfaces.
• Provides images with high degree of spatial detail.
• Peak Amplitude, Time of Flight (TOF) and Phase Inversion measurement
Through Transmission - Two Transducers
• Ultrasound transmitted through the sample is used.
• One Scan reveals delamination at all interfaces.
• No way to determine which interface is delaminated.
• Less spatial resolution than pulse-echo.
• Commonly used to verify pulse-echo results.
Digital Oscilloscope Waveform
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Pulse-Echo
Transmit&
Receive
Through Transmission
Transmit
Receive
Gates are used to collect information at desired interfaces within the sample.
• The gate is placed over the signal or signals of interest.
• The absolute value of the highest amplitude signal which breaks the gate threshold within the gated region is recorded. (Figure 1)
• If no signal breaks the gate threshold no data is recorded. (Figure 2)
• Signal amplitude can be increased or decreased by adjusting gain.
In conclude, we use SAT analysis to perform checking on the unit whether there are air
gap occur in the unit. Air gap can cause the unit to run malfunction and will lead to the
system failure. So SAT scanning is a important scan for every electronic devices.
5.2.2 Wire Sweep Analysis (X-RAY)
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Initial pulse 2nd
Echo3rd Echo
Multiple Echoes
1st Echo
The 1st set of echoes is the area of interest, gate placement will be on this group.
Highest Amplitude signal
No data recorded
Gate Threshold
1
2
A wire sweep analysis is used to predict the deformation of the bonding wires
within the cavity. It is run as part of the microchip encapsulation molding process. It is
used to calculate the deformation of the bonding wires (connecting the chip to the lead
frame) that occurs during encapsulation. This calculation enables you to improve the
mold design and process conditions to
prevent wire-sweep from occurring
during encapsulation. The sweep
deflection of wire bond caused by
compound flow during the transfer
molding process can seriously result in
wire crossover and shorting.
This is an example of a wire sweep analysis. Beside is
a sample image that taken from the X-RAY scope.
The tiny wire is connected the die and the post of the
unit. In this analysis, we need to determine the
percentage of wire sagging that were cause during the
molding process. The lesser the percentage of wire
sagging is better.
5.2.3 Cross-Sectioning
Cross-sectioning is a failure analysis technique for mechanically exposing a plane
of interest in a die or package for further analysis or inspection. It usually consists of
sawing, grinding and polishing, until the plane of interest is ready for optical or electron
microscopy. Observation in cross-section provides a wealth of information about the IC
device such as layer thicknesses, layer structures, and the grain sizes of various crystals in
Report done by,Lee Kok Yew Page 30
A simple X-Ray Machine Model
Example of Wire Sweep
the layers. The first step in cross sectioning is mounting where it will provide
convenience in handling specimens of difficult shape or sizes during the subsequent steps
during metallographic preparation and examination. Material used is epoxy and hardener.
The mixture of resin and hardener will cast onto the specimen in the mould and leave the
mixture to cure normally at room temperature. Secondly is grinding, the purpose of
grinding is to eliminate gross and plastic deformation due to sectioning. Coarse grinding
is done using abrasive paper (silicone carbide paper) starting with 240 mesh, 400 mesh
whilst fine grinding is using 600 and 800 mesh. The purpose of polishing is to eliminate
the effect of deformation occur during grinding. Thirdly is polishing. Polishing machine
consist of soft cloth attached on rotation wheel. Very fine abrasive such as diamond
together with lubricant are applied on the cloth. Common diamond sizes are 6, 3 and 1
micron. This step is needed to be done until no scratch will appear under the microscope.
Cross section consists of 4 simple steps which is
1. SAMPLE MOUNTING
2. GRINDING
3. POLISHING
4. INSPECTION
Report done by,Lee Kok Yew Page 31
SAMPLE MOUNTING
Sample mounting is take the unit that needed to be grind or inspection purpose to make it
become a sample. In order to do that, a certain chemical ingredients are needed to mix
together with and left it in a sample mould for it to be harden. Here are the steps for
sample mounting.
1. Mount specimen on the lid of the reusable mounting cup.
2. Apply release agent to the reusable mounting cup side wall.
3. Mix 5:1 resin to hardener by weight. Stir until the mixture is warm. Additional 1g
of hardener to the mixture is recommended to boost the curing process.
4. Put the mixture in the vacuum impregnation system to de-bubble for 1 minute.
5. Pour the mixture into the mounting cup carefully.
6. Put the mixture in the vacuum impregnation system to de-bubble for 3-4 minutes,
switch of the system and keep for 5 minutes.
7. Release the chamber valve, and keep until the resin is fully cured.
Report done by,Lee Kok Yew Page 32
EpoxyResin (left), hardener (right)
5:1 (by weight) Add 1g hardener to boost the
curing time
Stirring stickMixing cup Gloves
+
Release agent Reusable mounting cupApply release agent to
the reusable mounting cup side wall.
Specimen mounting clip
←→
Double sided tape
GRINDING
After the sample is harden enough, the sample is being take out from the mould. Now is
the grinding process. Grinding is use of grinder machine to cut or grind the sample into a
certain level to observe the structure of the unit. It uses sand paper (SiC paper) to grind
the unit. There are a certain label of sandpaper needed to follow. It start with 240 grit,
400 grit, 600 grit, 800 grit and lastly 120 grit. Theses sandpaper is being differentiate by
the surface smoothness. All begin with rough sandpaper then continuous with a smoother
surface until the smoothest and finest sandpaper is being use at last.
Grinding process is stop until
the require level of
observation of the sample is
being found. After that, the
sample is needed to polish to
have a clearer and better
vision.
Report done by,Lee Kok Yew Page 33
400 grit SiC paper
240 grit or lower SiC paper
600 grit SiC paper
800 grit SiC paper
1200 grit SiC paper
SiC abrasive paper
Grinding
Frequent Inspection
Recommendation for package cross-sectioning
POLISHING
The purpose of polishing is to softly grind the ground surface and create a smooth,
shinning, less undulation or flat surface by using better shock absorption grinding media.
There are two types of polish which are
1. Rough polish– remove scratches
- Hard cloth – Allied Kempad polishing cloth.
- Apply diamond suspension 6um & 3um
- Less “pull-out”, abrasive
2. Fine polish – to clean up blemishes
- Superior scratch removal
- Apply diamond suspension 1um
- Easily generate surface “relief” – smear
- Pull-out effect
- Final Polish
The procedures for polishing process are below
1. Place the polishing plate on the wheel base.
2. Let runny water on the rotating plate for about 2 minutes to clean the polishing pad.
3. Dry the pad by rotating the plate.
4. Apply necessary lubricant.
5. Polish with lower force.
6. Clean the sample with water and frequent inspect.
7. Final polish the sample for 10-15 seconds.
8. Clean and dry specimen.
9. Wash the polishing pad and dry it.
INSPECTION
For small feature, visual inspection at high magnification (mag x500) is required.
Frequent inspection during the grinding and polishing process is essential to avoid any
overgrinding.
Report done by,Lee Kok Yew Page 34
Diamond suspension
0.05um Alumina suspension
5.3 FINAL TEST
5.3.1 LOW POWER MICROSCOPE
The low power microscope is quite often used to capture pictures of power
packages as it increases the size of the picture so that a clear view of the packages can be
taken. There are various sizes where it can focus and measurements can also be taken on
these power packages using the low power microscope. A computer is connected to this
microscope and the picture can be seen on screen. Tiny power packages are normally
enlarged so as to view better images of the packages and usually, it is used to capture
pictures of the external surface of the packages and also after decapsulation. It can also be
used to see if there are any cracks of the power packages as these cracks cannot be seen
by naked eyes.
Low power microscope have been use for visual inspection should be carry out to
ensure there is no defect on the physical of the product, for example: external void/
bubbles, solder overflow incomplete mold, pitted surface, dirty unit chip/crack casing,
lead frame damage, compound overflow, clamp mark, scratches, flashes, and package
crack.
Figure 29: Low Power Microscope
Report done by,Lee Kok Yew Page 35
Package crack- Contamination on leadframe or cutting insert causes dent
on the leadframe.
Warpage Substrate- The loss of planarity of a plastic encapsulated molded
surface, excluding protrusions and intrusions.
Resin Bleed - Thin Transparent (sometime light yellowish) layer of mold
compound, remaining on leads, which is removable by Deflashing
Process.
Flashes- Flashes are the excess plastic material sticking out of the package
edges right after molding.
Flash/ Bleed- Bleed (transparent or light coloured) on leads and die pad at
package.
External Void/bubbles- Bubbles look alike structure on mold surface.
Pitted Surface- Reject for pitted surface > 1mm in length.
Crack Casing- Break-away mold compound or crack lines on units.
Scratches on Package- Reject for scratches on the top or bottom packages.
Leadframe Damaged- Physical damaged to leadframe that make it difficult
to process in the downstream machine and has reliability issue.
Compound Overflow- Mold compound covers too much of leadframe or
substrate and it is difficult to process through the downstream machine.
Report done by,Lee Kok Yew Page 36
5.3.2 HIGH POWER MICROSCOPE
The functions of a high power microscope are similar to the functions of low
power microscope. The difference is just that the high power microscope can enlarge the
images of power packages much more compare to the low power microscope. The high
power microscope are usually used to capture images of power packages after cross
section as it can focused more to the internal of the packages. A computer is also
connected to this high power microscope and measurements can also be taken using the
software provided.
High Power Microscope have been use for visual inspection should be carry out
to ensure there is no defect on the physical of the product, for example: oxidation mark,
cut mark, abnormality 3, wire mark imprint, solder balling, solder on die, and solder
overflow
Figure 30 : High power microscope
Figure 31: Oxidation mark Figure 32: Cut Mark
Report done by,Lee Kok Yew Page 37
6.0 PROJECT IN ON SEMICONDUCTOR
During my 12 weeks of internship period, I was assigned a task together with
another trainee. The task is to come out a mechanism that is able to transfer the unit from
one medium to another medium. More precisely, it means the mechanism is enabling the
operator to transfer the unit from plastic tube to metal tube and vice versa. We were given
a budget of total RM8000 for the design. My partner studied in product engineering so
the main idea of the mechanism is mainly design by her as she knows how to use AUTO
CAD to design it through computer. I was in charge of the electrical and mechanical part.
That is the valve of the mechanism, the air-cylinder and the circuit that control the whole
mechanism.
This is
the
roughly
idea of
the
mechanism that needed to be build out. The mechanism is able to transfer 4 tube of fully
loaded unit at a same time. The unit can be flow from metal tube to plastic tube and from
plastic tube to metal tube. It is fully control by the mechanical circuit.
PURPOSE
Report done by,Lee Kok Yew Page 38
PLASTIC TUBE
METAL TUBE
COVER
SUPPORT
DOUBLE ACTING AIR-CYLINDER
BASE
PLASTIC TUBE LOADER
METAL TUBE LOADER
The purpose of this mechanism is to simplify the operator when transferring the unit from
one medium to another. Before that, the unit is being transfer manually by the line
operator. It is so troublesome and sometimes the unit being drops out and left it scatter
around the floor. It will lead to production losses that will affect to the company.
PROCEDURE
I will briefly describe the
step and procedure for what
I have done during the
creation and assembly for
the mechanism.
Report done by,Lee Kok Yew Page 39
Unit is being transfer manually by the operator from one side to another.
The metal tube that will be put inside the oven for high temperature testing.
After being transfer, the unit will be put in the plastic tube and ready to do final packaging.
At the end of the day, you can see the unit being drop out during the transferring process.
The unit being scatter around the floor
Report done by,Lee Kok Yew Page 40
Thickness = 0.0364Tolerance = 0.01Unit in Inches
Thickness = 0.0345Tolerance = 0.01Unit in Inches
Plastic Tube and the dimension that is going to connect in the mechanism
Metal Tube and the dimension that is going to connect in the mechanism
Report done by,Lee Kok Yew Page 41
When the two inlet of both tube is connected, there is a small different of error. The plastic tube dimension is slightly bigger then the metal tube. Thus, it causes the unit unable to flow in from 1 of the tube to the other side of the tube.
Offset for both plastic and metal tube when connected
MECHANICAL AND
ELETRICAL PART
In the mechanism, I was
in charge of select and
design the suitable
mechanical equipment
that is usable for the
mechanism. The whole
mechanism platform is
function by the Double
Acting Air-Cylinder.
The knocker function is
to generate a non-stop
vibrating to the platform
so that the unit will keep
on flow from tube to
tube.
DOUBLE ACTING
ARIR-
CYLINDER
• For this
mechanism, we
Report done by,Lee Kok Yew Page 42
PLASTIC TUBE
METAL TUBE
COVER
SUPPORT
DOUBLE ACTING AIR-CYLINDER
BASE
PLASTIC TUBE LOADER
METAL TUBE LOADER
Overall idea and the part of the mechanism
Mechanical and electrical part for the mechanism
are using double acting Air-Cylinder to move the platform upward and
downward.
• Based on the calculation and aspect needed, the type of cylinder that we are using
is Compact Cylinder ISO Standards [ISO/21287] C55B-60
• From the requirement, we found that the bore size that is needed is 20 mm and
stroke size is 60mm.
KNOCKER
• Purpose is to knock the tube (plastic and
metal) so that the unit will not stop in between
when the platform is being tilt.
• The knocker will vibrate the tube and cause
the unit to flow smoothly.
• There are 8 knockers on the platform.
• 4 in the metal tube side and the other 4 in the plastic tube side.
Report done by,Lee Kok Yew Page 43
CIRCUIT DIAGRAM
KNOCKER
• This is the knocker circuit diagram.
• The control valve will cycle the air pressure to the
knocker to create the pulsation to the knocker.
• Thus it create a non-stop knocking process until the
air pressure is cut off
VALVE AND THE AIR-CYLINDER (moving upward)
• The piston is moving upward.
• Air pressure is going in through point A and coming
out through point B
• Using 5/2 valve to control the air flow.
VALVE AND THE AIR-CYLINDER (moving downward)
• The piston is moving downward.
• Air pressure is going in through point B and
coming out through point A
• Using 5/2 valve to control the air flow.
Report done by,Lee Kok Yew Page 44
7.0 PROBLEM
Below are some problems that I face during my practical industrial training
program. These listed below:
The chance for me to communicate to senior engineers as formally is limited.
I cannot optimize my ability to enhance my knowledge during an idle time.
Some material is confidential; therefore I didn’t allow enclosing together with my
report.
There is limited table and computer for trainee to use during the internship.
Therefore, we need to share table and pc with more than 2 people.
In the lab, some of the equipments are too expensive; therefore we need our
supervisor to accompany us when using it. It is quite troublesome.
Some of the places in the production line are forbidden for trainee to go and
therefore is limited for us to learn something.
Report done by,Lee Kok Yew Page 45
8.0 REFERENCES
http://sbnportal.onsemi.com
http://www.onsemi.com
http://newtsbn-a2.onsemi.com
http://www.onsemi.com/PowerSolutions/products.do
Operation manual
Explanation from engineer
Observation and experience
Report done by,Lee Kok Yew Page 46