multiprocessor communications
DESCRIPTION
TRANSCRIPT
Multiprocessor communications
Example 12.5
The master has been designated the address A whereas the slaves X,Y and Z have been designated the addresses B,C and D in hexadecimal. The master system wishes to send 50 bytes stored in memory to one of the slaves, say Z. Explain the sequence of operation.
Master-slave configuration
Mode 0
Mode 1
Mode 2 & Mode 3
Sequence of operation
BAUD_RATE needs to be decided
BAUD_RATE register will be loaded
Baud RateSource :XTAL1 frequency
MSB=1
B=BAUD_RATE register contents(15bits)+1
Mode 0:
BAUD RATE = XTAL1 frequency/(4*B)
Other Modes :
BAUD RATE = XTAL1 frequency/(64*B)
I/0 Control Register
Serial port control
Mode 2
Master system:
TB8 =1 ,REN=1, PEN=0, M2 M1=10
i.e. SP_CON =00011010=1AH
Slave register:
TB8 =0 ,REN=1, PEN=0, M2 M1=10
i.e. SP_CON =00001010=0AH
Enabling SIO
• SIO must be enabled in the masters as well as the slaves by making Interrupt mask register bit 6 = 1
i. e. IMR=01000000B=40H
Address frame
Start Sender address
Receiver address
TB8 Stop
1 1010 1101 1 1
SIO SR (slave systems)
Read SP_STAT
Branch to RI_ISR
Compare receiver address with system address
If not equal then enable interrupt
Return
Else switch to mode 3 by modifying SP_CON
Mode 3
Slave register:
TB8 =0 ,REN=1, PEN=0, M2 M1=11
i.e. SP_CON =00001011=0BH
(modified SP_CON for slave)
Mode 3
(Master modifies SP_CON to make 9th bit=0)
TB8 =0 ,REN=0, PEN=0, M2 M1=11
i.e. SP_CON =00000011=03H
Note:
M2M1=10 will also work
SIO ISR(Master system)
Read SP_STAT
Branch to RI_ISR
TI ISR in master
load the next byte in SBUF(TX)
Enable interrupt
Return
SIO ISR(Slave system)
Read SP_STAT
Branch to RI_ISR
RI ISR in slave Z
Read the data byte
Check if it is the last byte
If yes then enable interrupt
Return
Else store the data byte
Enable interrupt
Return
THANK YOU