Multiple BDF’s and Simulations in One Quartus Project Multiple BDF’s and simulations in one Quartus v18.0 project tutorial.

1) Create a new Quartus project (refer to the Quartus Tutorial for detailed instructions on this step). 2) Create and save the following BDF as “BDF1”

3) Switch the Project Navigator view to Files. Right click and set BDF1 as the top-level entity.

4) Compile the design. 5) Click File à New à University Waveform. 6) Add inputs and outputs to the simulation waveform. (Refer to the Quartus tutorial for detailed

instructions on this step).

7) Save the waveform as BDF1.

8) Click Simulation à Simulation Settings

Check the highlighted “vlog -work work” command and observe the argument is the default filename “Waveform.vwf.vt” instead of the current filename “BDF1.vwf.vt.”

9) To correct, click the “Restore Defaults” button and set VHDL as the language. The parameters should now be updated to include your file name and use the vcom binary.

10) Click Save in simulation settings. Then click File à Save. 11) Click Simulation and run the simulation (functional or timing).

12) Close the simulation. Add the following BDF to your project as BDF2. Set it as the top-level entity and compile (see step 3).

13) Click File à New à University Waveform. 14) Add inputs and outputs to the simulation waveform. (Refer to the Quartus tutorial for detailed

instructions on this step). 15) Save the waveform as BDF2.

16) Repeat steps 8 and 9. Check that the parameters have updated to reflect the current file name. Save the simulation settings. You are ready to simulate.

17)

18) Sometimes, it is helpful to construct multiple waveforms for one design. In these cases, it may be easier to “Save As” the current waveform to another name instead of starting from scratch. Save the BDF2 waveform as “Simulation3.”

19) Open the simulations settings for Simulation3.

Observe the settings retain the old file name. This means that if you run the new simulation, it will actually simulate the BDF2 waveform! Click “Restore Defaults” to update the command to the current file name and save the settings. You are now ready to simulate.

Conclusion Always check the simulation settings. Ensure VHDL is selected. Check the “vcom -work work” command is using the current file name. If it is not, use the “Restore Defaults” button to update the command. Remember that you can only simulate the top-level entity, so check the entity setting before you simulate. You will need to re-compile each time you change the top-level entity before you can simulate.