multi-stage power processingconfig.peac-conf.org/ckfinder/userfiles/files/p8.pdfmulti-stage power...

Multi-Stage Power Processing - Near Adiabatic Conversion and High Power Density

D. Tan, PhD, FIEEE

Director, IEEE Board of Directors

Senior Past President, IEEE Power Electronics Society

Founding Editor-in-Chief , IEEE Journal of Emerging & Selected Topics in Power Electronics

November 5, 2018

IEEE PEAC 2018 No Reprint Without Authorization

Why do we do two-stage power processing?

Isn’t it true that

90% x 90% = 81%?

The answer:

What’s happening is more like, for instance,

95% x 95% = 90%

2

Two-Stage Processing


3

Two-Stage Processing

Vo1

Co1

SGND

d

Vpri

CP

Input Stage

DC/DC

(Non-Isolated)

Output Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

d

F/B

(Iso)

(a) Regulated Intermediate Bus

(b) Unregulated Intermediate Bus

(c) Double Regulated Intermediate Bus


Intermediate bus voltage regulated, but the level is high (> 12V, scaled by duty ratio only)

Input, intermediate voltage level, and regulation

4

1. Regulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Input Stage

DC/DC

(Non-Isolated)

Output Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Output current can be pulsating

Single-ended buck or

buck-boost, non-isolated

Pulsating input current,

Pulsating input current, requiring large Cp at high

voltage level (>24V)

Typical load and line regulation for Vo1 is ±10%

Pre-droop introduces large cross and back

regulation and defeats the isolation

Pre-droop


Output and Thermal

5

Regulated Intermediate Bus

Double ended, push-pull, half or full bridge, isolated, fixed

virtual full duty ratio, fixed turns ratio

Vo1

Co1

SGND

d

Vpri

CP

Input Stage

DC/DC

(Non-Isolated)

Output Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Virtually non-pulsating input

current

Virtually non-pulsating output

current

Output voltage Vo1

unregulated

The output power stage is not the most

efficient at the point of load

Increased heat flux at the point of load, reducing

reliability IEEE PEAC 2018 No Reprint Without Authorization

Multiple outputs

6

Regulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Input Stage

DC/DC

(Non-Isolated)

Output Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Von

Vo1

Co1

SGND

d

Vpri

CP

Input Stage

DC/DC

(Non-Isolated)

Output Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Vo1

Co1

SGND

d

Vpri

CP

Input Stage

DC/DC

(Non-Isolated)

Output Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Prefer used in pairs (one-drives-one) for consistent performance

Extrapolation to one-drives-multiples scheme introduces cross and back regulations

For best performance, the bus converter is on the same board, increasing the thermal flux IEEE PEAC 2018 No Reprint Without Authorization

Input, voltage level, and regulation

Intermediate bus voltage level is low (< 12V, scaled by duty ratio and turns

ratio)

7

2. Unregulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Double-ended half or full bridge, isolated, virtual full fixed duty

ratio

Output current non-pulsating

Vib unregulated


current,


current, requiring only small Cp at high voltage level (>24V)

Typical load and line regulation for Vo1 is

±(5 – 7)%

No cross and back regulation since the output is regulated directly IEEE PEAC 2018 No Reprint Without Authorization

Pulsating input current

Non-pulsating output current

Single-ended, point-of-load converter, non-

isolated

Output and thermal

8

Unregulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Output voltage Vo1 tightly regulated

The output stage is the most


Reduced heat flux at the point of load, increasing reliability

The bus converter can be off the board (but close by), reducing further the heat flux IEEE PEAC 2018 No Reprint Without Authorization

Multiple outputs

9

Unregulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Von

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND


Vo2

Vib

Excellent performance for one-drives-multiples scheme with easy

implementation


No cross and back regulation since the output is regulated directly

Input, voltage level, and regulation

10

3. Double Regulated Intermediate Bus

Output current non-pulsating

Double forward , isolated, non-fixed duty ratio

Virtually zero voltage ripple

for Vib


current,

Vib regulated and voltage level is low (<12V)


current, requiring only small Cp at high voltage level (>24V)

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

d

F/B

(Iso)


Vib as a system design parameter to achieve adiabatic conversion Typical load and line

regulation for Vo1 is ±3% by virtue of

double regulation


Output and thermal

11

Double Regulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

d

F/B

(Iso)


The output power stage is the most


Reduced heat flux at the point of load, increasing reliability

The bus converter can be off the board, but in the vicinity, reducing further the heat flux

Single-ended, point-of-load converter, non-

isolated

Virtually non-pulsating input current

Non-pulsating output current

Output voltage Vo1 tightly regulated


Multiple outputs

12

Double Regulated Intermediate Bus

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

d

F/B

(Iso)


Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

d

F/B

(Iso)


Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

d

F/B

(Iso)


Vib

Von

Vo2

Excellent performance for one-drives-multiples scheme with easy

implementation


13

Double Regulated vs. Single Regulated END-TO-END EFFICIENCY

0.00

10.00

20.00

30.00

40.00

50.00

60.00

70.00

80.00

90.00

0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 9.00 10.00

Iout (A)

Eff

icie

ncy

(%)

BCM/POL: LOWLINE (Vin = 65V)

BCM/POL: NOMINAL (Vin = 70V)

BCM/POL: HIGHLINE (Vin = 75V)

PRM/VTM: LOWLINE (Vin = 65V)

PRM/VTM: NOMINAL (Vin = 70V)

PRM/VTM: HIGHLINE (Vin = 75V)

Measured End-to-End System Efficiency

96.00

96.50

97.00

97.50

98.00

98.50

99.00

0 2 4 6 8 10

Eff

icie

ncy (

%)

Iout (A)

Temp = -30°C

Temp = -20.0°C

Temp = -9.5°C

Temp = 0.1°C

Temp = 25.6°C

Temp = 45.6°C

Temp = 65.4°C

Record Efficiency Achieved for the POL Record Efficiency Achieved for the BCM

A record efficiency of 99% was obtained for the POL design

A record efficiency of 95.5% was obtained for the BCM design with

Vo=3.3V

Prototype brassboard demonstrated that the end-to-end system efficiency for the double regulated

bus is >13% better than that of the unregulated bus architecture

D. Tan, "A Review of Immediate (Intermediate) Bus Architecture: A System Perspective," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 2, no. 3, Sept. 201, pp. 363-373 (Invited)


For AC-DC, a PFC stage is usually added, particularly for single phase, providing new opportunities to further improving performance

14

Three-Stage Processing

Vo1

Co1

SGND

d

Vpri

CP

Output Stage

DC/DC

(Non-Isolated)

Input Stage

DC/DC

(Non-Isolated)

F/B

(Non-Iso)

Cib

Vib

PGND

(d) Typical Three-Stage Bus

Vaci

CP

Input Stage

AC/DC

(Isolated)

Pac

d

F/B

(Iso)

Vdc

QSC Audio, “Power Light Series of Pro-Audio Amplifiers Broke New Grounds,” QSC Audio, Nov., 1995

Non-isolated Unregulated Intermediate Bus


Relaxation of the isolation requirement opens doors for other topologies to be used

The multi-switch converters and the switched-capacitor converters are the most noticeable

General system performances are similar to those of unregulated intermediate bus

But they bring real benefits in

Achievable efficiency

Particularly in achievable power density

The benefits are scaled up by WBG power devices

15

4. Non-isolated Unregulated Intermediate Bus


Efficiency Parity

16

Si-based adiabatic POL GaN-Based Sw-Cap POL

96.00

96.50

97.00

97.50

98.00

98.50

99.00

0 2 4 6 8 10

Eff

icie

ncy (

%)

Iout (A)

Temp = -30°C

Temp = -20.0°C

Temp = -9.5°C

Temp = 0.1°C

Temp = 25.6°C

Temp = 45.6°C

Temp = 65.4°C

Record Efficiency Achieved for the POL

D. Cao et al., "An ultra efficient composite modular power delivery architecture for solar farm and data center," IEEE APEC, San Antonio, TX, 2018, pp. 73-80

D. Tan, "A Review of Intermediate Bus Architecture: A System Perspective," IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 2, no. 3, Sept. 2014, pp. 363-373

Efficiency under Various fs

Efficiency performance is similar, but half-resonant switched-cap circuits have a slight edge with WBG IEEE PEAC 2018 No Reprint Without Authorization

Power Density Improvement

17

D. Cao et al., "An ultra efficient composite modular power delivery architecture for solar farm and data center," IEEE APEC, San Antonio, TX, 2018, pp. 73-80

D. Tan, "A Review of Intermediate Bus Architecture: A System Perspective," IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 2, no. 3, Sept. 2014, pp. 363-373

Half-resonant switched-cap circuits have an edge (with WBG) in routinely achievable power density

Sw-Cap POL with Fan, Controller off Board Near Adiabatic POL

450W/4x1.063x0.236=448.44 W/in3 120W/1.50x1.50x0.3=177.78 W/in3

M. Chen, K. K. Afridi, S. Chakraborty and D. J. Perreault, "Multitrack Power Conversion Architecture," iIEEE Transactions on Power Electronics, vol. 32, no. 1, Jan. 2017, pp. 325-340,

GaN-Based Sw-Cap POL

Multitrack with Fan, w/ Iso, Controller off Board

75W/1.50x0.60x0.177=176.55 W/in3

Si-Based Multi-track Si-Based Adiabatic POL


Ultra efficient

≥ 98.5%, no dedicated thermal removal

3M

Multi-level, modular and multi-timescale

Distributed

Multi-channel, multi-phase, series-n-parallel

Integrated

Custom ASICs for low power and smaller size

Integration at system level

18

Near Adiabatic Power Conversion


19

Performance Summary

Input Power StageIntermediate Bus Voltage

Output Power Stage

Thermal Property RegulationMultiple Outputs

Regulated

• Single ended, Buck or Buck-Boost,

• Pulsating input current with large cap at bus voltage level (usually >24 V)

• Output current can be pulsating

• Regulated

High, usually > 12V

• Double ended, push-pull, half or full bridge

• Virtually non-pulsating input current

• Virtually non-pulsating output current

• Unregulated

• Most efficient power stage is not at output

• Increase point-of-load heat flux

• Reduced reliability

• Typical load/line regulation <±10%

• Cross regulation is large

• Back regulation is large

• Poor

Unregulated

• Double ended, half or full bridge as bus converter

• Virtually non-pulsating input current

• Non-pulsating output current

• Unregulated with fixed duty ratio

Low, usually < 12V

• Single endedpoint of load (POL)

• Pulsating input current


• Regulated

• Most efficient power stage at the output

• Reduced point-of-load heat flux

• Increased reliability


• No crossregulation

• No back regulation

• Excellent

Double Regulated

• Hybrid• Virtually non-

pulsating input current


• Virtually zero voltage ripple

• Output regulated

• Low, usually < 12V

• Value as a designparameter for max system performance

• Hybrid• Virtually non-

pulsating input current


• Output regulated

• Most efficient power stage at the output

• Reduced point-of-load heat flux

• Increased reliability


• No crossregulation

• No back regulation

• Excellent

D. Tan, "A Review of Immediate Bus Architecture: A System Perspective," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 2, no. 3, Sept. 201, pp. 363-373 (Invited)


20

TPE:

Technical Performance Excellence


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