rev 20180504

MPS Digital Multiphase VR Introduce

SZ FAE Lori

Mar. 2020

• MPS multiphase VR road map

• Basic terminologies

• Multiphase VR control methods

• Multiphase VR current balance

Outlines

MPS Multiphase VR Road Map

Multiphase VR Road Map – Intelli Phase

30A

70A

60A

80A

MP8690516V, QFN 4x4

MP8693416V, TQFN 3x4

20A

10A

MP86945A

16V, TQFN 4x5

MP8695616V, LGA 5x6

MP86901B16V, TQFN 3x4

MP86936

16V, TQFN3x6

MP8695716V, LGA 5x6Non Latch-off

Sampling

Released

Q2Q3 18’Q1 Q3Q4 Q219’Q1 Q3Q4

MP8693316V, TQFN 3x3

LGA5x6 is 5x6 Common FootprintLGA4x5 is 4x5 Common Footprint

MP8695016V, LGA 4x5

MP8692016V, LGA 4x5

MP8698516V, LGA 5x6

MP86990N16V, TLGA 5x5

MP86998

16V, TLGA 5x6

Multiphase VR Road Map – Intelli Phase

MP86902B MP86901C

MP86901B

MP86902A MP86901A

30A

25A

12A

19V 12V

3X4 3X4

3X4

3X33X3

MP86941

3X5

Co-package vs. Monolithic

• Separate driver IC can’t provide simultaneous on/off across the entire FET due to the gate delay.

• Need large dead time to ensure no shoot-through

• Distributed Gate Driver (DGD) minimizes the Gate Delay to <2ns, therefore ensures even current distribution among cells

Co-package vs. Monolithic

• Zero tempco due to monolithic die current sensing

Monolithic Current Sense Principle

Monolithic Current Sense Advantages

Monolithic Current Sense Advantages

Monolithic Temperature Sense Advantages

• Vtemp directly report intelli-phase junction temperature, but NTC solution just report Drmos case temperature.

• Better thermal management performance.

Multiphase VR Road Map - Controller

Intel IMVP

AMD Gaming SoC

AMD Server Processor

Nvidia GPU

AI Processor

Intel Xeon Processor MP2955A7-ph/ 2-rail

VR13

MP29657-ph/ 2-rail

VR13.HC

MP29758-ph/ 2-rail

VR13.HC

MP297212-ph/ 2-rail

VR13.HC

MP28535-ph/ 2-rail

SVI2

MP28559-ph/ 2-rail

SVI2

MP285213-ph/ 2-rail

SVI2

MP2888A10-ph/ 1-rail

OVR4+

MP2886A6-ph/ 1-rail

OVR4+

MP2884A4-ph/ 1-rail

OVR4+

MP29883-ph/ 1-rail

OVR3i

MP29657-ph/ 2-rail

AVS

MP29758-ph/ 2-rail

AVS

MP285213-ph/ 2-rail

AVS

MP2949A6-ph/ 3-rail

IMVP8

MP2940A3-ph/ 1-rail

IMVP9

MP2950A6-ph/ 1-rail

IMVP9

MP28535-ph/ 2-rail

SVI2

MP29718-ph/ 2-rail

VR14Sampling

Released

MP29266-ph/ 3-rail

AVS

MP297312-ph/ 2-rail

VR14

2017 2018 2019

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

MP288216-ph/ 2-rail

AVS

MP28559-ph/ 2-rail

SVI2

MP285213-ph/ 2-rail

SVI2

MP29455-ph/ 2-rail

SVI2

MP2979A6-ph/ 3-rail

IMVP8

MP29785-ph/ 2-rail

AVS

MP297212-ph/ 2-rail

AVS

Advantages

• Best transient in the market

• Minimized external components

• All digital control via PMBUS

• Built-in NVM, multi- programmable

• Automatic loop compensation

• Flexible phase assignment

Multiphase VR Road Map - Controller

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

3.3V

CS1

CS2

CS3

CS4

CS5

CS6

MP2975

VOSEN1

VORTN1

SCLK

SDIO

ALT#

VR_RDY1

VR_RDY2

IMON/CAT_FLT

ADDR_SP

VRHOT#

EN1

PSYS_CRIT#

SCLK

SDIO

ALERT#

VCCIO

VRRDY1

VRRDY2

CPU

PROCHOT#

EN1

VDD18

Psys_crit#

CS7

EN2EN2

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

Intelli-Phase

VDRV

VTEMP

AGND

VDD

SW

BST

VIN VIN

PGND

CS

PWM

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6

PWM7

CS1

CS2

CS3

CS4

CS5

CS6

CS7

VOUT1

PGND

VOUT2

PGND

3.3V

12V

3.3V

CS1

CS2

CS3

CS4

CS5

CS6

CS7

Efuse

3.3V

CAT_FLT#

PMBus Master

3.3V

Basic Terminologies

Phase and Rail

VR/MTP/VID/DVID/CS/APS/Loadline(droop resistor)

• VR means voltage regulator

• MTP means multiple-time programmer

• VID is same as Vref of DCDC converter

• DVID means dynamic VID

• CS means current sense

• APS means auto phase shedding

• Loadline(droop resistor) shows as picture

1.55

1.6

1.65

1.7

1.75

1.8

1.85

1.9

0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 160.0 180.0 200.0

Ou

tpu

t V

olt

age

(V

)

Load Current (A)

VccMAX VccMIN VID1_Loadline Min V @ I_Min (V) Max V @ I_Min (V)

• SVID Intel

• SVI2/3 AMD

• OVR NVidia

• PVID early Intel/POL

• AVS Arm-base IC

• PMBUS MPS and so on

Protocols: SVID/SVI2/3/OVR/PVID/AVS/PMBUS

Multiphase VR Control Methods

• Sophisticated pole and zero adjustment during operation

• Separated non-linear loop creates undershoot or ringback during tranisent

• Voltage mode control doesn’t guarantee cycle by cycle current sharing

Typical Voltage Mode Digital Control

p

ss

z

s

z

s

G

1

21

11

• Separated non-linear loop creates undershoot or ringback during tranisent

Dual Loop COT Control

• One fast loop takes care of both steady state and load transient

• MPS patented Technology-Simple, Fast and Fully Digital.

MPS Digital COT Control

Digital COT Control – Steady State

Digital COT Control – Load Step Up

Digital COT Control – Load Step Down

Multiphase VR Current Balance

Current Balance Introduce

Current Balance Introduce

• Why dynamic current sharing for multiphase is difficult for voltage and current control

• In load step up mode, the leading phase would increase PWM on time dramatically, but due to PWM switching cycle delay, the lagging phase supports less current

• Huge current stress on one phase during fast load step up

Current Balance Introduce

• Reducing PWM off time to support load step up, while PWM on time keeps constant

• PWMs are evenly distributed to each phase , so each phase carries the average current even transient

• Inherently much better dynamic current sharing than voltage and current control

Thank you