mos cascode stage with p-channel current sourcethe folded cascode configuration figure 8.36 on page...
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1
Figure 8.31on page 549
Cascode
P-channelCurrent Source
CS Gain Stage
Thévenin equivalent network:
MOS Cascode Stage with p-channel Current Source
Cascode Applications Lecture – EE330 – Dr. D. Estreich
November 8, 2017
From our last lecture slide set (Nov 6)
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Raising the Resistance of a Current Source Using Cascode
CascodedCurrent Source
Figure 8.32on page 549
The resistance of Q4 can beRaised by cascading with Q3.
→ r04 raised to (gmr03)r04
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Raising the Resistance Further By Use of Another Cascode Stage
Figure 8.33on page 550
1 0 0 1 2 02 01 3 03 04( ) ( )V m n p m m mA g R R g g r r g r r
What would AV be is all devices identical?
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Example 8.5 on Page 551
Design the cascode stage of the circuit shown on the rightto provide a current of 100 microamperes (A) and simultaneouslyhave a an output resistance of 500 k. Using a 0.18 micron CMOSprocess, the parameters you have to work with are
Determine gate length L and length-to-width ratio (W/L) for bothtransistors and find the values of gate bias voltages VG3 and VG4.
2
'
1.8 volts; 90 μA/V
5 V/μm
Assume 0.3 V
DD p OX
A
OV
V C
V
V
Extra: You might also want to work Exercise D8.18 on page 552.
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Distribution of Voltage Gain in CS Cascode Stage
Cascode
1 2 02 01
01 01 2
01
Obviously, ( )
Break gain into two parts: (2 stages)
V m m L
V V V
i
A g g r r R
v vA A A
v v
Figure 8.34on page 553
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Distribution of Voltage Gain in CS Cascode Stage(continued)
Cascode
01 01 2
01
1 1 01 2 2
2 2 02
Starting with
1where and
V V V
i
LV m in in
m m
v vA A A
v v
RA g r R R
g g r
Where did this expression for Rin2 come from?
Answer: From slide #1 of Nov. 6th lecture (Ref. next slide)
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Slide #1 from last lecture (on Monday Nov. 6th)
Figure 8.18on page 538
Figure 8.19on page 538
0
0
1
1 1
1
x m gs x L
x L Lin
x m gs m m gs m
v g v r i R
v r R RR
i g v g g v g
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Cascode
01 2
02
01
2 2 02 22
01 01 02
1 01 21
1
2
Evaluate:
11 1
1
m
in
L
L
Lm m mm
m iV
m
n
r R
R
rRr
Rg g r gg
r r r
gg
r RAg
Distribution of Voltage Gain in CS Cascode Stage(continued)
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The Overall Voltage Gain of the CS Cascode Stage
Cascode
1 2 02 01 2 02
2 02 01 012 02 01
2 02 0101
2 02
1 2 02 01
1 2
1
2
1
Evaluate:
Thus, V m L
V
V m m L m L
V V
V
m L Lm L L
Lm L
m
m m L
V V
A g g r r R if g r R
g r r R r Rg r r R R
Rg
A g R
AA A
A
r r Rr
g r
g g r r R
A A
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Common-Source Cascode Gain Stage Table
?
intrinsic
Table 8.1on page 554
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Let’s Go Further: Double Cascode Stages
And so on . . . .
Figure 8.35on page 555
We can continue to create ever higher resistances . . . But at what cost in parametertradeoff?
Cascode “2”
Cascode “3”
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The Folded Cascode Configuration
Figure 8.36on page 556
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Bipolar Transistor Cascode Configuration
The difference from the MOSFET is that we nowhave to include resistance r (now have r01||rinstead of r01).
Figure 8.37on page 557
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Bipolar Cascode Amplifier With Cascode Current Mirror
Figure 8.38on page 558