module title : operational amplifiers topic title : op … · 2/10/2016 · • describe the...

MODULE TITLE : OPERATIONAL AMPLIFIERS

TOPIC TITLE : OP-AMP PERFORMANCE

LESSON 1 : THE PRACTICAL OP-AMP

OA - 2 - 1

© Teesside University 2011

Published by Teesside University Open Learning (Engineering)

School of Science & Engineering

Teesside University

Tees Valley, UK

TS1 3BA

+44 (0)1642 342740

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________________________________________________________________________________________

INTRODUCTION________________________________________________________________________________________

Up until now, we have regarded the op-amp as having ideal properties. In this

lesson, we investigate some of the properties of actual op-amps to see how

they differ from the ideal.

Various parameters have been defined for an op-amp so that its performance can

be assessed as to its suitability for a particular application. Manufacturers offer

a wide range of op-amps and it is important that we can select the right one for

a particular task or identify a suitable replacement for an existing design.

________________________________________________________________________________________

YOUR AIMS________________________________________________________________________________________

On completing this lesson, you should be able to:

• calculate the error in output of an op-amp due to finite gain

• analyze the effects of negative feedback upon input and output

resistance of an op-amp

• distinguish between common-mode and differential gain

• define the CMRR (common-mode rejection ratio) and perform

calculations involving it

• describe the effects of negative feedback upon input voltage and

current offsets

• explain the operation of an instrumentation amplifier.

1

Teesside University Open Learning(Engineering)


________________________________________________________________________________________

STUDY ADVICE________________________________________________________________________________________

Reference is made to the general feedback equation and the effects of feedback

upon input and output resistance, so you may need to refer back to the first

lesson on the amplifier if you have forgotten about these topics.

________________________________________________________________________________________

REAL AND IDEAL OP-AMPS________________________________________________________________________________________

It would be useful to review the properties we have assumed of the ideal op-

amp before seeing the limitations of the actual beast! In the previous lessons,

assumptions were made about three aspects of an op-amp's behaviour - input

resistance, output resistance and gain.

What do we demand of the ideal op-amp in terms of input resistance, output resistance

and gain?

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2



The ideal op-amp will have infinite input resistance, zero output resistance and infinite gain.

Perhaps it is more important to appreciate why the op-amp needs these ideal

parameters in order to be a successful op-amp.

INFINITE AND FINITE GAIN

We have seen that the classical feedback equation

The ideal op-amp requires infinite gain so that its closed loop gain can be

determined by the external components which fix the feedback ratio H.

We can manipulate equation (1) to give an expression for gain in terms of the

ideal gain and an error term due to the finite gain of the op-amp. To

do this, first of all divide and multiply the right-hand side of equation (1) by H:

From which:

GH

GH

f

ideal error factor gain

= ×+

×

1 1

11

due to finite open loop gain

GH

HG

GH H

GH

GHf = × ×+

= ×+

11

11

GH

=⎛⎝⎜

⎞⎠⎟

1

GG

GHf .................................=+1

........... 1

reduces to if f

( )

=GH

1tthe open-loop gain is infinite.G

3



The amplifier of FIGURE 1 has an open-loop gain of 105. Calculate the percentage

error factor of the actual gain from the ideal if the ratio of R2 to R1 is :

(a) 10

(b) 100

(c) 1000

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FIG. 1

V2

–

+

R1

R2

V1

4



The percentage error factor in actual to ideal gain is given by:

(a) H = 1/10 so percentage error factor is:

(b) H = 1/100 so percentage error factor is:

(c) H = 1/1000 so percentage error factor is:

These results show that for maximum accuracy the open-loop gain should be

very high and the feedback ratio large.

1

11

10 0 001

100 99 01

5+

×

× =

.

% . %

1

11

10 0 01

100 99 90

5+

×

× =

.

% . %

1

11

10 0 1

100 99 99

5+

×

× =

.

% . %

1

11

100+

×

GH

%

The value of is given by HR

R1

2

.

5



DIFFERENTIAL AND COMMON-MODE GAIN

There is another aspect to 'gain' which we have to consider. In the ideal op-

amp, the gain is given by the equation:

The op-amp is a differential amplifier, since it amplifies the difference

between the two signals. If we were to be pedantic, we would say that the

ideal op-amp has a gain given by :

where GVD is the differential gain of the op-amp.

Now, having identified one type of gain would imply that there might be others

– and indeed there is another; a practical op-amp also has common-mode

gain.

In the case of the ideal op-amp, the assumption has been made that if the same

signal is present on both inputs, the output will be zero.

This is not the case for the practical op-amp; if the same signal is present on

both inputs, the output will not be zero. Due to circuit imbalances in the op-

amp, which will inevitably exist however careful is the design and manufacture

of the device, the signal on one input will be amplified by a different amount to

that on the other.

V G V VVo D= ( )+ – –

V G V VVo = ( )+ – –

6



It is shown in the Appendix that the output of a practical differential amplifier

can be regarded as consisting of two components :

• an ideal component GVD (V+ – V–)

• a non-ideal component, , due to imbalances in

the differential amplifier, in which the average input voltage

is multiplied by the common-mode gain GVC.

The average input voltage is called the common-mode input voltage VIC.

Thus the output voltage will be:

What is the output of the op-amp having the above transfer characteristic if:

(a) its two inputs are tied together?

(b) its two inputs are tied together and connected to zero volts?

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V G V V GV V

V Vo D C= ( ) ++( )

++– –

–

2

V V+ +( )–

2

GV V

VC+ +( )–

2

7



(a) Under such circumstances V+ will equal V– so that:

(b) Obviously if VIC = V+ = V– = 0 volts then

The point of this apparently trivial observation will be seen in the discussion

on 'offsets' shortly.

COMMON-MODE REJECTION RATIO

An ideal amplifier will have infinite differential gain and zero common mode

gain. The common-mode rejection ratio CMRR is a measure of the practical

amplifier's performance in respect of this ideal.

CMRR is usually quoted in decibels, so that:

A typical value for CMRR for a general purpose op-amp would be 90 dB.

CMMR = dBD

C

20 logG

GV

V

⎛⎝⎜

⎞⎠⎟

CMMR =differential gain

common-mode gain

V G VVo C IC volts= = 0

V G VVo C IC=

8



Calculate the common-mode gain of an amplifier having a differential gain of 105 and

a CMRR of 90 dB.

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Although, in the above example, common-mode gain might not seem

significant, there are circumstances where the differential performance of the

amplifier can be degraded. This will lower the CMRR, making the term

GVCVIC a larger proportion of the output.

From CMMR = dB

we have:

D

C

20 logG

GV

V

⎛⎝⎜

⎞⎠⎟

=antilog

CMMR20

=antilog 4.C

DGG

VV

⎛⎝⎜

⎞⎠⎟

105

55

=C

( )

GV 3 16.

9



INPUT RESISTANCE

The ideal op-amp will have infinite input resistance. This implies that the op-

amp will take no current from the signal source applied to its input. There is a

fundamental problem of measurement at work here : if we are to measure a

voltage of a circuit then it is important that we do not disturb the circuit by

drawing current from it. The measuring instrument should have infinite

resistance so that it does not load the circuit, but this implies that we can

observe something without actually interrelating with it. In practice, the

instrument must draw some current (energy) from the circuit in order to

measure the voltage, however tiny that current might be.

The real op-amp will have finite resistance (typically 1 MΩ for a general

purpose op-amp) and will, therefore, draw current from its source. In FIGURE

2(a), the input resistance of the op-amp, ri, is shown when 'looking into' the

input terminals to the device. There will also be a common mode resistance

between each input terminal and the earth line, as shown in FIGURE 2(b), but

in practice this resistance is very much larger than ri (one hundred times or

more) and we shall ignore it.

FIG. 2(a)

–

+

'Looking into' the inputs we see ri

ri

10



FIG. 2(b)

Will the application of negative feedback move the op-amp away from having

the ideal input resistance or towards it?

Consider first the case of the non-inverting amplifier (FIGURE 3(a)). This

circuit is an example of voltage-derived, series-fed feedback.

FIG. 3(a)

V2

+

–

V1

rif

R2

R1

ri

Resistance also exists between each input and earth

ri

11



FIG. 3(b)

FIG. 3(c)

–

+

V1

R1

R2

V2

ri = R1

V2

R2

V1

rif

–

+

12



What is the effect of voltage-derived, series-fed feedback upon the closed-loop input

resistance (rif) of the amplifier?

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The input resistance is increased by the factor (1 + GH) as shown in the first lesson.

Since the effect of feedback in the non-inverting amplifier is to increase its

input resistance, much less current will flow into it, so moving it further

towards the ideal.

Now consider the case of the inverting amplifier (FIGURE 3(b)). Note that in

the figure, the customary input resistor R1 has been omitted. This is because,

at the moment, we are interested in the input resistance to the op-amp, not the

amplifier as a whole.

This circuit is an example of voltage-derived, current-fed feedback. The effect

of this type of feedback upon the input resistance is to reduce it by the factor

(1 + GH).

In this circuit, the reduced input resistance (rif) appears across the inverting

input of the op-amp and the earth rail, thereby tending to pull the inverting

input towards earth potential. It is this very action that makes the inverting

input appear as a virtual earth; it is, however, only actually at earth potential if

the op-amp has infinite gain.

13



The shunting effect of rif across the input to the op-amp will reduce the current

flowing into it. So, in this configuration also, the op-amp is moved closer to

the ideal as far as its input resistance is concerned.

A rider must now be added though! If we refer to the complete inverting

amplifier circuit (FIGURE 3(c)), it can be seen that the input resistance to the

amplifier, rather than the op-amp, is determined by the value of R1, not rif.

This is, of course, due to the virtual earth at the inverting input. Usually the

value of R1 will be of the order of 1 to 10 kΩ which means that, unless the

circuit driving the inverting amplifier has a very low resistance, significant

loading of the signal source might occur.

OUTPUT RESISTANCE

When looking at the input resistance of the op-amp, we were considering it as

the recipient of a signal and stressing that it should not load or disturb the

signal source.

When looking at the output resistance of the ideal op-amp, we turn things on

their head by considering the op-amp as the origin of the signal that must not

be disturbed by the circuit that is loading it. In other words, we would like the

op-amp to behave as an ideal voltage generator whose output voltage does not

vary, irrespective of the current being drawn from it. To meet this requirement

it must have zero output resistance.

Will the application of negative feedback move the op-amp away from having

the ideal output resistance or towards it?

14



Voltage-derived feedback is employed in both the inverting and the non-

inverting amplifier configurations. The effect of this type of feedback upon

the output resistance is to reduce it by the factor (1 + GH). Thus negative

feedback will move the output resistance towards the ideal.

The practical op-amp has a typical output resistance of about 75 Ω.

________________________________________________________________________________________

OFFSETS________________________________________________________________________________________

In the context of op-amps, an offset is a d.c. voltage present at the output of a

practical op-amp, so that the output takes the form:

Perhaps, at the outset, we should make the observation that an offset is not a

signal dependent quantity; the magnitude of an offset is independent of the

input signal and is present whether the signal is applied or not.

In an op-amp, there are two types of offset, namely input offset voltage and

input offset current.

INPUT OFFSET VOLTAGE

Until now, we have made the implicit assumption that zero differential input

voltage will result in zero output voltage. From the transfer function for the

ideal op-amp,

it is clear that if V+ = V– then Vo is zero.

V G V VVo = ( )+ – –

V G VVo D I offset= +

15



Unhappily, real op-amps will not have zero output when the differential input

voltage is zero; there will be a d.c. offset voltage present on the output due to

imbalances in the circuit. FIGURE 4(a) represents an op-amp with an offset

voltage at its output. The offset voltage has been referred to the input for

reasons we shall see in a moment. All the imperfections of the practical op-

amp that cause the output voltage offset have been lumped together as a direct

voltage VIO applied to the non-inverting input of an ideal op-amp.

FIG. 4

In order to reduce the output to zero, an external input offset voltage VIO is

required to overcome the internally generated one, as shown in FIGURE 4(b).

In this example, the input offset has been applied to the inverting input. In

practice, the output offset can be of either polarity depending on the

idiosyncrasies of the particular op-amp, and we are unable to comment on the

polarity of VIO unless referring to a particular op-amp. Manufacturers will,

however, specify the maximum magnitude of VIO, and typically this will be

less than 10 mV.

–

+ Vo = 0VIO

VIO

–

–

+

+–

–

–

+

Vo = GV VIO

(Output offset)VIO

–+–

(a) (b)

Practical op-amp

Ideal op-amp

16



The process of removing offset is called nulling. In a practical circuit, it is

inconvenient to have to introduce a voltage generator into one of the inputs in

order to null the output. Many integrated circuit op-amps have offset null

connections which can be used to null the amplifier. FIGURE 5 shows a

typical arrangement.

FIG. 5

INPUT OFFSET CURRENT

The practical op-amp will have current flowing into its input terminals.

Indeed, for the successful operation of the amplifier, input bias currents are

required to flow into the bases of the input transistors. Again, we should note

from the outset that these currents are independent of any signals present on

the inputs; they are due, rather, to the d.c. biasing of the op-amp. They are

signal independent quantities.

V2

–

+

10 kΩ

+V

–V

Offset adjust

ON 1ON 2

Offset nullinputs

ON 1

ON 2

17



When an input bias current flows through any resistance present on its input

terminal, it will generate an offset voltage. Matters are further complicated by

the fact that the input bias currents flowing into the inverting and non-inverting

inputs are not equal, as it is impossible to get the two input transistors

identical. Each input bias current will, therefore, produce an offset voltage of

different magnitude.

FIGURE 6(a) shows the required input bias currents IIB– and IIB+ flowing into

the inverting and non-inverting inputs.

FIG. 6

The difference between the two currents IIB+ and IIB– is defined as the input

offset current IIO. Thus:

We are only concerned with the magnitude of IIO as its sign will depend upon

the relative magnitudes of IIB+ and IIB–, a factor which will vary between

individual op-amps of the same type.

I I IIO IB+ IB–= –

Vo

–

+

IIB–

IIB+ Vo

–

+

IIB

IIB + IIO

(a) (b)

18



Rather than quote two input bias currents, the average of IIB+ and IIB– is

quoted. Thus the input bias current IIB is defined as:

The bias currents flowing into the op-amp can now be represented as shown in

FIGURE 6(b). We assume that IIB flows into one input and(IIB + IIO) into

the other. In the figure, an arbitrary assumption has been made that the bias

current flowing into the non-inverting input is greater than that flowing into

the inverting input.

The input currents to the op-amp are tiny but, by flowing through high-valued

resistors on the input, they can cause significant voltage offsets at the output.

Typically IIO will be about 20% of IIB, with IIB of the order of tens of

nanoamperes for a BJT input state, tens of picoamperes for a JEFT input state

and as low as a few picoampere for a CMOS input stage..

EFFECT OF NEGATIVE FEEDBACK UPON OFFSETS

We have previously shown that negative feedback will enhance the

performance of the op-amp in terms of input and output impedance. We now

ask the question what is the effect of feedback upon the input offset voltage and

current? To answer this question, we will investigate the effect of each type of

offset separately and then combine the results to get the overall effect. Let's

consider input offset voltage first.

Effect on Input Offset Voltage

FIGURE 7 shows an ideal op-amp within an imperfect one, the latter having

but a single imperfection : that of an internally generated input offset voltage

VIO. The imperfect op-amp forms an inverting amplifier with R1 and Rf.

II I

IBIB+ IB–

2=

+

19



FIG. 7

Before doing any analysis, we should observe that it is the inverting input to

the ideal op-amp that is a virtual earth, the inverting input to the imperfect op-

amp has a potential V– = – VIO upon it.

We assume that no current flows into the op-amp, which means that we can

sum the currents flowing in the two resistors:

and substituting –VIO for V–:

from which:

VV R

RV

R

R21

1

1= +⎛⎝⎜

⎞⎠⎟

– –f

1IO

f

V V

R

V V

R1

1

2+=

+( )IO IO

f

–

V V

R

V V

R1

1

2––

–– –=( )

f

V2

V1

R1

Rf

V––

+

VIO

–+–

GV

20



The output voltage consists of the usual gain term plus an offset

component:

The effect of the feedback has been to amplify the voltage offset by:

Effect on Input Currents

The problem with input currents is that they can generate a differential input

voltage either because the input currents are unequal or because the resistances

they flow through are unequal.

FIGURE 8(a) shows an inverting amplifier with an input bias current IIB

flowing into the inverting input.

FIG. 8(a) FIG. 8(b)

V2

–

+

V1

R1

Rf

IIB

IIB + IIO V2

–

+

V1

R1

Rf

IIB

IIB + IIO

R2

11

+⎛⎝⎜

⎞⎠⎟

R

Rf

VR

RIOf11

+⎛⎝⎜

⎞⎠⎟

VR

R1f

1

21



Summing the currents at the inverting input,

from which:

The effect of the feedback has been to produce an output offset voltage of

(IIB + IIO) Rf. As the feedback resistor can be of a high value, this offset can

be significant, in spite of the bias current being measured in tens of nanoamps.

In the amplifier of FIGURE 8(a) R1 = 10 kΩ, Rf = 1 MΩ. The data sheet for the

particular op-amp used quotes the maximum values of IIB and IIO as being 500 and

200 nA respectively. Calculate the maximum output offset voltage.

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V VR

RI I R2 1= + +( )– f

1IB IO f

V

R

V

RI I1 2

1 fIB IO+ = +

22



The worst case input current is IIB + IIO = 700 nA. Thus the maximum offset voltage is:

In this example, we have taken the very worst case of maximum bias and

offset currents, and values of about 1 volt, or about 10% of the maximum

output voltage, are typical. Clearly, if we are to expect any precision from our

op-amp, we are going to have to do something about input bias currents. This

observation leads us nicely to FIGURE 8(b).

In FIGURE 8(b), a resistor R2 is included in the non-inverting input and a

current IIB is shown flowing through it (note the direction of the current).

Thus, the potential at the non-inverting input is:

Assuming that the amplifier has infinite gain implies that

and therefore

We can now sum the currents at the inverting input and then substitute

– R2IIB for V–:

V V

R

V V

RI I1

1

2– –– –+ = +f

IB IO

V R I– –= 2 IB

V V– = +

V R I+ = – 2 IB

I I RIB IO f volts!+( ) = × × × =700 10 1 10 0 79 6– .

23



Making V2 the subject:

and making the substitution for V–:

and finally, gathering terms:

VV R

RI R

R R R

RI R2

1

1

2 1

1

= ++( )⎛

⎝⎜

⎞

⎠⎟ +– –f

IB ff

IO f ........... 2( )

VV R

RR I R

R RI I R2

1

12

1

1 1= +⎛⎝⎜

⎞⎠⎟+ +( )– –f

IB ff

IB fIO

VVV R

RR I R

R R

R RI I2

1

12

1

1

=+⎛

⎝⎜⎞⎠⎟+ +(– –f

IB ff

fIB IO ))

=+⎛

⎝⎜⎞⎠⎟+ +( )

R

VV R

RR I

R R

RI I

f

fIB

fIB– –2

1

12

1

1IO RRf

VV R

RV R

R RI I R2

1

1 1

1 1= + +⎛⎝⎜

⎞⎠⎟+ +( )−– f

ff

IB fIO

24



We have three terms on the right-hand side of the equation:

(i) , the desired output of the amplifier

(ii) , an output voltage offset due to input bias

current

(iii) IIORf, an output voltage offset due to input offset current.

Remember that the direction of IIO has been arbitrarily chosen and it is usual

to add the offset voltages to give the worst case conditions.

What value of R2 is required to make the contribution to the output voltage due to IIB

zero?

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I RR R R

RIB ff– 2 1

1

+( )⎛

⎝⎜

⎞

⎠⎟

–V R

R1

1

f

25



which by re-arranging gives

Setting R2 equal to the parallel combination of R1 and Rf will null the voltage

offset due to IIB.

The same conclusion is reached, in less mathematical terms, by realizing that

R1 and Rf appear in parallel across the inverting input, as illustrated in

FIGURE 9. If the voltage generators were reduced to a Thévenin equivalent,

the equivalent resistance would be .

FIG. 9

Vo

–

+

V1

R1

Vo

Rf

R R

R R1 f

1 f+

RR R

R R21

1

=+f

f

We require to be zero, wffR R

R R

R– 2

1

1

+⎛⎝⎜

⎞⎠⎟

hhich implies:

ffR R

R R

R=

+⎛⎝⎜

⎞⎠⎟2

1

1

26



How can we minimise the voltage offset due to IIO?

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In equation (2), the offset voltage due to IIO is given by the term IIORf. Thus,

to minimise this voltage the value of Rf should be as low as possible. But Rf is

set by the ratio , the desired voltage gain of the amplifier. So, to minimise

Rf, for any set voltage gain, the value of R1 should in turn be as low as

possible. The value of R1, however, largely determines the input resistance of

the amplifier, which for a voltage amplifier will normally be high.

There is then, a conflict of interest between having a low value of Rf and a high

value of R1. To design for a low offset voltage, we must make R1 as low as

possible, commensurate with an acceptable input resistance. Conversely, for a

high input resistance, we must accept a high value of offset.

If such a compromise is not satisfactory, the input could be buffered by a

voltage follower stage to give a very high input resistance. The low output

impedance of the follower would then allow a low value of R1.

R

Rf

1

27



Finally, we are now in a position to write an equation that describes the output

of the imperfect op-amp having both input voltage and current offsets. If we

assume that the op-amp is linear, then the principle of superposition can be

used to simply add into equation (2) the contribution due to the input offset

voltage:

There is a total output offset, V2O of:

V I R RR R

RI R V

R

R2 21

1 1

1O IB ff

IO IOf–=

+( )⎛

⎝⎜

⎞

⎠⎟ + + +f

⎛⎛⎝⎜

⎞⎠⎟

VV R

RI R R

R R

RI R V2

1

12

1

1

= ++( )⎛

⎝⎜

⎞

⎠⎟ + +– –f

IB ff

IO If OOf11

+⎛⎝⎜

⎞⎠⎟

R

R

28



________________________________________________________________________________________

INSTRUMENTATION AMPLIFIERS________________________________________________________________________________________

We will complete this lesson by looking at an application which encounters

and overcomes some of the practical problems of real op-amps.

Instrumentation amplifiers are used to give precision amplification of the

output of a transducer. The transducer's output might be only a few millivolts

and located some distance from the 'electronics', possibly leaving the

connecting wire exposed to high levels of electrical noise. FIGURE 10(a)

shows a typical arrangement using a difference amplifier. The transfer

function of the amplifier is:

FIGURE 10(b) shows the signals and noise we might expect on the input to the

amplifier.

FIG. 10(a)

Vo

–

+

V2R1

R2

R2

R1V1

Rs

Vs

Inducedelectrical

noise

Transducer

+

–

VR

RV Vo = ( )2

11 2–

29



FIG. 10(b)

The wire connecting the transducer to the amplifier has picked up a lot of noise

which is presented to both inputs of the amplifier. The noise is a common

mode voltage and, in the perfect amplifier, should not appear on the output.

The signal, though, is applied as a differential voltage and a pure amplified

version of it should be given out.

An immediate snag with the op-amp circuit of FIGURE 10 is its low input

resistance. It can be shown (see Self-Assessment Question No 7) that the input

resistance of the inverting input is R1. If the amplifier is to have significant

gain, the value of R1 will have to be low, which will cause loading of the input

source. If greater accuracy is to be achieved, something will have to be done

about the circuit's input resistance.

+

0

–

+

0

–

+

0

–

Invertinginput

Non-invertinginput

Output

t

t

t

Signal Noise

Noise

30



FIGURE 11(a) shows how two non-inverting amplifiers, A1 and A2, can be

used to buffer the input to the difference amplifier A3. The non-inverting

amplifier has a very high input resistance because of the series feedback.

FIG. 11(a)

Vo

–

+

R1

R2

R5 = R1

A3

+

–A1

R6 = R2+

–A2

R4

R3

R7 = R4

R8 = R3

V2

V1

31



FIG. 11(b)

The circuit can be developed further by replacing resistors R3 and R8 of the

non-inverting inputs of A1 and A2 by a common resistor, as shown in

FIGURE 11(b). We can find the overall voltage gain of the arrangement as

follows :

The current I flowing through the resistor combination R4/R3/R7 is given by

and so the potential across R7 is:

IRV V

R RR

V V

R RR7

4 3

4 37

4 3

4 342 2

=+

× =+

×– –

.................... 3( )

IV V

R R R

V V

R RR R=

+ +=

+=( )4 3

4 3 7

4 3

4 37 42

– – as

Vo

–

+

R1

R2

R5 = R1

A3

+

–A1

R6 = R2

–

+A2

R4

R3

R7 = R4

V2

V1 V3

V4

I

32



We can now make use of the relation V+ = V– for the ideal op-amp to write

an alternative equation for I in terms of the input voltages V1 and V2.

Therefore, the potential across R7 is:

Equating (3) and (4):

so that:

and the overall gain of the instrumentation amplifier is given by:

V V VR R

R

R

Ro –= ( ) × +( )×1 2

4 3

3

2

1

2

V V V VR R

R4 3 2 14 3

3

2– –( ) = ( ) ×

+( )

V V

R RR

V V

RR4 3

4 34

2 1

342

– –

+× = ×

IRV V

RR

V V

RR7

2 1

37

2 1

34= × = ×

– – .................... 4( )

IV V

R= 2 1

3

–

33



How does the gain of the circuit of FIGURE 11(a) compare with that of

FIGURE 11(b)?

....................................................................................................................................................

....................................................................................................................................................

....................................................................................................................................................

....................................................................................................................................................

....................................................................................................................................................

....................................................................................................................................................

__________________________________________________________________________

The gain of each buffer stage in FIGURE 11(a) is and the gain of the output

stage is . Thus, the overall gain is given by :

If we wished to keep the resistor ratios the same, we would have to double the

value of R4 and R7 in FIGURE 11(a) or halve the value of R4 and R7 in

FIGURE 11(b).

The advantages of the circuit of FIGURE 11(b) are not simply that it saves us a

resistor, though! The buffer stages A1 and A2 form a differential amplifier in

their own right, as shown by their transfer function:

V V V VR R

R4 3 2 14 3

3

2– –( ) = ( ) ×

+( )

V V VR R

R

R

Ro –= ( ) × +( )×1 2

4 3

3

2

1

..................... ( )5

R

R2

1

R R

R4 3

3

+

34



The significance of this is that if a common-mode signal VIC = V2 = V1 is

applied to the input of this stage, then the output (V4 – V3) should be zero,

assuming the op-amps are ideal and the appropriate resistor ratios perfectly

matched. Even in the non-ideal real world, the differential potential

(V4 – V3) applied to the second stage will be very small, giving a good

overall CMRR.

This is not the case for the arrangement of FIGURE 11(a). If a common-mode

voltage VIC is applied to the inputs of the buffer stages, an amplified version

appears at their outputs. This much larger common-mode

voltage is then presented to the second stage. Thus, the overall CMRR is

considerably degraded.

VR R

RIC ×+4 3

3

35



________________________________________________________________________________________

SELF-ASSESSMENT QUESTIONS________________________________________________________________________________________

1. Calculate the percentage accuracy in output of the amplifier of

FIGURE 12 if it has an open-loop gain of 2 × 105, R1 = 10 kΩand R2 = 1 MΩ.

FIG. 12

2. Calculate the closed-loop input resistance of the amplifier of

FIGURE 12 if it has an open-loop gain of 105 and an open-loop input

resistance of 1 MΩ, when the ratio of R1 to (R1 + R2) is:

(a) 0.100

(b) 0.010

(c) 0.001

V2

+

–

V1

R1

R2

36



3. Details of the amplifier of FIGURE 13(a) are given below.

FIG. 13(a)

FIG. 13(b)

V2

–

+

V1

R2

R1

Rf

V2

–

+

V1

R1

Rf

I I V

R

IO IB IO nA, nA, mV= = =

=

300 800 8

101 k , closed-loop gainΩ = 100.

37



(a) Calculate the worst case error in output of the amplifier of

FIGURE 13(a) if the input signal is 10 mV.

(b) A resistor R2 is added to the amplifier, as shown in

FIGURE 13(b), to reduce offset. Calculate a suitable value of R2.

4. The arrangement shown in FIGURE 14 was used in an experiment to

measure the CMRR of the op-amp. The resistor R1 is used to adjust the

common-mode voltage V2 and the resistor R2 used to make small

adjustments of the differential voltage V1.

FIG. 14

–

+V1

V2V3

R1

R2

10 kΩ

10 kΩ

200 Ω

10 kΩ

– 12 V

+ 12 V

38



(a) If the output voltage of the amplifier is given by:

show that:

(i) if the differential input voltage V1 is increased by

ΔV1, the output voltage increases by approximately

GVD ΔV1.

(ii) if the common-mode input voltage V2 is increased

by ΔV2, the output voltage increases by GVC ΔV2

(b) The procedure for measuring the CMRR was as follows:

Firstly, R1 and R2 were set to zero and the voltages V1,

V2 and V3 recorded. R1 was then set to its maximum value

and the resistor R2 used to restore the output voltage V2 to

its original value.

The results obtained are tabulated below. Use them to

estimate the CMRR of the op-amp in dB. (Hint: use the

relationships established in part (a)).

R1 = 0 R1 = 10 kΩ

V1 0 V 30 mV

V2 0 V – 4 V

V3 35 mV 35 mV

V G V G VV

V Vo ,= + +⎛⎝⎜

⎞⎠⎟D C1 2

1

2

39



5. FIGURE 15 shows a difference amplifier circuit in which an input offset

voltage VIO has been introduced into the non-inverting input. Derive an

equation for the offset produced at the output.

FIG. 15

6. FIGURE 16 shows an instrumentation amplifier.

(a) Determine the value of the voltage gain for R2 at its

maximum and minimum values.

(b) The three op-amps are all part of the same 'quad package'

I.C. and due to temperature variation each is subject to an identical

input offset voltage of VIO = 0.2 mV. Estimate the magnitude of

the offset voltage produced at the output.

(c) The amplifier could be re-designed with unity-gain input buffers and

all the gain being provided at the output stage. From the results

obtained in part (b) above, comment on the suitability of such an

arrangement.

V

V Vo

1 2–

Vo

–

+

V2

V1 VIO

R1

R3

R4

R2

R1 = R3R2 = R4

– +

40



FIG. 16

V1

R1R2V2 +

–

R7

R5

–

+Vo

–

+

R4R3

10 MΩ

10 MΩ100 kΩ

200 kΩ

2 kΩ

100 kΩ

R6

10 kΩ 10 kΩ

10 kΩ 10 kΩ

41



7. (a) Derive an equation for the input resistance of the difference

amplifier of FIGURE 17 by using the following procedure (or

otherwise!):

(i) write an equation for I2 in terms of V2, V– and R1.

(ii) write an equation for V+ in terms of V1, R1 and R2.

(iii) substitute V+ for V– in step (i) and express I2 in

the form

(iv) transpose to give in the form of

(b) State under what input conditions the input resistance is:

(i) equal to R1

(ii) equal to R1 + R2

(iii) infinite.

V

I2

2

R

V

V

R

R R

1

1

2

2

1 2

1 –+

⎛⎝⎜

⎞⎠⎟

V

I2

2

V

R

V

V

R

R R2

1

1

2

2

1 2

1 –+

⎛⎝⎜

⎞⎠⎟

⎛

⎝⎜⎞

⎠⎟

V

I2

2

42



FIG. 17

Vo

–

+

V2

R1

R2

R1

V1

R2

I2

43



________________________________________________________________________________________

ANSWERS TO SELF-ASSESSMENT QUESTIONS________________________________________________________________________________________

1.

2.

The value of H is given by

(a) for H = 0.1

(b) for H = 0.01

(c) for H = 0.001

These values of input resistance are extremely high and in practice

would be limited by other effects such as the common mode resistance

to earth and insulation resistance between the tracks of the p.c.b.

r r GHif i M= +( ) = + ×( ) =1 1 1 10 0 001 105 2. Ω

r r GHif i M= +( ) = + ×( ) =1 1 1 10 0 01 105 3. Ω

r r GHif i M= +( ) = + ×( ) =1 1 1 10 0 1 105 4. Ω

R

R R1

1 2+

r r GHif i= +( )1

Accuracy =1

1 +1

where =

So

GH

HR

R R×

+100 1

1 2

%

= =

Acc

GH 2 1010 10

10 10 1 1019805

3

3 6× × ×

× + ×

∴ uuracy =1

1 +1

=

1980

100 99 95× % . %.

44



3. We must use the offset equation:

For a closed-loop gain of 100, Rf must be 1 MΩ.

(a) The resistor in the non-inverting input is absent, i.e. R2 = 0, so

the offset equation becomes:

For the values given:

This offset will give an error of 190% for an input signal of 10 mV. The

contribution due to VIO can, of course, be easily nulled, leaving V2O as

1.1 volts.

(b) The optimum value of R2 is which is 10 kΩ to the

nearest preferred value.

R R

R R1

1

f

f+

V29 6 3

6

4800 300 10 1 10 8 10 1

1010O = +( ) × × ×( ) + ×( ) +− − ⎛⎛

⎝⎜⎞⎠⎟

= + =V2 1 1 0 808 1 908O . . . volts

V I I R VR

R21

1O IB f IOf= +( ) + +

⎛⎝⎜

⎞⎠⎟IO

V I R RR R

RI R V

R

R2 21

1 1

1O IB ff

IO IOf–=

+⎛⎝⎜

⎞⎠⎟+ + +

⎛⎝f ⎜⎜

⎞⎠⎟

45



4. (a) (i) When the differential input voltage is increased by ΔV1 the

new output voltage becomes:

So that the change in output voltage is:

But as GVD > > GVC

(ii) When the common-mode input voltage is increased by ΔV2

there is no change in the differential input voltage and the

new output voltage becomes:

So that the change in output voltage is:

(b) What the procedure has done is to compensate for the change in

output due to a change in common-mode input by introducing a

differential input offset voltage. In other words:

G V G V

G

G

V

V

V V

V

V

D C

D

C

so that CMRR

Δ Δ

ΔΔ

1 2

2

1

=

=

Δ ΔV G VVo C= 2

V G V G V VV

V Vo ( )= + + +⎛⎝⎜

⎞⎠⎟D C1 2 2

1

2Δ

Δ ΔV G VVo D 1=

Δ ΔΔ

V G V GV

V Vo D 1 C1= +

2

V G V V G VV V

V Vo = +( ) + ++⎛

⎝⎜⎞⎠⎟D C1 1 2

1 1

2Δ

Δ

46



In our example ΔV2 = 4V and ΔV1 = 30 mV, giving:

5. Summing the currents at the inverting input:

and making the substitution V– = V+

where

Thus

V

R

V

R

R

R R

V

R

V

R

V

R

R

R2

1

1

1

2

1 2 1 2

1

2

2

1

– – – –+

⎛⎝⎜

⎞⎠⎟

=IO o

++⎛⎝⎜

⎞⎠⎟

+R

V

R2 2

IO

V VR

R RV V

R

R RV+ =

++ =

++1

4

3 41

2

1 2IO IO

V V

R

V V

R2

1 2

––

–+ +=( )o

V V

R

V V

R2

1 2

––

–– –=( )o

CMRR

dB

D

C

G

GV

V

=×

=

430 10

42 5

3–

.

47



and gathering terms:

The offset has been amplified by . This is the same result

as for the inverting amplifier with offset described in the lesson.

6. (a) From equation (5) derived in the lesson, we can write:

and substituting values:

(i) with R6 at its minimum value of 2 kΩ, the voltage gain is:

(ii) with R6 at its maximum value of 202 kΩ, the voltage gain

is:

V

V V

R R

Ro

–( )

1 2

7 6

6

2 2 99 202202

400202

⎛⎝⎜

⎞⎠⎟

=+

= × +

= == 1 98.

V

V V

R R

Ro

–( )

1 2

7 6

6

2 2 99 22

2002

100

⎛⎝⎜

⎞⎠⎟

=+

= × +

= =

V V VR R

R

R

Ro ( – )= ×+⎛

⎝⎜⎞⎠⎟×1 2

7 6

6

1

2

2

1 2

1

+⎛⎝⎜

⎞⎠⎟

R

R

V

R

V

R R

R

R

V

RV

Ro

IO2

1

1 2

2

1

2

1 1

11=

+⎛⎝⎜

⎞⎠⎟

+⎛⎝⎜

⎞⎠⎟

+ +–11

2

2

11 2

1 2

1

R

VR

RV V V

R R

R

⎛⎝⎜

⎞⎠⎟

= ( ) ++⎛

⎝⎜⎞⎠⎟o IO–

48



(b) The design of the input stage will cancel any offset, so the offset

produced at the output will be entirely due to the second stage.

The previous Self-Assessment Question has shown that, for

the difference circuit, the offset is multiplied by . As

R1 = R2, the output offset will be 0.4 mV.

(c) If all the gain is provided by the second stage, the input offset

voltage is magnified by .

For a gain of 100, the offset would be 101 × 0.2 ≈ 20 mV

compared to only 0.4 mV in the original design. We conclude,

therefore, that the amplification should be confined to the input

stage.

7. (a) (i)

(ii)

(iii)

(iv)

(b) (i) If is set to zero, then VV

IR1

2

21= .

IV V

R

V VR

R R

IV

R

V

R

R

R

22

1

12

1 2

22

1

1

1

2

=

=+

⎛⎝⎜

⎞⎠⎟

=

+

–

–

–

11 2

2

1

1

2

2

1 2

2

2

1

1

1

+⎛⎝⎜

⎞⎠⎟

=+

⎛⎝⎜

⎞⎠⎟

=

R

V

R

V

V

R

R R

V

I

R

–

––V

V

R

R R1

2

2

1 2+

1 1

2

+⎛⎝⎜

⎞⎠⎟

R

R

1 2

1

+⎛⎝⎜

⎞⎠⎟

R

R

49



(ii) If V2 = V1, the denominator becomes:

(iii) For the input resistance to be infinite,

This implies that

on the input.

The example illustrates that the input resistance to the amplifier is

dependent upon the differential input voltage. If the input of the

amplifier of FIGURE 17 was connected to a transducer, not only would

it load the transducer, but the load would vary with the magnitude of the

input signal. This effect is obviously undesirable.

V

V

R

R R1

2

2

1 2

1+

⎛⎝⎜

⎞⎠⎟

=

which will require the vooltage ratio V

V

R R

R1

2

1 2

2

=+

1 1

2

2

1 2

–V

V

R

R R+⎛⎝⎜

⎞⎠⎟

must be zero.

1 2

1 2

1

1 2

2

–R

R R

R

R R

V

+=

+

so that II

R R2

1 2= +

50



________________________________________________________________________________________

SUMMARY________________________________________________________________________________________

An ideal op-amp has infinite input resistance and zero output resistance. It has

the transfer function:

A real op-amp has finite gain, finite input resistance and non-zero output

resistance. Typical values for a general purpose op-amp are:

GV input output

resistance resistance

105 1 MΩ 75 Ω

In the ideal op-amp, negative feedback will give a closed-loop gain of:

In the real op-amp, an error is present because of finite gain:

A real op-amp also has a common-mode gain that modifies its transfer

function to:

V G V V GV V

V Vo D C= ( ) ++

++– –

–

2

GH

GH

f = ×+

1 1

11

GHf = 1

V G V VVo = ( )+ – –

51



The common-mode gain should be low in comparison with the differential

gain. The common-mode rejection ratio is a measure of the performance of

the op-amp in this respect:

Negative feedback will increase the input resistance and decrease the output

resistance by the factor (1 + GH).

The real amplifier also has offsets due to imbalances in the internal and

external circuitry.

The input voltage offset VIO is typically less than 10 mV and can be minimized

by an offset null potentiometer.

Input bias currents IIB are unequal, the difference being called the input

offset current IIO. The total output offset V2O for the inverting amplifier is

given by:

The contribution to offset due to input bias current is minimized by setting the

resistor in the non-inverting input equal to the value of the parallel

combination of the resistors connected to the inverting input i.e.

in the above equation.

RR R

R R21

1

= f

f +

V I R RR R

RI R

R R

R2 21

12

1

1O IB f

fIO

f= –+( )⎛

⎝⎜

⎞

⎠⎟ +

+⎛⎝⎜

⎞⎞⎠⎟

+ +⎛⎝⎜

⎞⎠⎟

VR

RIOf11

CMRR = D

C

G

GV

V

52



________________________________________________________________________________________

APPENDIX________________________________________________________________________________________

THE GENERATION OF A COMMON-MODE GAIN IN A DIFFERENTIAL

AMPLIFIER

FIGURE 18(b) shows how the differential amplifier of FIGURE 18(a) can be

constructed from two conventional amplifier stages A1 and A2. Note that the

amplifiers share a common feedback resistor Rf. This resistor has a potential

Vf across it due to the summing of the two currents I1 and I2 flowing from the

outputs of the amplifiers. The output of the differential amplifier is taken from

between the output of A1 and A2, that is Vo of FIGURE 18(a) is equal to

V1 – V2.

FIG. 18(a)

FIG. 18(b)

V2V1

A1

R

A2

I1 I2

V+ V–

VfRf

R

+

–

+

–

Vo

–

+

V–

V+

53



FIG. 18(c) and (d)

FIGURE 18(c) represents the amplifiers A1 and A2 as two voltage generators.

The upper half of this circuit (above the point 'X') can be represented by a

Thévenin equivalent generator with equivalent resistance as

FIGURE 18(d) shows.

From FIGURE 18(d), we can immediately write:

Refer back now to FIGURE 18(b). The input to A1 is (V+ – Vf) and that to

A2 is (V– – Vf). If the voltage gain of A1 and A2 is GV1 and GV2

respectively, then:

V G V V

V G V V

V

V

1 1

2 2

= ( )

= ( )

+ –

––

f

fand

VV V R

RR

ff

f

........................=+

×+

1 2

22

.. 6( )

R

2

V V1 2

2

+

R R

V2V1

I1 I2

VfRf

–

+

–

+

R2

(I1 + I2)

Rf Vf

(V1 + V2)2

X

54



giving a differential output:

and re-arranging:

and from (6) substituting for Vf:

The right-hand side of this equation consists of two components:

If the amplifiers are perfectly matched, so that GV1 = GV2, then the

differential term can be written as GVD (V1 – V2) and the common-mode

term will be zero.

G V G VV V R

RR

G GV V V V1 21 2

122

+ −+

×+

⎛

⎝

⎜⎜⎜

⎞

⎠

⎟⎟⎟

– – ( –f

f

22 )

different

iial term� ��

common-mode tterm� ��

V V G V G VV V R

RR

GV V1 2 1 21 2

22

– – –=+

×+

⎛

⎝

⎜⎜⎜

⎞

⎠

⎟⎟⎟

+ – f

f

VV VG1 2–( )

V V G V G V V G GV V V V1 2 1 2 1 2– – – ––= ( )+ f

V V G V V G V VV V1 2 1 2– – – ––= ( ) ( )+ f f

55



In the non-ideal case, the average voltage present in the common-

mode term can be referred to the input, so that the common-mode output can

be expressed as:

In practice, the amplifiers A1 and A2 will be transistors which will have been

fabricated alongside each other on the same chip and will be very nearly

identical to give a very high CMRR.

V V+ +( )×–

2common-mode gain

V V1 2

2

+

56



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