module iv

18
Module IV Digital to Analog Converter (DAC) and Analog to Digital Converters (ADC) 7.1 Introduction 7.2 D/A Converter A DAC accepts an n-bit input word d 0 ,d 1 ,d 2 ….d n in binary and produce an analog signal proportional to it. Figure shows circuit symbol and input-output characteristics of a 4 bit DAC. There are four digital inputs indicating 4 bit DAC. Each digital input requires an electrical signal representing either a logic 1 or logic 0. The d 3 is

Upload: dr-reeja-s-r

Post on 16-Apr-2017

27 views

Category:

Engineering


0 download

TRANSCRIPT

Page 1: Module iv

Module IV

Digital to Analog Converter (DAC) and Analog to Digital Converters (ADC)

7.1 Introduction

7.2 D/A Converter

A DAC accepts an n-bit input word d0,d1,d2….dn in binary and produce an analog signal proportional to it. Figure shows circuit symbol and input-output characteristics of a 4 bit DAC. There are four digital inputs indicating 4 bit DAC. Each digital input requires an electrical signal representing either a logic 1 or logic 0. The d3 is the least significant bit, LSB, where as d0 is the most significant bit, MSB.

Page 2: Module iv

The figure shows analog output voltage v0 plotted against all 16 possible digital input words.

Page 3: Module iv
Page 4: Module iv

7.3.2.2 Inverted R/2R ladder D/A Converter

Like binary weighted resister DAC, uses shunt resistors to generate n binary weighted current. However it uses voltage scaling and identical resistors instead of resistor scaling and common voltage reference

Page 5: Module iv

used in binary weighted resistor DAC. Voltage scaling requires an additional set of voltage dropping series resistance between adjacent nodes as shown in figure.

Here, each bit of the binary word connects the corresponding switch either to ground or to the inverting input terminal of the op-amp which is at the virtual ground. Since the positions of switches are at ground potential, the current flowing through resistance is constant and it is independent of switch position. These currents can be given as

I1=VR/2R

I2= (VR/2)/(2R) =VR/4R =I1/2

I3=I1/4

Similarly In=(VR/2n-1)/(2R) =I1/(2n -1)

We know that, Vo is given as

Vo= -ITRf

V0=-Rf(I1+I2+……+In)

Page 6: Module iv
Page 7: Module iv

Let us consider 3 bit R/2R ladder DAC with binary input 001 as shown in figure below

Reducing above network to the left by thevenin’s theorem we get,

Page 8: Module iv
Page 9: Module iv
Page 10: Module iv

7.5.2 Types of ADCs

i) Single Ramp ADCii) ADC using DAC which is called counter type ADCiii) Dual slope ADCiv) Successive approximation type ADCv) Flash ADC

7.5.2.1Single Ramp ADC

This is also called single slope ADC. It consists of a ramp generator and BCD on binary counters. The figure shows the single slope ADC.

Page 11: Module iv
Page 12: Module iv
Page 13: Module iv
Page 14: Module iv
Page 15: Module iv
Page 16: Module iv
Page 17: Module iv
Page 18: Module iv