microwave engineering & rf mems - ernetkjvinoy/rfmems/set5.pdf · e8242 microwave engineering...

E8242 Microwave Engineering & RF MEMS: KJ Vinoy

1 of 200

Microwave Engineering & RF MEMS

Part I

Overview of Microsystems & Their Fabrication


2 of 200What are Microsystems?

MEMS are systems that integrate…sensingactuationcomputationcontrolcommunicationPower

Microelectromechanical Systems (MEMS)Miniaturized device or an array of devices, combining electrical and mechanical components, fabricated using IC batch production techniques. On a common substrate (usually silicon) through microfabrication technology. Electronics by IC process sequences

(e.g., CMOS (most common now), Bipolar, or BICMOS processes), Micromechanical components by micromachining

ActuatorA device that generates force to manipulate itself, or another mechanical device, or the surrounding environment to perform some useful function

SensorA device that collects useful information from the surrounding environment, and provides one or more output variables to a measuring instrument

They are…smallermore functionalfasterless power-consuming

and cheaper!


3 of 200Three-axis integrated micro-accelerometer

Mechanical sensing elements + electronic circuits for signal extraction, conditioning, and amplification

Sandia’s three-axis accelerometer

Courtesy: Prof GK Ananathasuresh, ME


4 of 200How small are they?

0A 10 um 1 mm 100 mm 10 m

10 nm 1 um 100 um 10 mm 1 m

Ato

ms

Mol

ecul

esD

NA

Nan

ostru

ctur

esV

irus

Sm

alle

st m

icro

-el

ectro

nic

feat

ures

1 nm 0.1 um

Nanotechnology Microsystems Meso Macrosystems

Bac

teria

Bio

logi

cal c

ells

Dus

t par

ticle

sD

ia. o

f hum

an h

air

ME

MS

O

ptic

al fi

bers

Pac

kage

d IC

sP

acka

ged

ME

MS

Lab-

on-a

-chi

p

Pla

in o

ld m

achi

nes

Hum

ans

Ani

mal

sP

lam

tsPl

anes

, tra

ins,

and

aut

omob

iles

Precision machiningNano-machining

Micro-machiningMacro-machining



5 of 200Why are they exciting? Reason 1

Micro-technology brings engineering to the size scale of the “workshops” of the biological world.



6 of 200Micro-cage for biological cells

C. J. Kim, UCLABi-metal cantilevers curled due to residual stress.Opened with actuating the bottom membrane



7 of 200

Micromanipulators for biological cells

I I

I

I

I I

Cell probed with a single contact

Cell grasped with two contacts for manipulation

x

x O

x xO O

Controller

Gross motion stage

Circular motion stage

Fine motion stage

Light source

Microscope

CCD camera

Haptic interfacefor human operator

Tiltable arm

Compliant micro mechanism

I Input ports actuated by fine-motion stagesO Output ports in contact with cellx Observation ports for tracking and force computation

Compliant micro mechanism

xyz

x y z

Image processingComputation of forces and displacementsI/O to controller and haptic interface

PC

(Wang, Ibanez, Ananthasuresh, Kumar)

XY micro stage

XYZ-θnano stage



8 of 200Why are they small?

“Micro” size is almost incidental.

They are small because of the technologies used to make them.

And it is economical to make them small – when made in large volumes just like microelectronics.

Of course, there are some MEMS devices that would not work if they are any bigger.



9 of 200Why are MEMS exciting? Reason 2

400nm 700nmWavelength of visible light

The motions of micro-mechanical devices overlap with the wavelength of the visible light and thus allowing us to “play with light” in interesting and useful ways.



10 of 200A MEMS device with package is not micro-sized!

Motorola’s Manifold Pressure Sensor



11 of 200A bit of history…

“There is plenty of room at the bottom”- A 1959 lecture by Richard Feynman

Pioneered by Professor James Angell at Stanford University, researchers at Westinghouse in late 1960’s into 1970’s

Bulk etching of Si wafers for pressure sensors1970s

Pioneering work: K. Peterson “Silicon as a structural material” (properties, etching data) 1982

“Infinitesimal Machinery”- A 1983 lecture by Richard Feynman

Formal identity (“MEMS”) to the field came in late 1980’s

Surface micromachined polysilicon, comb drive actuators, disc drive heads 1980’s

Optical Applications MOEMS 1990’sCourtesy: Prof GK Ananathasuresh, ME


12 of 200MEMS devices in 1970’s

Roylance L.M., Angell J.B. “A batch fabricated silicon accelerometer” IEEE Trans. on Electron Devices 26, 1911-1917 (1979)

Accelerometer

Optical fiber connectorSchroeder C.M. "Accurate silicon spacer chips for an optical fiber cable connector" Bell. Syst. Tech. J. 57, 91-97 (1977)

Petersen K.E. "Micromechanical light modulator array fabricated on silicon" Appl. Phys. Lett. 31, 521-523 (1977)

Bassous E., Taub H.H., Kuhn L. “Ink jet printing nozzle arrays etched in silicon” Appl. Phys. Lett. 31, 135 (1977)

Ink-jet printer head

Petersen K.E. “Silicon torsional scanning mirror” IBM J. Res. Dev. 24, 631-637 (1980)

Micro mirrors for steering light

Microfluidic deviceTerry S.C., Jerman J.H., Angell J.B. “A gas chromatograph air analyzer fabricated on a silicon wafer” IEEE Trans on Electron Devices 26, 1880-1886 (1979)



13 of 200MEMS devices in late 70’s and early 80’s

Stemme G. “A monolithic gas flow sensor with polyimide as thermal insulator” IEEE Trans. on Electron Devices TED-33, 1470-1464 (1986)

Kimura K. “Microheater and microbolometer using microbridge of SiO2 film on silicon” Elect. Lett. 17, 80-82 (1981)

Other types of sensors

Najafi K., Wise K.D., Mochizuki T. “A high-yield IC-compatible multichannel recording array” IEEE Trans on Electron Devices 32, 1206-1211 (1985)

Ko W.-H., Hynecek J., Boettcher S.F. “Development of a miniature pressure transducer for biomedical applications” IEEE Trans. on Electron Devices T-ED26, 896-1905 (1979)

Clark S.K., Wise K.D. “Pressure sensitivity in anisotropically etched thin diaphragm pressure sensors” IEEE Trans. on Electron Devices TED-26, 1887-1896 (1979)

Pressure sensors

Gustafsson K., Hök B. “Fiberoptic switching and multiplexing with a micromechanical scanning mirror” Proc. 4th Int. Conf. on Solid-State Sensors and Actuators, Tokyo, June 3-5, P 212 (1987)Courtesy: Prof GK Ananathasuresh, ME

Optical switching and multiplexing


14 of 200What (more) are they?

Solid state transducersEarly on…

MEMSAnd later…

Integrated systems

sensorsactuators

• are batch fabricated• are economical• have more functionality• involve physical, chemical, biochemical

phenomena at small scales• act upon macro scale too

Take leverage of the enormously successful VLSI technologyCourtesy: Prof GK Ananathasuresh, ME


15 of 200Why Miniaturization?

Redundancy and arraysIntegration with electronics, simplifying systems (e.g., single point vs. multipoint measurement)Reduction of power budgetTaking advantage of scaling when scaling is working for us in the micro domain, e.g., faster devices, improved thermal management, etc.Increased selectivity and sensitivityWider dynamic rangeCost/performance advantagesImproved reproducibilityImproved accuracy and reliability


16 of 200Why miniaturization?

Exploitation of new effects through the breakdown of continuum theory in the micro domainMinimizing of energy and materials consumption during manufacturingMinimally invasiveSelf-assembly and biomimetics with nanochemistryMore intelligent materials with structures at the nanoscale



17 of 200Microsystems vs. IC Technologies

With IC technologies, we canMiniaturize Bulk produceAt low cost

But Microsystems technology value adds IC technology by incorporating

More features (bio-applications, sensors, actuators)More fabrication processesMoving componentsHelp ultra-miniaturize systems



18 of 200Why miniaturization?

Is it possible to build a pico-satellite (~10kg)?Is it possible to build a micro sized RPV/UAV?

What do these involve?Micro-turbinesMicro-valves…Array of micro-sensors



19 of 200Outline

What are they?How small are they?How are they useful

How do they work?

Pressure sensor

V

Capacitive sensing Piezoresistive sensingCourtesy: Prof GK Ananathasuresh, ME


20 of 200How do they work?

V

Accelerometer

Side view

Top view




Texas Instrument’s digital light processor

InFocus digital projectorsCourtesy: Prof GK Ananathasuresh, ME



(Source: www.howstuffworks.com)

torsional beam

actuating electrode 1

Tiltablemirror

torsional beam

actuating electrode 2

TI’s digital light processor (DLP)



23 of 200Accessories of DLP-based LCD projector

ProcessorMemoryColor wheelOpticsLight source




Ink-jet printer head

“drive” air bubble

ejectedink dropletWeight: ng

paper

resistive heater

orifice

Electronics are integrated to trigger the drive bubbleCourtesy: Prof GK Ananathasuresh, ME



VDiaphragm

A diaphragm pump

Passive inlet valve Passive outlet valve




A mechanical relay

V

Dielectric

Signal input

Signal output



27 of 200Major Application Areas

Automobile/TransportationConsumer ElectronicsDefense, SpaceMedical/BiologicalIndustrial/ControlTelecom (RF & Optical)


28 of 200Some Applications of Microsystems in Automobiles

Micromachine ApplicationAbs. pressure sensor Manifold abs. press.sensingAccelerometer Air-bag releaseTemperature sensors Inside and outside vehicleLevel sensor Oil and gas level Light sensor Turn on the lightsSolid state cameras Looking behind truck or carPressure sensors for exhaust gas recirculation Rain sensors Automatic wipersParking sensors Collision avoidanceOxygen sensor Air/gas ratio


29 of 200

Materials for MEMS

Alloys

Materials for MEMS

Substrate Thin films Packaging

Plastics Glass

Ceramic Semiconductor

MgOAlumina

Sapphire

SiGaAs

InPGe

Al

Semiconductor

Metal

Poly-silicon

Special materials

Plastics

Ceramic

Metal

AuCu

Pt

TiAg

Pd

Dielectrics

PZTSTO

BST

SiO2

Si3N4

PMMA


30 of 200Functions of Various Materials in Microsystems

SubstratesMechanical supportIC compatibility

Thin filmsStructuralSacrificialDielectric (polymeric/ceramic/silicon-based)Semiconductor (epi-layers)Conductor

Usually thin film materials may have multiple functions


31 of 200

Thin films used in MEMS

Thermal silicon dioxideDielectric layers

polymericceramicsilicon-compound

Polycrystalline silicon poly-Si

Metal films predominantly aluminum

Active MaterialsFerroelectrics Piezoelectrics


Role of Thin filmsStructuralSacrificialDielectric Semiconductor (epi-layers)Conductor


32 of 200What are they made of?

Phase 1: Old materials and old processesSilicon, its oxide, nitride, and some metalsIC-chip processing technology

LithographyThin film deposition (e.g., chemical vapor deposition – CVD)EtchingDoping

Phase 2: Old materials and new processesSilicon, its oxide, nitride, glass, polysilicon, and some metalsIC-chip processing techniques enhanced as “micromachining” techniquesSacrificial layer process

Deep reactive ion etchingLIGA HexilDissolved wafer process

Etc.Wafer bonding



33 of 200What are they made of (contd.)

Phase 3: New materials and old processesPolymersMore metalsCeramicsSilicon carbidePiezoelectric filmsFerroelectric filmsShape-memory materials, etc.

Phase 4: New materials and new processesProcesses unconventional to the microelectronic field

Processes that re-define the size of MEMS – micro to meso or nano

Deposition and etching for the new materials

e.g., PDMSGeorge Whitesides at Harvard



34 of 200How are they made?

Surface micromachiningDeposition of thin films (mainly polysilicon)Etching using masksLayered construction

Bulk-micromachiningCarving features into “bulk” wafers by etching

Wafer bondingPatterning individual wafersWafer-to-wafer bonding

LIGA, HEXSIL, and other HARM processesDRIEOthers: laser, micro EDM, etc.



35 of 200Micromachining is not precision machining!

Precision machining Relative tolerance (feature to part size) is better than 10-4.

For micromachining, it is 10-2 to 10-3.Roughly what we have for building houses.

With micromachining,

You can make it small, but not precisely.



36 of 200Description of a typical fabrication process

Being able to draw the process flow diagrams from a description.

Shallow pits were etched into n-type substrates, and p-type deflection electrodes were diffused in the above pits, followed by fusion bonding of a second wafer above the first. The top wafer was then ground and polished down to a thickness of 6 um. A passivation layer was then formed on the top wafer and sensing piezoesistors were formed using ion implantation, after which contact holes for metallization to connect to the diffused deflection electrodes were etched. Bond pads and interconnect metallization were then deposited and patterned, followed by etching of the diaphragm from the back of the wafer. Finally, two slots were etched next to the beam to release it over the buried cavity.

(Petersen et al., 1991)



37 of 200Process flow

Wire bond



38 of 200What is packaging?

Interface to the macro worldMounting Fluidic fittings for microfluidic devicesSample introduction for bioMEMSOptical windows for MOEMSRF ports, shielding in RF MEMS

Thermal managementProtection from environmentDamage due to handlingDirectly impacts the ability to calibrate and test



39 of 200Packaging!

Packaging is a big problem with MEMS. Sometimes, it may be better not integrate sensor/actuator and electronics.

Signal redistributionMechanical supportPower distributionThermal managementFluidic fittingsEtc.

Packaging access to and protection from the external macro world

Ball and wire bondingFlip-chipSandia’s processResearch continues…

Packaging serves…

Some techniques



40 of 200

Chip/package level integration of M and E of MEMS

Mechanical ElectronicDivide and rule!

Sandia’s chip-level integrative process

Motorola’s package-level integration

Unity is strengthCourtesy: Prof GK Ananathasuresh, ME


41 of 200

Modeling and design of MEMS –What is different?

Integration of sensor, actuator, mechanism, processor, power, and communication makes system level tasks challenging

-- common representation for multiple energy domains

Device level too has multiple energy domains-- macromodels

Component level-- coupled energy domain equations

Mask level-- geometric modeling



42 of 200Modeling and design of MEMS

System

Device

Component(physical)

Artwork of masksand process

Each level involves designThere is “analysis” (forward) problem and “synthesis” (inverse) problem.

Representing as block diagrams of multi-domain subsystems

Reduced order “macro models” of the components

Multiple, coupled energy behavioral simulations

Defining mask geometry for the process steps



43 of 200MEMS Development

Integrated circuits are made by successive deposition, photo patterning, and then etching of thin film on siliconIn ICs these processes are used to create small electrical device In MEMS these processes are used to create mechanical structure


44 of 200Further reading: Books

Principles of microfabrication – Marc Madou

Micromachined transducers: A source book – Greg Kovacs

Microsystem Design – Steve Senturia

MEMS: Advanced materials and fabrication methods – National Research Council

(NRC) committee report, 1997

An Introduction to Microelectromechanical Systems Engineering – N. Maluf

Sensor Technology and Devices – L. Ristic

Transducers, Sensors, and Detectors – R. G. Seippel

Microactuators: Electrical, Magnetic, Thermal, Optical, Mechanical, Chemical, and

Smart Structures – M. Tabib-Azar

Nano- and Microelectromechanical Systems: Fundamentals of Nano- and

Microengineering – S. E. Lyshevski

Microsensors, MEMS & Smart Devices - J.W. Gardner, V.K. Varadan , O.O.

Awadelkarim

The MEMS Handbook, M. Gad El Hak


45 of 200Further reading: The Worldwide web

http://www.nexus-mems.com/ European microsys nethttp://guernsey.et.tudelft.nl/indexold.html - Silicon Microoptics in Delfthttp://guernsey.et.tudelft.nl/farlinks.htmlhttp://www.dimes.tudelft.nl/ delft institute of microelectronics and submicron technol.http://www.postech.ac.kr/~khkang/Links.htm MEMS linkshttp://www.darpa.mil/MTO/MEMS/ DARPA MEMShttp://www.memsnet.org/ MEMS and Nanotechnology Clearinghouse http://transducers.stanford.edu/ Stanford transducers labhttp://www-bsac.eecs.berkeley.edu/ Berkeley Sensor & Actuator centrehttp://mems.jpl.nasa.gov/home.html JPL-MEMShttp://www.analog.com/index.html look up MEMS technology at Analog devices http://www.mcnc-rdi.org/index.cfm MCNC research home pagehttp://www.mems.louisville.edu UofL MicroTechnology Web Site http://www.dbanks.demon.co.uk/ueng/ Introduction to Microengineeringhttp:/www.dbanks.demon.co.uk/ueng/ Microsystems, Microsensors & Microactuatorshttp://www.ee.surrey.ac.uk/Personal/D.Banks/roughgui.html Introduction to Microengineeringhttp://www.memsrus.com/cronos/svcsmumps.html MUMPS Design Handbook www.memsrus.com/cronos/mumps.pdf

Note: There may be newer sites with better informationDisclaimer: Some of these sites may have changed addresses after this list is compiled!!


46 of 200Issues and Challenges

Nano/Micro technology RequiresMaterials for specific applicationDeposition of materials in thin/thick film formRemoval of materials etching/lithography/micromachining etcIntegration/packaging

Developing a successful microsystem requires inputs from experts in

Electronics for control/signal conditioningStructural analysisElectromechanical analysisMaterial synthesisVacuum/plasma technologiesChemical/bio/photonic/RF



47 of 200Important Useful Technologies

Lithography and selective patterningPhotolithographyLift-off technique (lithography + metallization)Chemical/plasma etching

Vacuum technologyCleanliness, Transfer of materials without contaminationRepeatable processing

Plasma technologyCreated in vacuum (with selected pure gases)Ion-bombardment to modify materials

Selective etchingDeposition

Change surface chemistryChange surface morphology


48 of 200Functions of Various Materials in Microsystems

SubstratesMechanical supportIC compatibility

Thin filmsStructuralSacrificialDielectric (polymeric/ceramic/silicon-based)Semiconductor (epi-layers)Conductor



49 of 200

Substrate Materials: Silicon

Silicon is used widely for mechanical sensor applications,

mechanical stabilityfeasibility for integrating sensing and electronics

Electrical Properties Conductivity type, dopantResistivity, Sheet resistance

Wafer typesPrime GradeReclaim GradeTest GradeSOI

Crystal typesCovalently bonded structure Diamond cubic structure( same as carbon in diamond)belongs to zinc-blendeclassification.Silicon with 4 covalent bonds, co-ordinates itself tetrahedrally. These tetrahedrons make up diamond-cubic structure


50 of 200

Crystallography of Silicon

(100) (110)

(111)


51 of 200Miller Indices

To identify a plane or a direction a set of integers h, k, l called Miller indices are used.Conventions

Notation To identify[ ] a specific direction< > a family of eqvivalent directions( ) a specific plane{ } a family of equivalent planes

Directions [1 0 0 ] [0 1 0 ] [0 0 1] are all crystallogra-phically equivalent and form the group <1 0 0> direction

A bar above an index is equivalent to a minus sign.

To determine Miller indices of a plane,

take the intercepts of that plane with the axes and express these intercepts as multiples of the basis vectors a1, a2 , a3. Reciprocals of these intercepts are taken to avoid infinities, multiplied by LCM to convert it to integer. This removes common factors.

Example:A plane intersects the crystallographic axes at (2,0,0), (0,4,0), (0,0,4).Step 1: (1/2,1/4,1/4); multiply by 4 to express as smallest integers.Step 2: (2,1,1) are the Miller indices. This is a (211) plane.


52 of 200

Identification of Various Silicon Wafers

Location of primary and secondary flats

Wafer Diameter 100(4”) 125(5”) 150(6”)Parameters

Primary flat (mm) 30 to 35 40 to 45 55 to 60Secondary flat (mm) 16 to 20 25 to 30 35 to 40Bow (mm) 60 70 60Total thickness variation (μm) 50 65 50Surface variation (100) or (111) (100) or (111) (100) or (111)


53 of 200Useful characteristics of Silicon

Silicon is the most widely used substrate for MEMS

Yet Silicon is NOT usually used in some cases:For very large device sizeLow production volumeWhen electronics in not needed or cannot be integrated

Sensory Mechanical

Piezo resistivity Better yield strengthThermal property Lower densityOptical property Better hardness


54 of 200Czochralski Crystal Growth Process

Courtesy: Prof Mohan Rao, ISU


55 of 200



56 of 200Other substrate materials…

Gallium ArsenideSecond most common semiconductorDisadvantages

Does not form sufficient quality native oxide; Thermally unstable above 600°C due to As evaporation; Mechanically fragile

Other optionsGlass, Fused Quartz, Fused Silica

Performance of various substrates (for general MEMS / IC applications)Substrate Cost Metallization Machinability Ceramic medium fair poorPlastic low poor fairSilicon high good very goodGlass low good poor


57 of 200

Thin films used in MEMS

Thermal silicon dioxideDielectric layers

polymericceramicsilicon-compound

Polycrystalline silicon poly-Si

Metal films predominantly aluminum

Active MaterialsFerroelectrics Piezoelectrics


Role of Thin filmsStructuralSacrificialDielectric Semiconductor (epi-layers)Conductor


58 of 200Thin films

The normal materials we come across (as they are called bulk materials) have fixed properties like electrical resistivity, optical opacity, etc.When the thickness is reduced, beyond certain limits these properties show a drastic changeThis is called size effect and this adds flexibility in designing devices for a particular application



59 of 200Why thin films ?

Bulk materials have fixed properties andhence their applications are limited

Thin film possess attractive properties and therefore can have versatile applications.



60 of 200

Bulk Material occupy lots of spaceand lead to larger device size

Thin films can be packed to form highly compact devices



61 of 200

Bulk form consumes plenty of materials, Most of which goes as waste

Thin film needs limited amount material and are very economical



62 of 200Thermal oxidation of Silicon

Oxidation involves heating of Si in wet/or dry oxygen/nitrogen mixture

Wet oxidationSi + 2H2O SiO2 + H2 (temperature: 600 to 12500C)

Dry oxidationSi + O2 SiO2 (temperature: 600 to 12500C)

Amount of silicon consumed is 46% of final oxide thicknessOxidation rates depends on;

Crystallographic orientation of Si(1 0 0 ) surface oxidizes 1.7 times more slowly than a (1 1 1 ) surface

Doping Presence of impurities in the oxidizing gas, Pressure of oxidizing gas Use of plasma or photon flux

Oxide thickness can be measured by Ellipsometer or color table


63 of 200Typical wafer oxidation set-ups


64 of 200Properties of thermal oxide


65 of 200Film Quality

The quality of the deposited film is evaluated by

Film compositionGrain sizeThicknessUniformityStep- coverageAdhesionCorrosion resistance


66 of 200Deposition process

SourceTransportCondensation on substrate

The nature of the film deposited depends on process parameters like substrate, deposition temperature, gaseous environment, rate of deposition etc.



67 of 200

Major deposition schemes

Physical vapor deposition (PVD)Evaporation

High temperatureSputtering

DC sputteringRF Sputtering

Chemical vapor deposition (CVD)Source contains the materialHigh quality filmsTypes

Plasma enhanced (PECVD)Atmospheric pressure (APCVD)Low pressure (LPCVD)Very low pressure VLCVDMetallographic (MOCVD)

OthersElectroplating (for very high thickness films, fast process, less control on thickness)Spin-castepitaxial


68 of 200Thermal Evaporation

Schematic diagram for a thermal evaporation systemProcedure

metal to be deposited is placed in an inert crucible chamber is evacuated to a pressure of 10-6 – 10-7 Torrcrucible is heated using a tungsten filament or an electron beam to flash-evaporate the metal from the crucible and condense onto the cold substrate

The evaporation rate is a function of the vapor pressure of the metal

Diffusion pump

shutter

Wafer holder

WaferMolten material

Vacuum enclosure

Heated crucible


69 of 200


70 of 200Deposition by Evaporation

Deposition rate for Al, 0.5µm/min i.e fast process, no damage on substrate.

Methods for heating:Resistive heating

eg in lab set ups.Tungsten boat/ filament as containment structure.Filament life limits thickness.( for industrial use)

Ebeam/RF induction: High intensity electron beam gun (3 to 20 kev) is focused on the target material that is placed in a copper hearth ( water cooled)The electron beam is magnetically directed onto the evaporant, which melts locally.No contamination from crucible.High quality films.High deposition rate 50 to 500nm/min.Disadvantages:

Process might induce x-ray damage and ion damage at the substrate. At high energy(> 10kev), the incident electron beam causes x-ray emission.Deposition equipment is more costly.

Al is the most popular interconnect material.Resistivity: 2.65μΩcm.Good adherance to Si/SiO2.Corrosion resistant, compared to Cu.Easy to deposit / etch.Ohmic contact is formed with Si at 450-500°C


71 of 200Typical evaporation process



72 of 200E-beam Evaporation

Can be used for titanium (Ti), gold (Au), nickel (Ni), and germanium (Ge) films. Platinum (Pt) and chromium (Cr) may also be possibleThe system is cryopumped (less than 2e-7 Torr). A thin-film crystal monitor can be used to measure deposition rate and thickness of the deposited films.E-beam evaporation uses an electron beam to heat a source. Electrons are generated with a heated filament and are accelerated to a velocity of several kV. Electron current is small, around 100 mA. A permanent, horse-shoe magnet bends and guides the e-beam in a circular path from the filament to the source. Material for evaporation is placed in disposable hearth liners made of carbon or copper. Material selection of the hearth is made based on the material being evaporated. E.g., Copper hearth liners are recommended for platinum evaporations.


73 of 200E-beam evaporation system


74 of 200

Sputtering

A physical phenomenon involving The creation of plasma by discharge of neutral gas such as heliumAcceleration of ions via a potential gradient and the bombardment of a ‘target’ or cathodeThrough momentum transfer atoms near the surface of the target metal become volatile and are transported as vapors to a substrateFilm grows at the surface of the substrate via deposition

The process is realized in a closed recipient, which is pumped down to a vacuum base pressure before deposition starts

Accelerated Ion

Sputtered atom

substrate

e- e-e- e-

e-e-

e- Primary electron

Anode

Cathode (target)

+Ve

Vacuum chamber

Accelerated Ion

Sputtered atom

substrate

e- e-e- e-

e-e-

e- Primary electron

Anode

Cathode (target)

+Ve

Vacuum chamber

e- e-e- e-

e-e-

e- Primary electron

Anode

Cathode (target)

+Ve

Vacuum chamber


75 of 200

Magnet Assembly

Target

Magnetic Field

Electric Field

Coating

Argon Ions Accelerated to the Target

Surface Atom Ejected from the Target

Magnetron Sputtering

AdvantageElectron ConfinementHigh ionizationLow pressure sputteringHigh purity of the films

DisadvantageNon uniform erosionThickness uniformityLess target utilization

Courtesy: Prof S Mohan, ISU


76 of 200Sputtering System


77 of 200Features

For ion sputtering, the substrates are put on the cathode (target); for sputter deposition, the substrates to be coated on the anode.The target, at a high negative potential is bombarded with positive argon ions created in a (high density) plasma. Condensed on to substrate placed at the anode.Advantages of sputtering over evaporation:

Wider choice of materials.Better adhesion to substrate. Complex stoichiometries possible.Films can be deposited over large wafer (process can be scaled)Sputter yield= #of atoms removed per incident ionSputter yields for various materials at 500ev Argon

Al 1.05 Cr 1.18Au 2.4Ni 1.33Pt 1.4Ti 0.51

Deposition rate is proportional to yield for a given plasma energyDisadvantages:

High cost of equipment.Substrate heating due to electron (secondary) bombardment.Slow deposition rate. (1 atomic layer/sec).


78 of 200

Target 3Target 2Target 1

Substrate

More than one magnetron targetComposition controlled by the power to individual targetsSubstrate rotation is required for composition uniformity.

Cosputtering



79 of 200Comparison of Evaporation and Sputtering

Evaporation Sputtering

Rate 1000 atomic layer/sec (thickness control is difficult)

1 atomic layer/sec (thickness control possible)

Choice of material Limited (to those with low melting point)

Almost unlimited

Purity Better Possibility of incorporating impurity

Alloy composition Little or no control Can be tightly controlled

Changes in source material

Easy Expensive

Decomposition of material

High Low

Adhesion Often poor Very good


80 of 200Laser Ablation

Uses LASER radiation to erode a target, and deposit the eroded material onto a substrate.High energy focused laser beams avoids x-ray damage encountered to the substrate.The energy of the laser is absorbed by the upper surface of the target resulting in an extreme temperature flash, evaporating a small amount of material.Material displaced is deposited onto the substrate without decomposition.The method is highly preferred when complex stoichiometries are required.Thin film keeps the same atomic ratio as the target material.Usually pulsed laser is used.Disadvantages

Not useful for large scale coatings.Small source size requires rotating of sample.


81 of 200Pulsed Laser Ablation deposition (PLD)

Pulsed laser ablation (PLA) is widely used to fabricate high quality thin films, e.g., superconducting materials such as YBa2Cu3O7-y Processing variables

laser energy, laser pulse repetition rate, substrate temperature oxygen background pressure.

Pulsed laser ablation uses short-wavelength lasers such as the KrF or XeCl excimer laser in a non-equilibrium process. The interaction of the laser with the target produces a high-temperature plasma and the evaporized material is ejected in a directed jet-like plasma stream or plume. The vaporized species contain a mixture of neutral atoms, molecules, and ions. Advantages

ease of operation and reproducibility. films do not require post-deposition annealing ability to accurately replicate the stoichiometry of the ablation target within the laser-deposited film; the high energy of the ablated species which may enhance the quality of film growth; it does not require hot filaments which allow a number of reactive gases to be present in the chamber during deposition; a wide array of complex chemical compounds can be deposited.


82 of 200Chemical vapor deposition

Chemical Vapor Deposition is chemical reactions which transform gaseous molecules, called precursor, into a solid material, in the form of thin film or powder, on the surface of a substrate


Constituents of a vapor phase, often diluted with an inert carrier gas, react at the hot surface to deposit a solid film.

Film-forming by Heterogeneous reactions

Occurring at or close to heated surface.

Homogenous reactionsOccurring in gas phase

Result in stoichiometric–correct film Used for

very thin Si deposition, copper, low dielectric insulators


83 of 200Process in CVD

Mass transport of reactant (and diluent gases ) in the bulk gases flow region from the reactor inlet to the deposition zone.Gas phase reactions leading to film precursors and by-products.Mass transport of film pre-cursors and reactants to the growth surface.Adsorption of film precursors and reactants on the growth surface.Surface reactions of adatoms occurring selectively on the heated surface.Surface migration of film formers to the growth sites.Incorporation of film constituents into the growing film.Desorption of by-products of the surface reaction.Mass transport of by-products in the bulk gas flow region away from the deposition zone towards the reactor exit


84 of 200Types of CVD

Atmospheric-pressure chemical vapor deposition (APCVD)Low-pressure chemical vapor deposition (LPCVD)Plasma-enhanced chemical vapor deposition (PECVD)

LPCVD reactor


85 of 200Several types of CVD reactors



86 of 200Typical cold-wall vapor phase epitaxial reactor


To improve the film quality in CVD,wafer chuck is heated to smooth out the film surface RF plasma ion bombardment to fill voidsfairly high temperatures used


87 of 200LPCVD of Si Compounds

22C500

24 H2SiOOSiH +⎯⎯⎯ →⎯+ °

CVD is used to form SiO2 layers that are much thicker in relatively very short times than thermal oxides.

SiO2 can be deposited from reacting silane and oxygen in LPCVD reactor at 300 to 500°C where

SiO2 can also be LPCVD deposited by decomposing dichlorosilane

HCl2H2SiOOH2HSiCl 22C900

222 ++⎯⎯⎯ →⎯+ °

Si3N4 can be LPCVD or PECVD process. In the LPCVD process, dichlorosilane and ammonia react according to the reaction

243C800 ~

322 H6HCl6NSiNH4HSiCl3 ++⎯⎯⎯ →⎯+ °

SiO2 can also be LPCVD deposited by from tetraethyl orthosilicate (TEOS or, Si(OC2H5)4)

by vaporizing this from a liquid source.


88 of 200LPCVD of Polysilicon

Polysilicon is also deposited by a similar technique A low-pressure reactor, operated at a temperature of between 600ºC and 650°C, is used to deposit polysilicon by pyrolizing silane:

2C600

4 H2SiSiH +⎯⎯⎯ →⎯ °

Most common low-pressure processes used for polysilicon deposition operate at pressures between 0.2 and 1.0 Torr using 100% silane.

Polysilicon comprises of small crystallites of single crystal silicon, separated by grain boundaries.

Polysilicon is often used as a structural material in MEMS.

This is also used in MEMS and microelectronics for electrode formation and as a conductor or high-value resistor, depending on its doping level (must be highly doped to increase conductivity).

When doped, resistivity 500-525μΩcmPolysilicon is commonly used for MOSFET Gate electrode:Poly can form ohmic contact with Si.

Easy to pattern


89 of 200MO-CVD

Metallo-organic chemical vapor deposition (MOCVD) is a relatively low temperature (200 – 800°C) process for epitaxial growth of metals on semiconductor substrates. Metallo-organics are compounds where each atom of the element is bound to one or many carbon atoms of hydrocarbon groups. For precise control of the deposition, high purity materials and most accurate controls are necessary. Due to the high cost, this approach is used only where high quality metal films are required. Also called organo-metallic vapour phase epitaxy

Thickness control of ~1 atomic layer.Used for

compound SC devices, opto electronic devices solar cells.


90 of 200MO-CVD System

http://www.thomasswan.co.uk/ccs_reactor.html

The reagents are injected into the reactor chamber through separate orifices in a water-cooled showerhead injector, to create a very uniform distribution of reagent gases.

A homogeneous gas phase is achieved at a distance of 5 mm below the showerhead

The very fine mesh of injection tubes (~100 / square inch) ensure ideal growth conditions and growth thickness uniformity right across the susceptor.

Uniformity of layer thickness Uniformity of alloy composition Abruptness of Interface Reproducibility of product New processes can be quickly optimised

Substrates are placed on top of a rotating susceptor, which is resistively heated.


91 of 200Deposition of Metals by CVD

Metal Reactants Conditions Al Trimethyl aluminum

Tryethyl aluminum Tri-isobutyl aluminum Demethyl aluminum hydride

200-300°C, 1 atm

Au Dimethyl 1-2,4 pentadionate gold, Dimethyl-(1,1,1-trifluoro-2-4-pentadionate) gold, Dimethyl-(1,1,1-5,5,5 hexafluoro 2-4 pentadionate) gold

NA

Cd Dimethyl cadmium 10 Torr, Cr Dicumene chromium 320-545°C Cu Copper acetylacetonate

Copper hexafluoroacetylacetonate 260-340°C 200°C

Ni Nickel alkyl Nickel chelate

200°C in H2 250°C

Pt Platinum hexafluoro-2,4-pentadionate Tetrakis-trifluorophosphine

200-300°C in H2

Rh Rhodium acetyl acetonate Rhodium trifluoro-acetyl acetonate

250°C,1 atm 400°C, 1 atm

Sn Tetramethyl tin Triethyl tin

500-600°C

Ti Tris-(2,2’bipyridene) titanium <600°C


92 of 200Molecular beam epitaxy


Ultra-pure elements such as gallium and arsenic are heated in separate quasi-knudsen effusion cells until they each slowly begin to evaporate. The evaporated elements then condense on the wafer, where they react with each other, forming, e.g., single-crystal gallium arsenide.

The process takes place in high/ultra high vacuum. A computer controls shutters in front of each furnace, allowing precise control of the thickness of each layer, down to a single layer of atoms.

Intricate structures of layers of different materials may be fabricated this way. These include structures where the electrons can be confined in space, giving quantum wells or even quantum dots. --Useful in many modern semiconductor devices, including semiconductor lasers and light-emitting diodes.


93 of 200MBE Reactor

The term "beam" simply means that evaporated atoms do not interact with each other or any other vacuum chamber gases until they reach the wafer, due to the large mean free path lengths of the beams.

The ultra-high vacuum environment within the growth chamber is maintained by a system of cryopumps, and cryopanels, chilled using liquid nitrogen to a temperature close to 77 kelvins (−196°C). The wafers on which the crystals are grown are mounted on a rotating platter which can be heated to several hundred degrees Celsius during operation.

Molecular beam epitaxy is also used for the deposition of some types of organic semiconductors. In this case, molecules, rather than atoms, are evaporated and deposited onto the wafer.

Other variations include gas-source MBE, which resembles chemical vapor deposition.


94 of 200Comparison of deposition schemes


95 of 200Typical electroplating system



96 of 200Spin casting

Casting is a simple technology which can be used for a variety of materials (mostly polymers). The control on film thickness depends on exact conditions, but can be sustained within +/-10% in a wide range. While using photolithography, casting is invariably used. Other materials such as polyimide and spin-on glass can also be applied by casting.



97 of 200Materials and MEMS

Mechanical propertiesElasticity

Chemical and electrochemical propertiesBio-compatibility issuesElectrical characteristics

ConductivityMobility

Thermal propertiesHeat conductivity, Expansion coeff.

Processing issuesfeasibility

Optical propertiesRoughness, crystalline


98 of 200Various forms of SiO2

SiO2 – SilicaFused silica is a purer version of Fused quartz Made from various Silicon gasses. 17 crystalline phases

Quartz single crystal material, low impurity concentrationFused quartz is the amorphous form of quartz.Fused quartz is made from natural crystalline quartz, usually quartz sand that has been mined.

GlassAmorphous solidUsually has impurities, Low melting temperature

Borosilicate glass An "Engineered" glass developed specifically for laboratories and heating applicationsSome common names are Pyrex™ by Corning, and Duran™ by Schott Glass. Dominant component is SiO2Boron and various other elements added



99 of 200Other Films

Si3N4Can be LPCVD deposited by an intermediate-temperature process or a low-temperature PECVD processKey Properties

low densityhigh temperature strength superior thermal shock resistanceexcellent wear resistance good fracture toughness mechanical fatigue and creep resistance good oxidation resistance

Key ApplicationsEtch maskGate insulatorThermal insulatorChemical resistant coating etc.

PolysiliconA low-pressure reactor, operated at a temperature of between 600ºC and 650°C, is used to deposit polysilicon by pyrolizing silane


100 of 200Metals

AluminumBasic electrical interconnections (common and easy to deposit)Non-corrosive environment onlyT < 300 °C (melting temperature = ? )Good light reflector (visible light)

Gold/ titanium/tungstenBetter for higher temperatureHarsher environmentsGold is good light reflector in the IR

Platinum and palladiumStable for electrochemistry



101 of 200Common conducting materials in MEMS



102 of 200

Summary of MEMS Materials: properties applications, techniques

Nickel Ferromagnetic materialLess brittle and more flexible than siliconGood electrical conductivity

Microlenses, microfluidics, smooth mirrors, magnetic recording media, magneto resistive heads, hearing aids and active catheters

Evaporation, electroplatingsputtering

Platinum Hard and corrosion resistant, non ferromagnetic, high TCR, Low stress

Suitable for applications that are exposed to high mag field where nickel, cobalt and copper can not be used for temperature measurements

Sputtering

Gold High reflectivityLow tensile stressLow electrical resistivity

Contacts in rf microswitches and micro relaysWafer level packagingReflective coating for micro mirrors

EvaporationSputtering

Copper Low electrical resistivityLow residual stressHigh mass density compared to Al

High aspect ratio micro structuresRF Mems switches3D conductive componentsLow voltage comb drive actuators for tunable capacitors

ElectroplatingSputtering



103 of 200Materials…contd

Silicon dioxide

Can be selectively etched with respect to silicon, silicon nitride and AlLow thermal conductivity (1W/mK)Low tensile stress

Sacrificial layerWafer bondingElectrical isolationThermal isolation

PECVDE beam evaporation

Silicon nitride

Low thermal conductivity (2.2 watt/mK)Low tensile stressMinimum chemical reactivityHigh hardnessHigh quality factor

Supporting membraneElectrical and thermal insulationResonators

PECVDSputtering

Porous silicon

Depth of sacrificial layer can be extended to few micronsEasily dissolved in KOH

Sacrificial layersTunable optical interference film

Anodizationof silicon

Silicon carbide

Hard, chemically inert, high thermal conductivity, electrically stable upto 300 C, Radiation resistant, etches in KOH only above 600 C

Micro propulsion, automotives, turbo machinery,

PECVD



104 of 200Materials Properties

Yield strength (109 N/m2= GPa)

Specific strength [103m2s-2]

Knoop hardness (kg/mm2)

Young's modulus (109N/m2

= GPa)

Density (103 kg/m3 )

Thermal conductivity at 300 K (W/cmK)

Thermal expansion (l0-6/°C)

Diamond (SC) 53 15000 7000 10.35 3.5 20 1 Si (SCS) 2.8-6.8 3040 850-1100 190(111) 2.32 1.56 2.616 GaAs (SC) 2 0.75 5.3 0.81 6 Si 3 N 4 14 4510 3486 323 3.1 0.19 2.8 SiO2 (fibers) 8.4 820 73 2.5 0.014 0.4-0.55 SiC (6H-SiC) 21 6560 2480 448 3.2 5 4.2 Iron 12.6 400 196 7.8 0.803 12 Tungsten (W) 4 210 485 410 19.3 1.78 4.5 Al 0.17 75 130 70 2.7 2.36 25 AlN 16 340 1.6 4 Al2O3 15.4 2100 275 4 0.5 5.4-8.7 Stainless steel 0.5-1.5 660 206-235 7.9-8.2 0.329 17.3 Quartz //Z 9 850 107 2.65 0.014 7.1 ⊥Z 13.2 Polysilicon 1.8 (annealed) 161 2.8


105 of 200Polymer Films

FeaturesSpin coated with varying thickness; few nm –hundreds of micronsUsed in sensing of chemical gases and humidityUsed as Photoresists,

SU8: Epoxy based photoresist can form layers up to 100 µmPolyimide

FabricationSpin-on,molding

CostLow



106 of 200Characterization Techniques



107 of 200Patterning Thin films

LithographyPhotolithography - Litho - stone + graphein – to write

Liftoff

Dry etchingx-ray, electron beam

Most common in MEMS

Difficult

Nano-scale

Good compromise for

Good results


108 of 200Photo lithography



109 of 200Mask

A stencil used to repeatedly generate a desired pattern and resist coated wafers

Consists of optically flat glass / quartz plate coated with an absorber (opaque to UV) pattern of metal. (eg, 800 Åthick Chromium layer)

Usually the mask is kept in direct contact with the photoresist while exposing to UV.

This results in 1:1 image on the wafer (contact lithography).

Pattern on the mask are made by e-beam lithography (higher resolution patterns)

Use CAD to make L-editUse LASER plotter (resolution)


110 of 200Resists used in Lithography

ResistPolymer base resinChanges structure when exposed

Resist consists ofSensitizer

controls photochemical reactionSolvent

enables spin casting

Types (tones) of resistsPositive tone

Photochemical reaction weakens polymere.g., PMMA (poly methyl metacrylate)

Negative toneExposed resists hardens by crosslinkage of polymer main chains


111 of 200Aligner


112 of 200Examples of Negative and Positive Resists

Positive NegativeSi Adhesion Fair

MoreSmall

Yes (with MLR)

Minimum feature <0.5μm <2μmOpaque dirt on clear portion of mask

Not very sensitive

Causes pinholes

Plasma etch resistance

Very good Not very good

Step coverage better lower

Excellent Cost LessDeveloper process window

Very wide

Lift off Yes (with SLR)

Lithography is used to patternMetals Dielectric thin filmsPolysilicon

RESIST TONEKodak 747 NegativeSU 8 NegativeAZ 1350J PositivePR 102 Positive


113 of 200Detailed Steps involved in Lithography

Objective: To pattern SiO2 layerOxide by wet oxidationResist coating

Spin coating

Soft bakingresist contains up to 15% organic solvent. removed by soft baking at 75-100ºC for ~ 10 minutes Release stress, Improve adhesion of the resist

UV exposure Wafer mask alignment UV lamp used to illuminate the resist should have;

Proper intensityDirectionalitySpectral characteristicsUniformity across the wafer

Developmenttransforms latent resist images joined during exposure into a relief image

Post bakingTo remove residual solventsAnnealing of film to improve adhesionImproves hardness of the filmdone at 120°C for approximately 20 minutes

Resist striping

Hot plate/ovenHot plate/oven


114 of 200Theoretical limits of Lithography

Smallest feature size by projection lithography is the same as the λ of the UV source

Factors affecting resolution Diffraction of light at the edge of an opaque feature in the mask Non uniformity in the wafer flatnessDebris between mask and wafer

For λ = 400nm Z=1µm resolution is approximately 1µm

Extreme ultraviolet lithographyRequirements

Reflective optics for camera.New resists.Imaging should be done in vacuum


115 of 200New generation lithography techniques

X-ray lithographyNo need for vacuum.Flood exposure is possible Resolution~0.5μm, registration ~0.2μm

Electron beam lithographyAn electron source that produces a small diameter spotA blanker for turning the beam on and offTwo electrostatic plates for directing the electron beam to the substrate

Ion beam lithographyResist is exposed to energetic ion bombardment in vacuum Point-by-point exposures with a scanning source (liquid gallium) or flood exposure with H+, He2+ or Ar+.


116 of 200E beam lithography

Uses a focused beam of electrons to form the circuit patterns needed for material deposition on (or removal from) the waferOffers higher patterning resolution than optical lithography because of the shorter wavelength possessed by the 10-50 keV electronsThe figure shows tiny lines drawn on silicon wafer using electron beam lithographyThe lines are 0.08 microns wide (It takes 1250 of them to make the width of one human hair)



117 of 200

Emerging Lithographic Techniques

Embossing lithography (nano imprinting)Molds made by e-beam lithographyRe-used several timesLower resolutionMuch higher throughput

Stamp lithography (soft lithography)Probe lithography

Oxidation by ‘arcing’ through a scanning probe (AFM probe)Slow speedFeatures < 100nm possible

Self-assembly lithographyMolecular levelStereo lithography for 3D (?)


118 of 200Lift-off Technique

Spin coating of positive photoresist

Resist exposure with mask

Patten developing

Metallization on the patterned substrate Removal of resist

UV light

mask

Oxide


119 of 200

Basis : Photolithography

• Photolithography defines regions on silicon wafers where machining is done.

• Machining includes etching, doping and deposition of thin films.

• Fabrication of three- dimensional structures with complexes forms only in two dimensions is possible.

• Extension to 3D structures can be accomplished to using wafer bonding.

Courtesy: Prof KN Bhat, IIT-M

Silicon Micromachining


120 of 200Building 3D Structures on Silicon

Lithography and other IC techniques are PLANARThese are used to pattern the topmost layer on a substrate

The focus of the beam is best over several wavelengths (~ nm)These fail for deep structures because

The accuracy and energy of the beam deterioratesHow can thick structures be built?

Built it a layer at a timeDeposit – pattern – deposit - pattern - etc…

But thin film properties can not be relied up on after a certainnumber of layers

Limits the height of the structureAlternately, sometimes we can use the substrate itself as building blocks

The 3D structure would consist of several layers of the substrate(s)Substrates are bonded together and diced

Non-silicon approaches


121 of 200Fabrication techniques for MEMS Devices

Surface micromachiningSurface micro machining (SM) build structures on the surface of the siliconSM Involves

Deposition of thin film of sacrificial & structural layerRemoval of sacrificial layer to release the mechanical structure

Micro structure fabricated using SM are usually planar structureDimensions of the SM structures can be several orders of magnitude smaller than bulk machined structure

Bulk micromachiningAllows selective removal of significant amounts of silicon from a substrate to form

membranes on one side of the waferA variety of holesOr other structures

BM can be divided into two;Wet etching

Liquid etchant (aqueous chemicals)Dry etching

Vapor and plasma etchantLIGA


122 of 200Comparison of Micromachining Techniques

Bulk micromachiningEmerged during 1960sUsed pressure sensors, Si valvesUsed to realize structures within bulk of a single crystal Si wafer by selectively removing wafer materialStructures may have thickness range from sub-micron to full wafer thickness, and lateral dimensions as large as few mmKey step is etching

Wet isotropicWet anisotropicPlasma isotropicReactive ion etching

Surface micromachiningEmerged during 1980sStructures are mainly located on the surface of the Si wafer and consists of thin filmsThe dimensions of these structures are several orders of magnitude smaller than structures generated by bulk micromachiningInvolves

Deposition of sacrificial layerDeposition and selective etching of structural layer(s)Removal of sacrificial layer


123 of 200Surface micromachining

Device to be fabricated

Oxidation of Si wafer

lithography

Oxide etching

Poly silicon deposition, doping, patterning, hardening

Removal of oxide (sacrificial layer)


124 of 200Detailed Process Steps

Sacrificial Layer deposition and etching LPCVD of PSG 2µmPSG by adding phosphorous to SiO2 → improved etch rate

Controlled window taperEasier to make poly layer

PSG is densified at 950°C for 30min Conductive (phosphorous goes up as dopant)Windows in the base layer for anchoring structures.

Deposition of structural material by CVD (or sputtering – PVD)Poly Si : LPCVD (25-150 Pa) in a furnace at 600°C from pure SilaneSiH4 → Si+2H2Typical process conditions: 605°C; 73 Pa (550 mTorr); Flow rate : 125 sccmDeposition rate: 100Å/min.To make the structure conductive, dopants are introduced

Along with silane or by ion implantation.Structures are patterned by RIE in SF6 plasmaSelective etching of spacer material

Structures are freed from substrate by undercutting of the sacrificial layerImmersed in HF solution to remove sacrificial layerPSG is removed by concentrated/ dilute / buffered HFTo shorten etch time, extra apertures are usually provided in the structure.Thicker layers etch faster.


125 of 200Surface Micromachining

Structural layerA layer of thin film material that comprises a mechanical device. This layer is deposited on the sacrificial layer, and then released by etching it away.

Sacrificial LayerA layer of material that is deposited between the structural layer and the substrate to provide mechanical separation and isolation between them.This is removed after the mechanical components on the structural layer are fully formed, by release etch. This approach facilitates the free movement of the structural layer with respect to the substrate.

But of course, these materials should be chemically distinct..

So that suitable etchant can be selected to remove the sacrificial layer without removing the structural layer AND the substrate etc.


126 of 200Material Pairs

Poly/SiO2LPCVD deposited poly as structural layer; Thermal or LPCVD oxide as sacrificial layerOxide dissolves in HF, and not poly.Both materials are used in IC fabrication.

Deposition and etching technologies are maturedMaterial systems are compatible with IC processing

Poly has good mechanical properties. Its electrical properties can be improved by dopingNitride can be used in this system for insulation

Silicon Nitride/Poly-SiliconLPCVD nitride is used as structural layer; Poly Si as sacrificial layerEDP or KOH to dissolve poly.

Tungsten/SiO2CVD tungsten as the structural layer; Oxide as sacrificial layerHF for etchant

Polyimide/AluminumPolyimide as structural layer, aluminum as sacrificial layerAcid based etchants to etch aluminumPolyimide has small elastic modulusCan take large strainsBoth can be fabricated at low temperatures <400°C

Other possible structural materials :Al, SiO2, Si3N4, Silicon oxynitride, polyimide, diamond, SiC, sputtered Si, GaAs, Tungsten, α-Si:H, Ni, W


127 of 200Stiction: A limitation in Micromachining

Large surface area of the cantilever beam tend to deflect through stress gradient or surface tension induced by trapped liquids attach to the substrate/isolation layer during the final rinsing and drying steps A stiction phenomena that may be related to hydrogen bombarding or residual contamination or Vander waal’s forces.

SEM micrograph of polysilicon cantilevers illustrating(a) the upward deflection of the beam and(b) the stiction problem.

Cross section of cantilever with stiction problem


128 of 200Approaches to Overcome Stiction

By forming bumpsIncreases process stepsUse of sacrificial polymer columns (along with oxide) Use isotropic oxygen plasma to etch the polymer after oxide etch.Reduce surface tension of the final rinse solution

Roughening opposite surface faces

Making Si surface hydrophobic

Freeze dryingSuper critical drying with CO2 at 35°C, 1100 psi

Release etch is done after all other wet processes are completed ( packaging)


129 of 200Stress in Thin film

Stress can be due to Mismatch of thermal expansion itselfNon-uniform plastic deformationSubstitutional / interstitial impuritiesGrowth process

It causes Film crackingDelaminationVoid formation

Special casesAl films are usually stress freeTungsten accumulates more stress when sputter deposited


130 of 200Silicon Nitride and Silicon Dioxide Etching



131 of 200Metal Etching



132 of 200Surface micromachining

Silicon wafer

Deposit or grow silicon dioxide

Pattern the oxide using a maskDeposit polysilicon

Pattern polysilicon

Sacrifice oxide layer by dissolving

The sacrificial layer process to make released structures (Berkeley)Courtesy: Prof GK Ananathasuresh, ME


133 of 200Bulk micromachining

Silicon wafer

Etch using a mask

Boron doping using a mask

Dissolve undoped silicon

Boron doped dissolved wafer process (Michigan)

Flip and bond to a glass

Glass



134 of 200Wafer bonding

Etch a cavity in a wafer

Thin down / polish and etch

Bond another wafer

Released cantilever using MIT’s wafer bonding processCourtesy: Prof GK Ananathasuresh, ME


135 of 200SUMMiT V

Oxide1

Oxide2

Oxide3

Oxide4

CMP

CMP

Poly0Nitride (0.8 um)

Thermal oxide (0.63 um)

A gear train on a moving platform.

Sandia Ultra-planar Multi-layer Micromachining Technology

Figures: courtesy of Sandia National LaboratoryCourtesy: Prof GK Ananathasuresh, ME


136 of 200Close-up of Sandia’s micro lock



137 of 200

Silicon Etching Processes


138 of 200

Wet Etching of Silicon

Why??CleaningShapingRemoving surface damagePolishingCharacterizing structural and compositional features

Some definitionsAspect ratio

Ratio of height to lateral dimensions of etched microstructures.Selectivity

ability of the process to choose between the layer to be removedand the interleaving layers(usually 40:1 is required)

Etch ratethe speed with which the process progresses

Etch profileslope of the etch wall


139 of 200

Wet etching………

Wet etching involvesTransporting of the reactants by diffusion at the surface Chemical reaction at the surfaceReaction products transported away from the surface

Materials that can be etchedSemiconductorsConductorsInsulators


140 of 200Facilities



141 of 200

Isotropic etching

Use acidic etchantsRounded patterns formed

Used forRounding of sharp edges (formed by anisotropic etching) to avoid stress concentrationsRemoving roughness after dry/anisotropic etchingThinning→ For creating structures / planar surfaces on single crystal SiliconPatterning single crystal , poly crystalline or amorphous filmsDelineation of electrical junctions and defect evaluation


142 of 200

Isotropic etching of silicon

Etch profile of Isotropically etched Silicon using HNA

With solution agitation Without agitating the solution


143 of 200

Iso etching…

Difficulties in isotropic etching Masking.Etch rate is agitation and temperature sensitive, Difficult to control lateral and vertical etch rates

Wet etchants for electronics materials

Material Etchant Etch rate (Å/min)

Si 3ml HF+5ml HNO3 + 3ml CH3COOH 3.5x105

GaAs 8ml H2SO4 +1ml H2O2+1ml H2O 0.8x105

SiO2 28ml HF + 170ml H2O + 113g NH4F 15ml HF + 10ml HNO3+ 300ml H2O

1000120

Si3N4 Buffered HFH3PO4

5100

Al 1ml HNO3 + 4ml CH3COOH + 4ml H3PO4+ 1ml H2O

350

Au 4g KI + 1g I2 + 40ml H2O 1x105

Cu FeCl3


144 of 200Types of etching

(100) silicon

(110) silicon

(111) plane

(111)

With agitation

Without agitation

Isotropic etching

Anisotropic etching

Slantedsurfaces

Top view



145 of 200

Anisotropic etching of Silicon

Anisotropic etching means different etch rates in different directions in the material (e.g., Crystalline Si)


146 of 200Isotropic and anisotropic etching of silicon

Isotropic etch Anisotropic etch

Anisotropic etch[110]

[100][100][100]

[100]


147 of 200

Anisotropically etched features

(110)(100)

(110)

SiO2

<111>

54.740

(100) wafer with a square mask


148 of 200Bulk micromachining for a cantilever

Top view of substrate Side view

Oxidized silicon wafer

SiSiO2

Photolithography to define cantilever dimensions and oxide etching

photo resist

Bulk micromachiningCantilever structure

Oxide etched by BHF


149 of 200Selection of (1 0 0 ) and (1 1 0) Oriented Silicon

(100) Oriented Si (110) Oriented Si

Inward sloping walls (54.74°) Vertical {1 1 1} walls

The sloping walls cause a lot of lost real estate

Narrow trenches with high aspect ratio are possible

Flat bottom parallel to surface is ideal for membrane fabrication

Multifaceted cavity bottom ({110} and { 1 0 0 } planes) makes for a poor diaphragm

Bridges perpendicular to a V-groove bound by (1 1 1 ) planes cannot be underetched

Bridges perpendicular to a V-groove bound by (1 1 1) planes can be undercut

Shape and orientation of diaphragms convenient and simple to design

Shape and orientation of diaphragms are awkward and more difficult to design

Diaphragm size, bounded by nonetching {1 1 1} planes, is relatively easy to control

Diaphragm size is difficult to control (the < 100 > edges are not defined by nonetching planes)


150 of 200

Anisotropic etchants

Alkaline aqueous solutions of KOH, NaOH, LiOH,…. NH4OHAlkaline organics, Ethylene di amine , chorine , hydrazinePerformance of common Etchants

KOH (Most popular)Use near saturated solution ( 1:1 in water) at 80°C.Selectivity with SiO2 is not very good.KOH is incompatible with IC fabrication process , since it attacks Al bond pads.It can cause blindness if gets into contact with eyesSelectivity with silicon dioxide - 400:1 For KOH

EDP –Ethylene diamine pyrocatehol +waterMasking SiO2, Si3N4, Au, Cr, AgSelectivity with SiO2 - 5000:1

Issues in anisotropic bulk micromachiningExtensive real estate consumptionLarge area wasted between devicesDevice becomes fragile


151 of 200

Anisotropic etching of crystalline silicon

Etchant Temperature Etch rate Etch rate Etch rate

<100> <110 > <111>

KOH:H2O 80 66 132 0.33

KOH 75 25-42 39-66 0.5

EDP 110 51 57 1.25

N2H4:H2O

118 176 99 11

NH4OH 75 24 8 1


152 of 200Silicon etching



153 of 200

Etch stop technique

Etch stop is a region at which the wet etching slows down

Dopant selective etching (DSE)Technique is useful for heavily doped layers, leaving behind lightly doped Advantages of DSE

Independent of crystal orientationSmooth surface finishOffers possibilities for fabricating release structures with arbitrary lateral geometry

DisadvantagesHigh boron conc. introduces mechanical stress into the material


154 of 200

Wet Etching

No expensive equipment required

Corrosive Acids or alkalies used

Waste products are also corrosive

Difficult to automate

Dry Etching

Carried out in plasma reactor

Safe non-toxic gases, e.g. O2 & CF4 used

Waste products are easily discharged

Ease of automation


Dry Etching vs Wet Etching


155 of 200

An ionized gas with equal number of positive charges (ions) and negative charges (electrons)Degree of ionization is small (~1 in 106)Electrons acquire high energy (~ 10000K)

High temperature reactions possible at low temperature

Highly reactive free radicals are generatede.g., CF4 → CF3 + F*

Si + F* → SiF4 (volatile)


What is Plasma?


156 of 200

(a) SputteringPhysical removal of SiVery good anisotropyPoor selectivity

(b) Chemical Etching

Gas phase species react with Si to form volatile productVery good selectivityPoor anisotropy

+Ion

NeutralPhoto-resistVolatile

Product

(a)

(b)

Etching Mechanisms in Plasma



157 of 200

(c)Energetic ion-enhanced etchingImpinging ions damage surface, increasing reactivity (Cl2 etching of undoped Si)Good selectivity & anisotropy

(d) Inhibitor ion-enhanced etchingRequires two different species –etchants (Cl2) and inhibitors(C2F6)Very good selectivity and anisotropy

Neutral+Ion

Inhibitor

PR

VolatileProduct

Neutral + Ion

VolatileProduct

PR

(d)

(c)


Etching Mechanisms in Plasma


158 of 200Dry Etching Techniques

Material removal for IC’s , MEMSBy physical

By ion bombardmentBy chemical

Chemical reaction through a reactive species at the surfaceOr Combination

Plasma etch

Steps involved in RIE Etching

1. Reactive etching species are generated by electron/molecule collisions

2. Etchant species diffuse through stagnant region to the surface of the film to be etched

3. Etchant species adsorb onto surface4. Reaction takes place5. Etched product desorbs from the surface6. Etch products diffuse back into bulk gas

and removed by vacuum


159 of 200Reactive Ion Etching (RIE)

Wet etching causes undercutUnidirectional etching is possible with RIEHigh fidelity pattern transfer

http://www.ee.byu.edu/cleanroom/rie_etching.phtml


160 of 200Deep Reactive Ion Etching

High aspect ratio, deep trench silicon etching process. The principle of the deep trench silicon etching process is an alternating fluorine based etching and passivationof the structures. Masking layers can be made of photo resist or silicon oxide.The main benefits of the DRIE are:

etch rate of up to 6 µm/minaspect ratio up to 40:1selectivity to positive resist > 75:1selectivity to silicon oxide >150:1etch depth capability 10 to 550 µm (through wafer etching)sidewall profile 90°±1°feature size 1 to >500 µm


161 of 200The system…


162 of 200Deep Reactive Ion Etching



163 of 200

Process alternates between etching and polymer depositionSF6/Ar used for etchingCHF3/Ar used for polymerizationSelectivities:photoresist(100:1), SiO2(200:1)Aspect ratio up to 30:1(sidewall angle 90±2o)Etch rates of 2 to 3μm/min


Deep Reactive Ion Etching (DRIE)


164 of 2003D Micro-Structure by DRIE and Fusion Bonding



165 of 200

SAMCO's RIE-200C is a cassette-

to-cassette Reactive Ion Etching

system designed for high volume

manufacturing. The 240mm

stainless steel sample stage

allows for processing wafers of up

to 8" in diameter.

Deep Reactive Ion Etching System



166 of 200

Wafer Bonding Processes


167 of 200

BONDING PROCESS

Bonding is the crucial part in mounting MEMS

low mounting stress low sensitivity to static pressure

TypesFusion bonding ( Si & Si ) Anodic bonding ( Si & glass)Eutectic bonding Bonding with glue



168 of 200Wafer Bonding Techniques: Anodic Bonding

Also called field-assisted thermal bonding, electrostatic bonding, etc. Typically done between a sodium glass and silicon for MEMS.

Cathode: glass (or silicon with glass thin coating) Anode: silicon waferVoltages: 200 to 1000 V. Anode is put on a heater: 180-500°C.

During the bonding, oxygen ions from the glass migrate into the silicon resulting in the formation of silicon dioxide layer between silicon wafer and glass wafer and form a strong and hermetic chemical bond. Advantage: low temperature used can ensure the metallization layer (Aluminum) could withstand without degradation.

Anodic bonding is also used to seal two silicon wafers together by using a thin sputter-deposited glass layer.

The equipment used in this case is basically a heat chuck element with an electrode capable of supplying high voltage across the structure to be bonded. The system automatically controls the temperature and power supply during the bonding process.

Anode (heater)

Cathode

Glass

Silicon

V+

-


169 of 200

300 – 500oC alkali-metal ions in the glass become mobile.

When High voltage is applied across the components alkali cations migrate from the interface , resulting in a depletion layer with a high electric field strength =>silicon and glass into intimate contact.

Further current flow of the oxygen anions from the glass to the Si results in an anodic reaction at the interface => permanent chemical bond.

Key success : thermal expansion match



170 of 200



171 of 200

Corning 7740

Key success : thermal expansion match



172 of 200

Ion drift process in the glass

Key Process: thermal and field assisted activation of ions and their drift during the bonding => results in a polarized depletion layer in the glass in the interface.

ION drift process (published work; ref. Schmidt…Sensors and actuators,A67, 1998— p191 )

sodium, oxygen, hydrogen using elastic recoil detection analysis (ERDA)



173 of 200

Anodic oxidation of silicon under the presence of water affords SiO2, as shown in

Si + 2H20 → SiO2 + 4H+ + 4e-

A similar mechanism can be formulated regard to the formation of Si-O-Si :

Si + --O--Si--OH → --Si--O---Si-- + H + + e-

On the other hand, anodic oxidation of sodium oxide may proceed in a manner represented by :

Na20 → 2Na+ + ½ O2 + 2e-Na20 + H+ → 2Na+ + OH-


BOND FORMATION MECHANISM


174 of 200PROCESS PARAMETRS :

Temp. ~~~~ 200 – 500oC Voltage ~~~~ 200 – 1000 VTime ~~~ ~~ 1 – 5 mintsSurface ~~~~ as smooth as possible ( less than 20 A)Thermal expansion : should be matched ( cornong 7740)Atmosphere ~~ dust particleElectrode ~~point contact

Bond strength ~10 -15 Mpa



175 of 200Direct Bonding

Also called silicon fusion bondingUsed for silicon-silicon bonding. Based on a chemical reaction between OH-groups present at the surface of native silicon or grown oxides covering the wafers. Bonding usually follows three steps: surface preparation, contacting and thermal annealing.

Surface preparation Involves cleaning the surfaces of the two wafers to form a hydrate surface. The wafer surface should be mirror smooth, the roughness should be no greater than 10 A, and the bow of a 4″ wafer should be less than 5 micron

ContactingWafers are aligned and contacted in a clean room environment by gently pressing the two wafers at the surface central point. The surface attraction of the two hydrated surfaces creates an intimate contact over the entire wafer surfaces. At room temperature, these wafers adhere via hydrogen bridge bonds of chemisorbed water molecules These subsequently react during the annealing process to form Si-O-Si bonds.

Thermal annealinganneal at 1200°C. This process increases the bond strength by more than one order of magnitude High temperature annealing is not allowed for the metalized wafers.

Fusion of hydrophilic silicon wafers is possible for obtaining silicon-on-insulator (SOI) materials.

Applications in the field of microelectronics such as in static random access memory (SRAM), CMOS, and power devices. For micromechanical applications, fusion bonding rendered possible the fabrication of complex structures by combining two or more patterned wafers.


176 of 200

Joining two wafers without using any adhesivessilicon-on- insulators power devices MEMS

Key IssuesSurface cleanlinesssurface flatnesssurface hydrationhigh temp.

Step 1 : make the wafer surfaces hydrophilic by acid treatment (ex. Boling in nitric acid) => high density of --OH group attach to the surface Si atoms

Fusion bonding ( Si & Si )



177 of 200


Step 2: two surfaces are placed in contact in room temp. => weak bonds form due to hydrogen bonding

Step 3: heat treatment ( oxygen or non-oxygen ambient) bellow 300oC : Si--O---H + H---O---Si → S i---O--- S i + H20

Step 4: annealing ( temp. ~ 800oC ): water dissociate and oxygen becomes free to bond with silicon while hydrogen diffuses trough Si crystal


178 of 200

Au-Si system with a eutectic temperature of 363oC and eutectic composition of 97.1 Wt % Au : 2.85 Wt % Si.

strong and hermetic

Eutectic Bonding

Various adhesives (epoxies, silicones, photoresists, polyimides, etc.) can be used to form wafer bonds .

The technique is tolerant to particles and is useful when the wafers have a severe temperature limitation.

Adhesive bonding :



179 of 200

Plasma treatment (anodic & fusion bonding )

--clean the surface ( carbon contamination)--increases surface energy

→ increases bond strength

→ reduces process temp.

→ reduces the applied voltage ( anodic bonding )



180 of 200

Problem : independent control of ion density & ion energy is not possible

→ increases surface roughness => reduces bond strength



181 of 200

SiGlass

Cross sectional SEM of bonded materials



182 of 200


Comparison between anodic and fusion bonding

Low temperature Surface roughness requirement for direct bonding is ~ few Ångströms compared with a few 10’s nm for anodic bondingHigh bond strength Exact thermal expansion match therefore minimal stress in bonded wafers for fusion bondingFusion bonded wafers can be used for subsequent IC processing, whereas the anodic bonding process introduces alkali metal ions: not allowed for CMOS processing


183 of 200Intermediate layer assisted Bonding

This requires an intermediate layer, metal, polymer, solders, glasses, etc.,

Eutectic bonding utilized Au as the intermediate layer for Si-Si bonding The Au-Si eutectic bonding takes place at 363°C, (safe for metallized Al layer)

Polymers as intermediate layer for bonding at very low temperatureReasonable high strength, no metal ions present, low stress due to the elastic property of polymers, Usually, UV photoresists such as polyimide, AZ-4000, SU-8, PMMADisadvantage: device bonded with polymer may not hold the hermetic sealing performance due to the relatively high permittivity of polymers.

Glasses with low melting temperature as intermediate layer a layer of glass frit is usually deposited on the silicon wafer.The flatness of the frit is critical to obtaining uniform, strong, low-stress bonding.Screen printing of glass frit was used Exhibit good performance.


184 of 200

New Techniques for High Aspect Ratio MEMS


185 of 200LIGA process

Developed by the research Center, Karlsruhe (in Germany) in the early 1980sLithographie - Lithography

X-ray lithography for mask exposure,

Galvanoformung - Galvanoformingto form the metallic parts

Abformung - MouldingMoulding to produce microparts with plastic, metal, ceramics, or their combinations


186 of 200Advantages of LIGA

Can fabricate microstructures with height of hundreds of microns to millimeter scaleCan pattern ‘thick’ films of active materials

Allowing electric, magnetic, piezoelectric, optical and insulating properties in the sensor and actuators with higher aspect ratio

By combining the sacrificial layer technique and LIGA process, advanced MEMS with moveable microstructures can be built


187 of 200Other HARM Processes: HEXSIL

A method of producing high-aspect-ratio MEMS (HARM) parts This involves a combination of DRIE and surface micromachining techniques. HEXSIL combines HEXagonal honeycomb geometries for making rigid structures with thin-films and SILicon for surface micromachining and CMOS electronics. The trenches (made by DRIE) serve as reusable molds that can be sequentially filled with polysilicon and sacrificial layers of oxide. After patterning and the removal of sacrificial layers, structural members with large lateral dimensions (ranging up to centimeters) can be formed from arrays of polysilicon honeycombs. Thus, through the HEXSIL process, batch processing of thin-film layers can be used to produce elements that form a transition between the millimeter and micrometer worlds.This basic process has also been combined with nickel plating to produce highly conducting regions on the HEXSIL plates for contacts and conducting patterns. Thermal expansion of resistively heated HEXSIL regions has been used to actuate HEXSIL structures, such as the tweezers. Using interconnected levers, the very tiny expansion in polysilicon beams can be multiplied to produce multiple millimeters of motion.


188 of 200Example of HEXSIL

An example of HEXSIL is a pair of tweezers that can pick up particles ranging roughly from 1 to 25 µm and place them on platforms (also made of HEXSIL) under operator controlIn the figure

(a) HEXSIL tweezers design; (b) center of actuator heated to incandescence; (c) surface polyflex cable for interconnects between rotating rigid HEXSIL beams; (d) bottom view of 45 µm high honeycomb structure of rigid beams; (e) compliant surface polysilicon tips built on HEXSIL foundation; (f) transition from micro- to milli-scale beams provides mechanical interface; (g) semicircular beam with full Wheatstone bridge for position sensing.

Source: Keller and Howe, 1997.


189 of 200Micro EDM

Electrical Discharge Machining for Micro-partsMicro EDM is an erosion process where the material is removed byelectrical discharges generated at the gap between two electrically conductive electrodes. Micro EDM is used to machine micro holes, channels and 3D micro cavities in electrically conductive materials including tungsten carbide and stainless steel. The discharges result from an electrical voltage applied between the tool electrode and the workpiece electrode. These electrodes are separated by the dielectric fluid in a work tank. Discharge melts a small amount of material on both electrodes. Part of this material is removed by the dielectric fluid and the remaining solidifies on the surface of the electrodes. This leaves a small crater on both workpiece and tool electrode. EDM is capable of machining mechanically difficult-to-cut materials such as hardened steels, carbides, high strength alloys, and even the ultra-hard conductive materials like polycrystalline diamond and ceramics.Micro EDM can be used to drill holes with irregular cross sections. The shape and size of the the micro hole made by micro EDM is determined by the electrode prepared by the WEDG.Typical micro EDM machine consists of a Standard NC Boring machine and Micro Electrode Tooling unit

http://www.unl.edu/nmrc/MicroEDM.htm


190 of 200Micro EDM

http://www.unl.edu/nmrc/MicroEDM.htm


191 of 200Features & Applications of Micro EDM

Micro EDM can machine any conductive (or semiconductor) materialirrespective of their mechanical hardness. Can be used for quenched steel and carbides which are (mainly used for making cutting tools)Can also process materials such as silicon and ferrite which have high specific resistance and have the problem of cracking when processed by ordinary EDM process.

Non-contact machining The gap between the tool and the workpiece in micro EDM ensures electric-discharge between them. Therefore, machining of material can be done without applying pressure on the material, including high precision machining on curved surfaces, inclined surfaces and very thin sheet materials which are difficult to drill.

High aspect ratio machining Micro-EDM can perforate a hole to a depth equivalent to five times the bore diameter. Electro-discharge machining has been used mainly for the machine processing of molds and dies for which details are required, for the production of micro machines. Die strength is also demanded simultaneously with minute details, for dies to be used for deformation processing such as blanking of machine parts, therefore processing with aspect ratio of 5 to 10 is necessary. When the bore diameter is over 50mm, a hole depth which is ten times the hole diameter can be processed.

High precision and high quality machining Under ideal conditions it is possible to set the roughness of the machined surface at 0.1mm Rmax, by minimizing the electrical energy to an infinitesimal amount. Precision of the machined shape is determined by the shape of the tool electrode, its travelling locus and the electro-discharge gap between the electrode and the workpiece. Moreover, the micro-EDM produces very small burrs, much smaller than those seen in mechanical drilling and milling operations and therefore does not need subsequent deburringoperations.


192 of 200LTCC

The Low Temperature Cofired Ceramic (LTCC) technology can be defined as a way to produce multilayer circuits and components with the help of single tapes, which are to be used to apply conductive, dielectric and/or resistive pastes on.These single sheets have to be laminated together and fired in one step all. Layers/sheets consist of ceramics and metals onlyAdvantages

saves time, money reduces circuits dimensions.

Because of the low firing temperature of about 850°C, it is possible to use the low resistive materials silver and gold instead of molybdenum and tungsten (which have to be used in conjunction with the normal ceramic materials).

Recently this technology is being applied for the fabrication ofmicrosystems


193 of 200LTCC Steps

1. Tape casting Tapes of ceramics in the green state are available as rolls.

2. Slitting (sheet cutting machine)A tape is unrolled and cut into individual pieces. Single sheets in turns are rotated by 90° to compensate for the different x/y-shrinking of the LTCC.

3. Via holes punching (Punching machines)/ Creation of cavities in MEMSVias may be punched or drilled with a laser. (But many available lasers have problem to punch white, thick, green ceramic tape, especially if the ceramic tape is on the carrier film.)For punching vias, single or multiple pin high speed punching machines can also be used.

4. Via filling in LTCC production (for circuits)Vias can be filled with a conventional thick film screen printer or an extrusion via filler. In the first case, the tape has to be placed on a sheet of paper that lies on a porous plate; a vacuum pump holds the tape on its place and it is used as an aid for via filling. The second possibility to fill the vias is to use a special extrusion via filler that works with pressures of about 4 to 4.5 bar. Both methods need to have a mask; this mask should be made of a 150-200mm thick stainless steel. An alternative to that is to use the (Mylar-) foil, on which the tape is usually applied.

5. Conductive lines printing (interconnects and electrodes)Cofireable conductors etc are printed on the green sheet using a thick film screen printerThe screens are standard (250 – 400) emulsion or foil type thick films. Just like the via printing process, a porous plate is used to hold the tape in place. Printing of the conductor tends to be easier and of higher resolution than standard thick film on alumina. This is due to the flatness and solvent absorption of the tape. After printing, the vias and conductors have to be dried in an oven at 80 to 120°C for 5 to 30 minutes (depends on material); some pastes need to level at room temperature for a few minutes before drying.

Based on http://www.keko-equipment.com/ltcc.html


194 of 200LTCC Steps…

6. StackingIn LTCC, sheets/layers are stacked one by one by CCD vision alignment or with the help of positioning pins. Manual stacker is available -- suitable for stacking only tapes on a carrier filmAutomatic models can handle up to 16 different tape patterns automatically, either from cassettes or trays.

7. Lamination for LTCC fabricationTwo possibilities of laminating the tapes in the process of LTCC production. Uniaxial lamination;

the tapes are pressed between heated plates at 70°C, 200 bar for 10 minutes (typical values). This method requires a 180° rotation after half the time. The uniaxial lamination could cause problems with cavities/windows. This method causes higher shrinking tolerances than the isostatic lamination. The main problem is the flowing of the tape; that results in high shrinkage tolerances (especially at the edge of the part) during the firing and varying thickness of single parts of each layer

Using an isostatic press. The stacked tapes are vacuum packaged in a foil and pressed in hot water (temperature and time are just the same like using the uniaxial press). The pressure is about 350 bar.



195 of 200LTCC Steps…

8. Cutting into individual piecesAfter laminating, the parts are usually cut into the individual pieces. If the fired parts have to be cut into smaller pieces or other shapes, there are three different possibilities. The first one is to use a post fire dicing saw, which holds tight outside dimensional tolerances and allows high quality edges.

9. CofiringLaminates are fired in one step on a smooth, flat setter tile. The firing should follow a specific firing profile, which causes the need of a programmable box kiln. A typical profile shows a (slow) rising temperature (about 2-5°C per minute) up to about 450°C with a dwell time of about one to two hours, where the organic burnout (binder) takes place; then the temperature has to be risen up to 850 to 875°C with a dwell time of about 10 to 15 minutes.The whole firing cycle lasts between three and eight hours (depends on the material; large / thick parts cause the need of a modification of the firing profile).



196 of 200Laser mill Micromachining

Laser micro-machining system yields sharp & repeatable results from simple holes to complex patterns.A compact, solid-state laser can be usedSwitchable wavelengths to suit the material for optimal resultsCan view the work piece in-process for total control of the machining operation.Set the size and shape of cuts via a rotating, XY aperture to < 2µm widthImport CAD/CAM .dxf files to machine complex patterns.Regulate the energy density up to 25J/cm2

for the most challenging samples or near zero for the most delicate.Hold wafers with vacuum chuck for uniform machining throughout.Can be used for prototyping, short-runs, R&D and pilot line development

http://www.new-wave.com/1nwrProducts/LaserMill.htm


197 of 200

Polymer MEMS

Polymers are flexible, chemically and biologically compatible, available in many varieties, and can be fabricated in truly 3-D shapesMost of these materials and their fabrication methods are inexpensive Polymer MEMS are particularly advantageous in moderate performance devices which are low cost or disposablePolymer MEMS can be self-packaged Electronic circuits based on organic TFT are feasible Many polymers used in MEMS are bio-compatible and thus useful for many medical devices


198 of 200

Polymer for Micromachining

Structural polymerUsually a UV curable polymer

Urethane acrylate, epoxy acrylate or acryloxysilane as main ingredients Its low viscosity allows easy processing It also complies with all VOC regulations It has excellent flexibility and resistance to fungus, solvents, water and chemicals

Sacrificial polymerIs an acrylic resin containing 50% silica and is modified by adding Crystal Violet This composition is UV curable Can be dissolved with 2 mol/L caustic soda at 80°C


199 of 200

Stereo lithography

Introduced in early 1980’s A 3D manufacturing process

Based on photo polymerization A laser beam is directed onto the surface of a optically curable liquid plastic (resin) to produce solid objects

PROCEDUREGenerate a 3D CAD model of the desired objectSlice this model into a series of closely spaced horizontal planes These slices represent the 2D cross-sections of the 3-D object, each at a slightly different Z coordinate All these 2D slices are translated into numerical control code and merged into a final build file This file controls the laser beam scanning and Z-axis movement Desired object is then built from UV curable resin in a layer by layer additive fashion

UV lightMirror

Elevator

Vat of photo-curablesolution

Principle of Stereolithography


200 of 200Schematic of a stereolithography system

Power supply

Laser head Laser forming optics

Imaging system

Computer

software

Polymer resin

CAD Design

Galvanometric X-Y scanner

DL

2WpContainer, elevator, leveling system, etc


201 of 200Micro-stereolithography

Derived from the conventional stereolithography and works on similar principles but in much smaller dimensions

Introduced in 1993 Enables fabrication of high aspect ratio 3D microstructures with novel smart materials MSL is compatible in principle with silicon processes and batch fabrication A UV laser beam is focused to a spot size of about 1 to 2 µm to solidify a thin layer of about 1 to 10 µm thicknessSubmicron resolution of x-y-z translation stages and a very fine UV beam spot enable precise fabrication of complex 3D microstructures using MSL

Monomers used in MSL and SL are both UV curable systems, but their viscosity requirements are different the viscosity of monomers should be kept low ensure a good layer recoating since surface tension may prevent efficient filling of the liquid and the formation of a flat surface in micro-scale e.g., 6 cps for HDDA


202 of 200Limitations of MSL

Classical MSL system has a focusing problem which prevents high resolution fabrications Commercially available galvanometric mirrors are not suitable for high resolution MSL because of de-focusing and the resulting poor scanning resolution (hundreds of microns) A series of integrated harden (IH) polymer stereolithography processes have been developed to overcome this limitation

Resolution of super IH process is less than 1μm

IH Process Super IH Process


203 of 200

Examples of Polymeric materials for Microsystems

Polyethylene Excellent chemical resistance, low cost, good electrical insulation properties, clarity of thin films, easy processability

Polyvinyl chloride Excellent electrical insulation over a range of frequencies, good fire-retardant, resistance to weathering

Polyvinylidenefluoride

Piezoelectric and pyroelectric properties, excellent resistance to harsh environments

Polytetra-fluoroethylene

High heat resistance, high resistance to chemical agents and solvents, high anti-adhesiveness, high dielectric properties, low friction coefficient non-toxicity

Polyvinyl acetate Good adhesive property Polyvinyl alcohol Good adhesive property, water absorption, heat resistance,

electrical insulation Polyamide Elasticity Polystyrene Optical property (transparency), ease of coloring and processing

Polybutylene-terephthalate

Good dimensional stability in water, high mechanical strength, low water absorption

Polyether ether ketone

Hydrolysis-resistance, good resistance to acids


204 of 200Functional polymers for MEMS

Polymer Functional property Application PVDF Piezoelectricity Sensor/actuator Poly(pyrrole) Conductivity Sensor/actuator/electric

connection

Fluorosilicone Electrostrictivity Actuator Silicone Electrostrictivity ActuatorPolyurethane Electrostrictivity Actuator


205 of 200Micromolding

Micro-molding techniques in MEMS include injection moldinghot embossingjet molding, replica moldingmicrotransfer moldingMicromolding in capillaries (MMIC), Solvent assisted micromolding

Key steps in micromoldingdegassing prior to molding, thermal or photochemical curing, demolding

Micromolding techniques are fairly established for plastics and ceramics.Master molds are often built using polymer, metal or silicon.

Polymer masters can be built using photolithography, stereolithography, etc. Metal masters are formed mostly by micro-electroplating, LIGA and DEEMO process utilizing metallic molds. Silicon masters are fabricated using wet or dry etching.

High aspect ratio

For thin microstructures


206 of 200Steps in Micromolding

Photoresist coating

Lithography

Pattern transfer

Mold insert

Photoresistinsert

Elastomerinsert


207 of 200Micro Transfer Molding with PDMS

Micro transfer molding (μTM) can be used to fabricate 3D polymer and ceramic microstructures with submicron and nanometer scale features. A soft elastomeric tool is fabricated as a mold insert Usually, poly(dimethylsiloxane) (PDMS) is used for elastomeric tool fabrication. Micro contact printing process or RIE etching may be used for fabricating PDMS molding tool.

A drop of liquid precursor is placed on the patterned surface of the PDMS tool, and the excess liquid is removed by a piece of flat PDMS, followed by blowing away drops of liquid left on the raised areas of the mold. The filled PDMS tool is then placed on to a substrate where the polymer structure will be built. The prepolymerwas next fully cured thermally or photochemically, and the PDMS tool is finally peeled away and the polymer microstructure is left on the substrate.

Multilayer micro-structures can be fabricated with this technique. Polymer microstructures can be formed even on non-planar surface.

microwave engineering & rf mems - ernetkjvinoy/rfmems/set5.pdf · e8242 microwave engineering...

Documents