microwave and rf design case study amp1...

MICROWAVE AND RF DESIGNMICROWAVE AND RF DESIGN

Based on material in Microwave and RF Design: A Systems Approach, 2nd

Edition, by Michael Steer. SciTech Publishing, 2014.

Presentation copyright Michael Steer

Case Study:Amp1Narrowband Linear Amplifier Design

Presented by Michael Steer

Reading:Chapter 17, Section 17.10

Index: CS_Amp1

Case Study Amp1:Narrowband Linear Amplifier Design

Slides copyright 2013 M. Steer.

Design of a stable 8 GHz pHEMTAmplifier

1

Design Specifications● Gain: maximum gain at 8 GHz

● Topology: three two-ports (input and output matching networks, and the active device)

● Stability: broadband stability

● Bandwidth: maximum that can be achieved using two-elementmatching networks

● Source impedance: ZS = 50 Ω

● Load impedance: ZL = 50 Ω

2

Block diagram of an RF amplifier including biasing networks.

3

M1 M2TRANSISTOR

INPUTMATCHINGNETWORK

OUTPUT

NETWORKMATCHING

RFINPUT

RFOUTPUT

GATE

COLLECTOR OR DRAINFILTERLOW-PASS

FILTERLOW-PASS

AMPLIFIER

CONTROLCHIP

BIASOR BASE

Linear amplifier with input and output matching networks

4

S /[ ]


M1 INPUTMATCHINGNETWORK

M2[S]

21S

12S

NETWORKFEEDBACK

ISTORTRANS-

SOURCE LOAD

AMPLIFIER

SZ

Z L

S

L

General amplifier configuration

5

Transistor Choice

A pHEMT is a JFET (jFET), junction field effect transistor.

IEEE symbol Common symbol

6

JFET

Semi-insulatingn-type substrate

Reverse-biased junction

GS Dn-type channel

● Applying a voltage at the gate (a gate-source voltage) closes off the channel by extending the space-charge region (i.e no charge region) of a reverse-biased junction.

● The GS voltage changes the resistance of the channel.– Not quite accurate as for high DS voltages it changes the drain current.

● This is called an depletion mode of operation.

● A GaAs jFET is called a MESFET (Metal-Epitaxy Semiconductor Field Effect Transistor.) Largely replaced by pHEMT.

7

thV

ID

GV

n-type channel



GS D

Current-voltage characteristic of a depletion-mode JFET

There are n‐type and p‐type JFETs but the performance of a pJFET is poor. So designs mostly use only nJFETs.

= 0.0 V

= -0.2 V

= -0.3 V

= -0.1 V

VDS

ID

GSV

8

n-type channel



GS D

Current-voltage characteristics of an enhancement-mode JFETs

thV

ID

GV

Special doping in channel that results in a built-in reverse bias that shuts that must be overcome by positive gate-source voltage.

= 2.0 V

= 0.25 V= 0.5 V

= 1.5 V

= 1.0 V

VDS

IDGSV

9

Current-voltage characteristics of depletion-mode and enhancement-mode JFETs

thV

ID

GV

thV

ID

GV

Note the need for a negative gate voltage.

= 2.0 VENHANCEMENT

= 0.25 V

= 0.5 V

= 1.5 V

= 1.0 V

VDS

ID

GSV = 0.0 V

= -0.2 V

= -0.3 V

= -0.1 V

JFET DEPLETION

VDS

ID

GSV

10

thV

ID

GV

n-type channel



GS D

Current-voltage characteristics of depletion-mode JFETs

There is not a useful p‐type pHEMTbut there are p‐type JFETs but they do not work well.

11

pHEMT pseudomorphic High Electron Mobility Transistor

● Generally depletion-mode

● Enhancement-mode possible

● Only n-type

12

n-type channele.g. AlGaAs Semi-insulating e.g. GaAs


GS D

= 0.0 V

= -0.2 V

= -0.3 V

= -0.1 V

VDS

ID

GSV

JFET summaryTwo modes of operation

Enhancement modeDepletion mode

n-type channel



GS D

13

Circuit model of fundamental operation

Scattering parameters of an enhancement mode pHEMT transistor biased at VDS = 5 V,ID = 55 mA,VGS = −0.42 V.

Extract from the data sheet of the FPD6836P70 discrete transistor.

14

Current-voltage characteristic of pHEMT

15

= 0.0 V

= -0.4 V

= -0.6 V

= -0.2 V

VDS

ID

GSV

5 V

55 mA

VDD

VDD

R L

L D

DS, min

VD

DDV2

V

Amplifier classes

16

Input characteristic

AB

AA

A

C B

AB

B

ABB

C

C

ID

IG

VGS

Output characteristic

Conventionalload line

High efficiencyload line

BC

A AB

VDS

ID

AB

A

Extract from Manufacturer’s Datasheet

17

S parameters of pHEMT transistor at VDS = 5 V, ID = 55 mA,VGS = −0.42 V.

18

Definition of power measures

19

M1 M2SOURCE

1 2

LOAD

PORT 1 PORT 2

POWERINPUT SIGNALAVAILABLE

POWER POWER POWER

ACTUALACTUAL

DEVICEINPUTMATCHINGNETWORK

OUTPUTMATCHINGNETWORK

ACTIVE

INPUT SIGNALACTUAL DEVICE

OUTPUT SIGNALAVAILABLE DEVICE

OUTPUT SIGNALAVAILABLE

OUTPUT SIGNALPOWER

INPUT SIGNALPOWER

AMPLIFIER

n1

Vin

n4

n5n2

n3ZS

Z L

PAi Pin PADo Ao

PLPin

PD

So many definitions are needed as it is necessary to describe the amplifier before the matching networks have been designed and to know the ultimate performance at different stages.

Definition of gains

● The input and output matching networks are lossless so that the actual device input signal power, PinD, is the power delivered by the source.

● Similarly, the actual output signal power delivered to the load, PL, is the power delivered by the active device.

20

M1 M2SOURCE LOAD


POWER POWER POWER



ACTIVE




PAi Pin PADo Ao

PLPin

PD

Definition of powers

21

M1 M2SOURCE LOAD


POWER POWER POWER



ACTIVE




PAi Pin PADo Ao

PLPin

PD

Most useful gains

22

Transducer GainPower GainSystem Gain

Power actually delivered to the load relative to the input power delivered by the source.

G but with the effect of M1removed. G with optimumM1.

M1 M2SOURCE LOAD


POWER POWER POWER



ACTIVE




PAi Pin PADo Ao

PLPin

PD

Most useful gains

23

Transducer Gain Available Gain

G with optimumM1.

M1 M2SOURCE LOAD


POWER POWER POWER



ACTIVE




PAi Pin PADo Ao

PLPin

PD

G with optimumM1and M2

Most useful gains

24

Transducer Gain

G with optimumM1.

M1 M2SOURCE LOAD


POWER POWER POWER



ACTIVE




PAi Pin PADo Ao

PLPin

PD

Unilateral Transducer Gain

GT with S12 = 0.

GTU

Maximum Unilateral Transducer Gain

GTU with optimumM1 and M2

GTUmax

Development of gain expressions

● Developed using generalized scattering parameters (which can be defined different and complex load and source impedances).

● Then refer back to using transistor’s 50- S parameters

● Different gains useful at different stages of design.

● E.G. GTUmax used in selecting transistor, estimating design challenge.

25

Amplifier Gain in Terms of Transistor S Parameters

● Transducer Gain

● For a unilateral two-port S12 = 0– Unilateral transducer gain

– Maximum unilateral transducer gain

– GTUmax IS THE MOST IMPORTANT FIGURE OF MERIT THAT GUIDESINITIAL DESIGN (design is very hard if required gain is greater).

26

Maximum unilateral transducer gain, GTUmax, of the pHEMT transistor

27

Even more gains

28

M1 M2SOURCE LOAD


POWER POWER POWER



ACTIVE




PAi Pin PADo Ao

PLPin

PD

Maximum Available Power Gain

GT with optimum M1 and M2

Maximum Stable Gain

GMA at edge of stability k = 1.

Transducer Gain

G with optimumM1.

21

12MS

SGS

22112

1MASG k kS

2 211 22

12 21

12

S Sk

S S

Stability consideration

29

Activedevice

LS IN OUT

IN

S

NOISE

Unstable if |S IN | > 1.

L

NOISE

OUT

Unstable if |L OUT | > 1.

Input Output

Amplifier stability

● For stable amplification– |SIN| must be less than one at all frequencies– |LOUT| must be less than one at all frequencies– For passive source and load |S| < 1, |L| < 1– Thus for unconditional stability require

– |IN| < 1– |OUT| < 1

IN

S

NOISE

Unstable if |S IN | > 1.

L

NOISE

OUT

Unstable if |L OUT | > 1.

30

Amplifier Stability

● Amplifier is unstable if

● Unconditional stability if (as long as source and load are passive)

● Note: magnitudes of complex numbers describe circles in the complex plane.

● Formulas have been developed for a stability circle (center and radius).

ACTIVEDEVICE

LS IN OUT

or

and

31

OutputInput

Amplifier Stability● Amplifier is unstable if● Output stability circles on the L plane:

STABLEin

LcrL

UNSTABLE in

L

UNSTABLE

cLr

STABLE

|S11| 1

32

Representations of stability circles

using shading to indicate the unstable region

using a dashed line to indicate the unstable region

stability circle of an unconditionally stable two‐port

33

Output stability circles for |S11| < 1

34

8 GHz. 16 GHz.1 GHz.

inSTABLE

UNSTABLE

inSTABLE

inSTABLE

UNSTABLE

L must be in stable region for amplifier to be stable

Input stability circles for |S22| < 1

35


outSTABLE

UNSTABLE

STABLEout

STABLEout

UNSTABLE

S must be in stable region for amplifier to be stable

Unconditional stability criterion

36

The amplifier is stable for any source and load (provided that |S11| 1 for unconditional stability,The greater the more stable.

40

Input and output factor of pHEMT

Summary of stability considerations● If an amplifier is unconditionally stable design is considerably

simplified.● Even if an amplifier is not “unconditionally stable” it could still be

stable. Design is then tricky and is only done in special circumstances.

– E.g. very high frequency operation.– Consider a cell phone power amplifier connected to an antenna

● Must be stable– When antenna is covered by hand.– Phone is placed on a metal surface.

● Severe price if amplifier goes unstable– In a communication system the whole EM spectrum could be polluted.– Amplifier could self-destruct (thermal runaway).

41

Back to design of the amplifier

42

M1 M2TRANSISTOR


OUTPUT

NETWORKMATCHING

RFINPUT

RFOUTPUT

CONTROLCHIP

GATE

COLLECTOR OR DRAINFILTERLOW-PASS

FILTERLOW-PASS

AMPLIFIER

BIASOR BASE

43

GMS = GMA but with k set to 1 (at edge of stability.

GT = G with optimum M1.

GMA = G with optimumM1, M2

U = GMA with S12 = 0 .

GTUmax = G with S12 = 0, optimum M1, M2.

GT and GMA are the only gains that do not modify the device.

Gain circles of the pHEMT at 8 GHz

44

12.96 dB

11.96 dB

10.96 dB

9.96 dB

13.96 dB

Plotted on the S plane

G with optimum M2

GMA = Gwith optimumM1 and M2

ACTIVEDEVICE

Z L

L

VS

Z S

S IN OUT

Output matching network design● Design nearly always commences

with the output matching network.

● The first design step is to choose an output matching network that will provide the appropriate impedances to ensure stability below 5 GHz and above 11 GHz.

● To do this the stability circles must be considered, as the device is only conditionally stable below 5 GHz and above 11 GHz.

45

> 1 for unconditional stability.

Output stability circles for |S11| < 1

46


inSTABLE

UNSTABLE

inSTABLE

inSTABLE

UNSTABLE

L must be in stable region for amplifier to be stable

Capacitive at low frequency or perhaps open or short circuit.

Unconditionally stable at operating frequency of amplifier.

Look like a resistor or short at high frequencies.

pHEMT at 8 GHz

47

Ignore S12

OutputMatchingNetwork

Z = R +jXOUT S S

Z = RLL Transistor

However the output of the transistor really looks like a resistor in parallel with a capacitor.

So RS = RL =

RS > RL

Consider output stability circles.

48


inSTABLE

UNSTABLE

inSTABLE

inSTABLE

UNSTABLE

Consider output stability circles

49


inSTABLE

UNSTABLE

inSTABLE

inSTABLE

UNSTABLE

Alternative design.

Almost certainly will be unstable

Output matching network design

50

LoaddeviceActive

CxXSR L RL

CxXSR RLLxX

Activedevice o

o

Load

CL RL

CLSR

SX

PXRL

Xp = 152.4

Input matching network design

51

Now consider S12 and loading

InputMatchingNetwork

ZIN

TransistorRS

Appropriate choice:

Input stability circles for |S22| < 1

52


outSTABLE

UNSTABLE

STABLEout

STABLEout

UNSTABLE

S must be in stable region for amplifier to be stable

S

Input matching network design

53

Xx

deviceActive

Source

CSR R LL

CR L

xXxX

SR L

Activedevice

Source

iiC

LR SCL

SR

SX

PXR L

Xp = 34.23

Final amplifier schematic.

● 10 nH has a reactance of approximately 500 Ω at 8 GHz.

● 100 pF provides an RF short circuit at 8 GHz.

● Simulated transducer gain is 13.2 dB– Compare to maximum available gain of 13.96 dB

– Error is because S12 was ignored in synthesizing the output matching network.

● Design could also target a specified gain.54

RF OUTRF IN

VDD

L2L3

C1C2

L1

VGC3

Design for a specific gain at 8 GHz

55

12.96 dB

11.96 dB

10.96 dB

9.96 dB

13.96 dB

Gain (gain circles) plotted on the Splane with optimum M2

GMA = Gwith optimumM1 and M2

Recall that simulated gain of design here is 13.2 dB.

Final amplifier

● This is a surprisingly simple circuit.

● Bias circuit integrated into matching networks.

56

RF OUTRF IN

VDD

L2L3

C1C2

L1

VGC3

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