microwave amplifiers i - iitg.ac.in · stable at its design frequency but unstable at other...

1

Microwave Amplifiers - Single Stage Design [1]

INTRODUCTION

We limit this tutorial to single stage transistor amplifiers. Background material covering characteristics of microwave transistors and gain and stability of general two port amplifier circuits can be found in Chapter 11 of [1]. The relevant equations from those sections are reproduced here for completeness.

Two-Port Power Gains

The three types of power gains for an arbitrary two-port network connected to source and load impedances, ZS and ZL are:

• Power Gain = G = PL/Pin is the ratio of power dissipated in the load ZL to the power delivered to the input of the two-port network. This gain is independent of ZS, although some active circuits are strongly dependent on ZS.

• Available Gain = GA = Pavn/Pavs is the ratio of the power available from the two-port network to the power available from the source. This assumes conjugate matching of both the source and the load, and depends on ZS but not ZL.

• Transducer Power Gain = GT = PL/Pavs is the ratio of the power available from the two-port network to the power available from the source. This depends on both ZS and ZL.

These definitions differ primarily in the way the source and load are matched to the two-port device; if the input and output are both conjugately matched to the two-port, then the gain is maximized and G = GA = GT. Equations for these gains in terms of the S parameters of the active device and the four different reflection coefficients, shown in Figure 1 and defined below, follow:

Figure 1. A Two-port network with general source and load impedances.

( )( )

( )( )

( )( )2

222

22221

2211

2221

222

2

2221

11

11)3(

11

1)2(

11

1)1(

LinS

LS

in

LT

outS

S

avs

avnA

Lin

L

in

L

S

S

PP

G

S

S

PP

G

S

S

PP

G

Γ−ΓΓ−

Γ−Γ−==

Γ−Γ−

Γ−==

Γ−Γ−

Γ−==

where

0

0

0

0 ,)4(ZZZZ

ZZZZ

S

SS

L

LL +

−=Γ

+−

=Γ

and

2

S

S

out

outout

L

L

in

inin

SSS

SZZZZ

b

SSS

SZZZZ

a

Γ−Γ

+=+−

=Γ

Γ−Γ

+=+−

=Γ

11

211222

0

0

22

211211

0

0

1)5(

1)5(

Special cases of the transducer power gain occur when both the input and output are matched for zero reflection (ΓL = ΓS = 0) and when the device is unilateral (S12 = 0 or is negligibly small) so that Γin = S11. For these cases we have:

( )( )2

222

11

22221

221

11

11)7(

)6(

LS

LSTU

T

SS

SG

SG

Γ−Γ−

Γ−Γ−=

=

Matching networks can be designed for various criteria such as maximum gain, specified gain or specified noise figure so that the circuit of Figure 2 can model the single-stage amplifier.

Figure 2. The general transistor amplifier circuit.

If we look at the transducer power gain of (3), we see that it accounts for both source and load mismatch. From (3), we can define separate effective gain factors for the input matching network, the transistor itself, and the output-matching network as follows:

( )

( )2

22

2

2210

2

2

1

1)8(

)8(

1

1)8(

L

LL

inS

SS

SGc

SGb

Ga

Γ−

Γ−=

=

ΓΓ−

Γ−=

Then the overall transducer gain is GT = GSG0GL. If the transistor is unilateral, so that S12 = 0 or is small enough to be ignored, then Γin = S11, Γout = S22 and the unilateral transducer gain reduces to GTU = GSG0GL, where

( )

( )2

22

2

2210

211

2

1

1)9(

)9(

1

1)9(

L

LL

S

SS

SGc

SGb

SGa

Γ−

Γ−=

=

Γ−

Γ−=

Stability

In the circuit of Figure 2 oscillation is possible if either the input or output port impedance has a negative real part which would imply that |Γin| > 1 or |Γout| > 1. Because Γin and Γout depend on the source and load matching

3

networks, the stability of the amplifier depends on ΓS and ΓL as presented by the matching networks. Thus, we define two types of stability:

1. Unconditional stability: The network is unconditionally stable if |Γin| < 1 and |Γout| < 1 for all passive source and load impedances.

2. Conditional stability: The network is conditionally stable if |Γin| < 1 and |Γout| < 1 only for a certain range of passive source and load impedances. This case is also referred to as potentially unstable.

Note that the stability condition of a network is frequency dependent, so that it is possible for an amplifier to be stable at its design frequency but unstable at other frequencies.

Applying the above requirements for unconditional stability to (5) gives the following conditions that must be satisfied by ΓS and ΓL, if the amplifier is to be unconditionally stable:

.11

)10(

,11

)10(

11

211222

22

211211

<Γ−Γ

+=Γ

<Γ−Γ

+=Γ

S

Sout

L

Lin

SSS

Sb

SSS

Sa

If the device is unilateral (S12 = 0), these conditions reduce to the simple results that |S11| <1 and |S22| < 1 are sufficient for unconditional stability. Otherwise, the inequalities of (10) define a range of values for ΓS and ΓL where the amplifier will be stable. Finding this range for ΓS and ΓL can be facilitated by using the Smith chart, and plotting the input and output stability circles. The stability circles are defined as the loci in the ΓS (or ΓL) plane for which |Γin| = 1 (or |Γout| = 1). The stability circles then define the boundaries between stable and potentially unstable regions of ΓS and ΓL. ΓS and ΓL must lie on the Smith chart (|ΓS| < 1, and |ΓL| < 1 for passive matching networks).

In the complex Γ plane, an equation of the form |Γ - C| = R represents a circle with center at C (a complex number) and a radius R (a real number). Equations (10) can be put in this form (details are in [1]). The results are:

( )

21122211

2222

2112

2222

**1122

)11(

)11(

)11(

SSSSc

S

SSRb

S

SSCa

L

L

−=∆

∆−=

∆−

∆−=

Similar results can be obtained for the input stability circle by interchanging S11, and S22:

( )

2211

2112

2222

**2211

)12(

)12(

∆−=

∆−

∆−=

S

SSRb

S

SSCa

S

S

Given the S parameters of the device, we can plot the input and output stability circles to define where |Γin| = 1 and |Γout| = 1. On one side of the input stability circle we will have |Γout| (or |Γin|) < 1, while on the other side we will have |Γout| (or |Γin|) > 1. These regions are defined in Figure 3 for the indicated values of |Γin|.

If the device is unconditionally stable, the stability circles must be completely outside (or totally enclose) the Smith chard. Alternatively, it can be shown that the amplifier will be unconditionally stable if the following necessary and sufficient conditions are met:

4

Figure 3. Output stability circles for a conditionally stable device. (a) |S11| < 1. (b) |S11| > 1.

1)13(

12

1)13(

2112

2222

211

<∆

>∆+−−

=

b

SS

SSKa

Recently, a new criterion has been derived that combines the K-∆ parameters into a test involving only a singe parameter, µ. The details of the derivation can be found in [2].

11

)14(1221

*1122

211 >+∆−

−=

SSSS

Sµ

To illustrate the method for determining stability, we will do Example 11.2 from [1]. All references to equations are to that text. Mathcad will be used for this example.

Example 11.2 The S parameters for the HP HFET-102 GaAs FET at 2 GHz with a bias voltage Vgs = 0 are given as follows:

S0.894 e j− 60.6⋅ deg⋅⋅

3.122 ej 123.6⋅ deg⋅⋅

0.020 ej 62.4⋅ deg⋅⋅

0.781 e j− 27.6⋅ deg⋅⋅

:=

Determine the stability of this transistor by calculating K and |∆|, and plot the stability circles. Solution From equations 11.31 and 11.24 we compute K and |∆| as

∆ S:= ∆ 0.696= arg ∆( ) 83.07− deg=

K1 ∆( )2

+ S1 1,( )2− S2 2,( )2−

2 S1 2, S2 1,⋅⋅:= K 0.607=

Since |∆ | < 1, but K <1, the device is potentially unstable. The centers and radii of the stability circles are given by equations 11.28 and 11.29

5

CLS2 2, ∆ S1 1,

⋅−

S2 2,( )2 ∆( )2−

:= CL 1.363= arg CL( ) 46.687 deg=

RLS1 2, S2 1,⋅

S2 2,( )2 ∆( )2−

:= RL 0.5=

CSS1 1, ∆ S2 2,

⋅−

S1 1,( )2 ∆( )2−

:= CS 1.132= arg CS( ) 68.461 deg=

RSS1 2, S2 1,⋅

S1 1,( )2 ∆( )2−

:= RS 0.199=

This data can be used to plot the input and output stability circles. First, the smith chart must be constructed. The contours for a Smith chart are stored in the file smithc.prn. First read in this file and set up the plot using the following commands:

X READPRN "smithc.prn"( ):= k 1 rows X( )..:=

SR X ORIGIN⟨ ⟩:= SI X ORIGIN 1+⟨ ⟩:=

These instructions plot the first column of numbers in the .prn file on the horizontal axis against the second column on the vertical axis, creating a simplified Smith chart, with the following gridlines: Circles of constant resistance r for r = 0, .2, .5, 1, 2, and 5. Contours of constant reactance x are at x = 0, .2, .5, 1, 2, 5, -.2, -.5,- 1, -2, and -5. To plot the stability circles on the chart, plot the vector, CL + RL and CS = RS. The sequence of instructions below shows this procedure.

f ρ θ,( ) ρ exp j θ⋅( )⋅:= step 0 .01, 1..:=

realCL step( ) Re f RL 2 π⋅ step⋅,( ) CL+( ):=

imagCL step( ) Im f RL 2 π⋅ step⋅,( ) CL+( ):=

realCS step( ) Re f RS 2 π⋅ step⋅,( ) CS+( ):=

imagCS step( ) Im f RS 2 π⋅ step⋅,( ) CS+( ):=

The unstable regions of operation are the intersections of the stability circles and the outer edge of the Smith chart shown below.

6

gridlines from SMITHC.PRNLoad stabiltiy circleCenter, load stability circleSource stability circleCenter, source stability circle

Circles of constant resistance for r = 0, .2, .5, 1, 2, and 5.

Contours of constant reactance for x = 0, .2, .5, 1, 2, 5, -.2, -.5,- 1, -2, and -5.

SINGLE-STAGE TRANSISTOR AMPLIFIER DESIGN

Design for Maximum Gain (Conjugate Matching)

After the stability of the transistor has been determined, and the stable regions for ΓS and ΓL have been located on the Smith chart, the input and output matching sections can be designed. Since G0 of (8b) is fixed for a given transistor, the overall gain of the amplifier will be controlled by the gains, GS and GL, of the matching sections. Maximum gain will be realized when these sections provide a conjugate match between the amplifier source or load impedance and the transistor. Because most transistors appear as a significant impedance mismatch (large |S11| and |S22|), the resulting frequency response will be narrowband. In the next section we will discuss how to design for less than maximum gain, with a corresponding improvement in bandwidth. Broadband amplifier design will be discussed in the next tutorial.

With reference to Figure 2 and our knowledge of conjugate impedance matching, we know that maximum power transfer from the input matching network to the transistor will occur when Γin = ΓS

* and the maximum power transfer from the transistor to the output matching network will occur when Γout = ΓL

*. Then, assuming lossless matching sections, these conditions will maximize the overall transducer gain. By satisfying these criteria and manipulating the equations given above (see [1] for details), the values for ΓS and ΓL are:

1

22

211

2

4)15(

C

CBBa S

−±=Γ

7

2

22

222

2

4)15(

C

CBBb L

−±=Γ

where

*11222

*22111

2211

2222

2222

2111

)16(

)16(

1)16(

1)16(

SSCc

SSCc

SSBb

SSBa

∆−=

∆−=

∆−−+=

∆−−+=

We now do Example 11.3 from [1] using Mathcad.

Example 11.3 [1] Design an amplifier for maximum gain at 4.0 GHz using single-stub matching sections. Calculate the plot the input return loss and the gain from 3 to 5 GHz. The S parameters at 4.0 GHz for the GaAs FET are given as follows:

S0.72 e 1j− 116⋅ deg⋅⋅

2.6 e1j 76⋅ deg⋅⋅

0.03 e1j 57⋅ deg⋅⋅

0.73 e 1j− 54⋅ deg⋅⋅

:=

Solution We first check the stability of the transistor. From equations 11.31 and 11.32 we compute K and |∆| as

∆ S:= ∆ 0.488= arg ∆( ) 162.289− deg=

K1 ∆( )2

+ S1 1,( )2− S2 2,( )2−

2 S1 2, S2 1,⋅⋅:= K 1.195=

Since |∆| < 1, and K > 1, the device is unconditionally stable at 4.0 GHz. There is no need to plot the stability circles. For maximum gain, we should design the matching sections for a conjugate match to the transistor. Thus, ΓS = Γ*in and ΓL = Γ*out, and ΓS, ΓL can be determined from (11.43) and (11.44):

S ΓL

B1 1 S1 1,( )2+ S2 2,( )2− ∆( )2−:=

B2 1 S2 2,( )2+ S1 1,( )2− ∆( )2−:=

C1 S1 1, ∆ S2 2,

⋅−:=

C2 S2 2, ∆ S1 1,

⋅−:= We use the proper sign for equations (11.43) so that ΓS < 1 and ΓL < 1 since |S11| < 1.

ΓSB1 B1

2 4 C1( )2⋅−−

2 C1⋅:= ΓS 0.872= arg ΓS( ) 123.407 deg=

ΓLB2 B2

2 4 C2( )2⋅−−

2 C2⋅:= ΓL 0.876= arg ΓL( ) 61.026 deg=

8

The effective gain factors of (11.19) can be calculated as dB 1:=

GSdB 10 log1

1 ΓS( )2−

⋅:= GSdB 6.197 dB=

G0dB 10 log S2 1,( )2 ⋅:= G0dB 8.299 dB=

GLdB 10 log1 ΓL( )2

−

1 S2 2, ΓL⋅−( )2

⋅:= GLdB 2.213 dB=

So the overall transducer gain will be

GTmaxdB GSdB G0dB+ GLdB+:= GTmaxdB 16.71 dB=

To match the source, we first calculate the normalized admittance looking toward the input generator (the load in this case) from the output of the source matching network. It is given by

Z0 50 Ω⋅:=

yS1 ΓS−

1 ΓS+:= yS 0.3 1.819j−=

We must now move toward the load (the 50Ω internal impedance of the generator) to a point where the real part of the normalized admittance on a 50Ω line is equal to 1.

yL 0.089 0.586j−=yL1 ΓL−

1 ΓL+:=

We go through the same procedure for the output of the amplifier.

lSopen 0.206 λ=lSopen1

2 π⋅atan Im yS 2 π⋅ lSt⋅( )( )( )⋅:=

so we need an open circuited stub with a normalized suseptance of 3.559. This line has length

yS 2 π⋅ lSt⋅( ) 1 3.559j+=

At this point the normalized admittance is

lSt 0.119λ=lStθ

2 π⋅:=

So the length of the transmission line is

θ 0.75=θ root Re yS θ( )( ) 1− θ,( ):=

θ .9:=Guess:

0 2 4 6

1

2

Re yS θ( )( )

θ

θ 0π20

, 2 π⋅..:=λ 1:=yS θ( ) 1 ΓS e2j θ⋅⋅−

1 ΓS e2j θ⋅⋅+:=

9

We must now move toward the load to a point where the real part of the normalized admittance on a 50Ω line is equal to 1.

yL θ( ) 1 ΓL e2j θ⋅⋅−

1 ΓL e2j θ⋅⋅+:= λ 1:= θ 0

π20

, 2 π⋅..:=

The final amplifier circuit created in Serenade Design Suite is shown in Figure 4.

Figure 4. Serenade Design Suite schematic of the design of Example 11-3 [1].

This circuit only shows the RF components; the amplifier will also require some bias circuitry. The return loss and gain were calculated using Serenade Design Suite, using a .flp file for the transistor created from the S parameters given above. The contents of the .flp file are:

FET11_3 3GHZ 5GHZ 3 50 1 *FET for Example FET for Example 11.3 of Pozar. 3GHZ 0.80 -89.0 2.86 99.0 0.03 56.0 0.76 -41.0 4GHZ 0.72 -116.0 2.60 76.0 0.03 57.0 0.73 -54.0 5GHZ 0.66 -142.0 2.39 54.0 0.03 62.0 0.72 -68.0

The results of the simulation are plotted in Figure 5, and show the expected gain of 16.7 dB at 4.0 GHz, with a very good return loss. The bandwidth where the gain drops by I dB is about 2.5%.

Design for a Specific Gain

In many cases it is preferable to design for less than the maximum obtainable gain, to improve bandwidth or to obtain a specific value of amplifier gain. This can be done by designing the input and output matching sections to have less than maximum gains; in other words, mismatches are purposely introduced to reduce the overall gain. The design procedure is facilitated by plotting constant gain circles on the Smith chart, to represent loci of ΓS and ΓL that give fixed values of gain (GS and GL). To simplify our discussion, we will only treat the case of a unilateral device. The more general case of a bilateral device are discussed in detail in references cited in [1].

10

Figure 5. Results of the design of Example 11.3 [1].

In many practical cases |S12| is small enough to be ignored, and the device can then be assumed to be unilateral. This greatly simplifies the design procedure. The error in the transducer gain caused by approximating |S21| as zero is given by the ratio GT/GTU. It can be shown that this ratio is bounded by

( ) ( )22 11

11

)17(UG

G

U TU

T

−<<

+

where U is defined as the unilateral figure of merit,

( )( )222

211

22112112

11)18(

SS

SSSSU

−−=

Usually an error of a few tenths of a dB or less justifies the unilateral assumption.

For a design for specific gain we first define normalized gain factors as

( )

( )2222

22

2

2112

11

2

11

1)19(

11

1)19(

Γ−Γ−

Γ−=

Γ−Γ−

Γ−=

L

LL

S

SS

Sgb

Sga

For fixed values of gS and gL, (19) represent circles on the ΓS or ΓL plane with center and radius given by

11

( )( )

( ) 211

211

211

*11

11

11)20(

11)20(

Sg

SgRb

Sg

SgCa

S

SS

S

SS

−−

−−=

−−=

Similarly, for the output section we have

( )( )

( ) 222

222

222

*22

11

11)21(

11)21(

Sg

SgRb

Sg

SgCa

L

LL

L

LL

−−

−−=

−−=

These results can be used to plot a family of circles of constant gain for the input and output sections. Then ΓS and ΓL can be chosen along these circles to provide the desired gains. The choices for ΓS and ΓL are not unique, but it makes sense to choose points close to the center of the Smith chart to minimize the mismatch and thus maximize the bandwidth. We now illustrate an amplifier design for specified gain by doing Example 11.4 of [1] using Mathcad. (Again, references to equation numbers are for those in [1].)

Example 11.4 Design an amplifier to have a gain of 11 dB at 4.0 GHz. Plot constant gain circles for GS = 2 dB and 3 dB, and GL = 0 dB and 1 dB. Calculate and plot the input return loss and overall amplifier gain from 3 to 5 GHz. The S parameters at 4.0 GHz for the FET are given as follows:

S0.75 e 1j− 120⋅ deg⋅⋅

2.5 e1j 80⋅ deg⋅⋅

0

0.6 e 1j− 70⋅ deg⋅⋅

:=

Solution Since S12 = 0 and |S11| <1 and |S22| <1, the transistor is unilateral and unconditionally stable. From (11.48) we calculate the maximum matching section gains as

dB 1:=

GSmaxdB 10 log1

1 S1 1,( )2−

⋅:= GSmaxdB 3.59 dB=

G0dB 10 log S2 1,( )2 ⋅:= G0dB 7.959 dB=

GLmaxdB 10 log1

1 S2 2,( )2−

⋅:= GLmaxdB 1.938 dB=

So the overall transducer gain will be

GTmaxdB GSmaxdB G0dB+ GLmaxdB+:= GTmaxdB 13.487 dB=

Thus we have 2.5 dB more gain than is required by the specifications. We use (11.49), (11.52), and (11.53) to calculate the following data for the constant gain circles.

12

For

RL GL0( ) 0.441=arg CL GL0( )( ) 70deg=CL GL0( ) 0.441=gL GL0( ) 0.64=

GL0 1=GL0 10

GLdB0

10:=GLdB0 0 dB⋅:=

RL GL1( ) 0.303=arg CL GL1( )( ) 70deg=CL GL1( ) 0.52=gL GL1( ) 0.806=

GL1 1.259=GL1 10

GLdB1

10:=GLdB1 1 dB⋅:=

RS GS2( ) 0.293=arg CS GS2( )( ) 120 deg=CS GS2( ) 0.628=gS GS2( ) 0.693=

GS2 1.585=GS2 10

GSdB2

10:=GSdB2 2 dB⋅:=

RS GS3( ) 0.168=arg CS GS3( )( ) 120 deg=CS GS3( ) 0.705=gS GS3( ) 0.873=

GS3 1.995=GS3 10

GSdB3

10:=GSdB3 3 dB⋅:=

This data can be used to plot the noise figure circle on the Smith chart. As in previous examples, we need to generate the Smith chart. The contours for a Smith chart are stored in the file smithc.prn. First read in this file and set up the plot using the following commands:


SR X ORIGIN⟨ ⟩:= SI X ORIGIN 1+⟨ ⟩:=

gS GS( ) GS 1 S1 1,( )2− ⋅:=

gL GL( ) GL 1 S2 2,( )2− ⋅:=

CS GS( ) gS GS( ) S1 1,

⋅

1 1 gS GS( )−( ) S1 1,( )2⋅−:=

RS GS( ) 1 gS GS( )− 1 S1 1,( )2− ⋅

1 1 gS GS( )−( ) S1 1,( )2⋅−:=

CL GL( ) gL GL( ) S2 2,

⋅

1 1 gL GL( )−( ) S2 2,( )2⋅−:=

RL GL( ) 1 gL GL( )− 1 S2 2,( )2− ⋅

1 1 gL GL( )−( ) S2 2,( )2⋅−:=

13

These instructions plot the first column of numbers in the .prn file on the horizontal axis against the second column on the vertical axis, creating a simplified Smith chart, with the following gridlines: Circles of constant resistance r for r = 0, .2, .5, 1, 2, and 5. Contours of constant reactance x are at x = 0, .2, .5, 1, 2, 5, -.2, -.5,- 1, -2, and -5. To plot the gain circles on the chart, plot the vector, CS + RS. The sequence of instructions below shows this procedure.

f ρ θ,( ) ρ exp j θ⋅( )⋅:= step 0 .01, 1..:=

CSR step GS,( ) Re f RS GS( ) 2 π⋅ step⋅,( ) CS GS( )+( ):=

CSI step GS,( ) Im f RS GS( ) 2 π⋅ step⋅,( ) CS GS( )+( ):= The source gain circle is plotted below in Figure 6. We do the same for the load gain circles.

f ρ θ,( ) ρ exp j θ⋅( )⋅:= step 0 .01, 1..:=

CLR step GL,( ) Re f RL GL( ) 2 π⋅ step⋅,( ) CL GL( )+( ):=

CLI step GL,( ) Im f RL GL( ) 2 π⋅ step⋅,( ) CL GL( )+( ):= The choices for the design values of reflection coefficients are those closest to the center of the Smith Chart satisfying the design requirement of 11 dB. We choose GS = 2 dB and GL = 1 dB so that the reflection coefficients have values

ΓS CS GS2( ) RS GS2( )−( ) ej arg CS GS2( )( )⋅

⋅:= ΓS 0.336= arg ΓS( ) 120 deg=

ΓL CL GL1( ) RL GL1( )−( ) ej arg CL GL1( )( )⋅

⋅:= ΓL 0.216= arg ΓL( ) 70deg= To match the source, we first calculate the normalized admittance looking toward the input generator (the load in this case) from the output of the source matching network. It is given by

Z0 50 Ω⋅:=

yS1 ΓS−

1 ΓS+:= yS 1.142 0.748j−=


yS θ( ) 1 ΓS e2j θ⋅⋅−

1 ΓS e2j θ⋅⋅+:= λ 1:= θ 0

π20

, 2 π⋅..:=

0 2 4 6

1

2

Re yS θ( )( )

θ

Guess: θ .9:=

θ root Re yS θ( )( ) 1− θ,( ):= θ 1.138=


lStθ

2 π⋅:= lSt 0.181 λ=

14

Smith chart with constant gain circles.

gridlines from SMITHC.PRN3 dB source gainCenter, 3 dB source gain2 dB source gainCenter, 2 dB source gain1 dB load gainCenter, 1 dB load gain0dB load gainCenter, 0 dB load gain

Figure 6. Smith chart with constant gain circles.


y S 2 π⋅ l St⋅( ) 1 0.713j+=

15


lSopen1

2 π⋅atan Im yS 2 π⋅ lSt⋅( )( )( )⋅:= lSopen 0.099 λ=


yL1 ΓL−

1 ΓL+:= yL 0.798 0.34j−=


yL θ( ) 1 ΓL e2j θ⋅⋅−

1 ΓL e2j θ⋅⋅+:= λ 1:= θ 0

π20

, 2 π⋅..:=

0 2 4 6

1

2

Re yL θ( )( )

θ

Guess: θ .3:=

θ root Re yL θ( )( ) 1− θ,( ):= θ 0.284=


lLtθ

2 π⋅:= lLt 0.045 λ=


y L 2 π⋅ l Lt⋅( ) 1 0.443j−= so we need an open circuited stub with a normalized suseptance of 3.638. This line has length

lLopen1

2 π⋅atan Im yL 2 π⋅ lLt⋅( )( )( )⋅:= lLopen 0.066− λ=

Since this is negative, we add .5 λ to the length to get

lLopen lLopen .5 λ⋅+:= lLopen 0.434 λ=

The final amplifier circuit created in Serenade Design Suite is shown in Figure 7. This circuit only shows the RF components; the amplifier will also require some bias circuitry. The return loss and gain were calculated using Serenade Design Suite, using a .flp file for the transistor created from the S parameters given above. The contents of the .flp file are:

FET11_4 3GHZ 5GHZ 3 50 1 *FET for Example FET for Example 11.4 in Pozar 3GHZ 0.80 -90.0 2.8 100.0 0.0 0.0 0.66 -50.0 4GHZ 0.75 -120.0 2.5 80.0 0.0 0.0 0.60 -60.0 5GHZ 0.71 -140.0 2.3 60.0 0.0 0.0 0.58 -85.0

The results of the simulation are shown in Figure 8. The bandwidth over which the gain varies by + 1 dB or less is about 25%, which is considerably better than the bandwidth of the maximum gain design of Example 11.3. The return loss, however, is not very good, being only about 5 dB at the design frequency.

16

Figure 7. Serenade Design Suite schematic of the design of Example 11-4 [1].

Figure 8. Serenade Design Suite results of the design of Example 11-4 [1].

Low-Noise Amplifier Design

Besides stability and gain, another important design consideration for a microwave amplifier is its noise figure. In receiver applications especially, it is often required to have a preamplifier with as low a noise figure as possible since the first stage of a receiver front end has the dominant effect on the noise performance of the overall system.

17

Generally it is not possible to obtain both minimum noise figure and maximum gain for an amplifier, so some sort of compromise must be made. This can be done by using constant gain circles and circles of constant noise figure to select a usable trade-off between noise figure and gain.

The noise figure of a two-port amplifier can be expressed as

2

min)22( optSS

N YYGR

FF −+=

where the following definitions apply:

YS = GS + jBS = source admittance presented to transistor. Yopt = optimum source admittance that results in minimum noise figure. Fmin = minimum noise figure of transistor, attained when YS = Yopt. RN = equivalent noise resistance of transistor. GS = real part of source admittance.

Instead of the admittance YS and Yopt, we can use the reflection coefficients ΓS and Γopt, where

.1

11)23(

,111

)23(

0

0

opt

optopt

S

SS

ZYb

ZYa

Γ+

Γ−=

Γ+Γ−

=

The quantities Fmin, Γopt and RN are characteristics of the particular transistor being used, and are called the noise parameters of the device; they may be given by the manufacturer, or measured. We can manipulate these equations to arrive at circles of constant noise figure with radii and centers given by

( )

.1/4

)24(

with

,1

)24(

,1

1)24(

2

0

min

2

optN

optF

opt

F

ZRFF

Nc

NCb

N

NNRa

Γ+−

=

+

Γ=

+

Γ−+=

We illustrate the design method by doing Example 11.5 in [1] with Mathcad.

Example 11.5 A GaAs FET is biased for minimum noise figure and has the following S parameters and noise parameters at 4 GHz:

Fmin 10

1.6

10:= Γopt .62 ej 100⋅ deg⋅⋅:=

S0.6 e j− 60⋅ deg⋅⋅

1.9 ej 81⋅ deg⋅⋅

0.05 ej 26⋅ deg⋅⋅

0.5 e j− 60⋅ deg⋅⋅

:=RN 20 ohm⋅:= Z0 50 ohm⋅:=

Design an amplifier having a 2.0 dB noise figure with the maximum gain that is compatible with this noise figure. (We have to convert 2.0 dB to an absolute value for Fmin.) Solution First we compute the unilateral figure of merit from equation 11.47.

18

Next, we use equations 11.59 and 11.61 to compute the center and radius of the 2 dB noise figure circle:

F 10

2

10:= NF Fmin−( ) Z0⋅

4 RN⋅1 Γopt+( )2

⋅:= N 0.102=

CFΓopt

N 1+:= CF 0.563= arg CF( ) 100 deg=

RFN N 1+ Γopt( )2

− ⋅

N 1+:= RF 0.245=

This data can be used to plot the noise figure circle on the Smith chart. As in previous examples, we need to generate the Smith chart. The contours for a Smith chart are stored in the file smithc.prn. First read in this file and set up the plot using the following commands:


SR X ORIGIN⟨ ⟩:= SI X ORIGIN 1+⟨ ⟩:= These instructions plot the first column of numbers in the .prn file on the horizontal axis against the second column on the vertical axis, creating a simplified Smith chart, with the following gridlines: Circles of constant resistance r for r = 0, .2, .5, 1, 2, and 5. Contours of constant reactance x are at x = 0, .2, .5, 1, 2, 5, -.2, -.5,- 1, -2, and -5.

To plot the noise figure circle on the chart, plot the vector, CF + RF. The sequence of instructions below shows this procedure.

f ρ θ,( ) ρ exp j θ⋅( )⋅:= step 0 .01, 1..:=

realCF step( ) Re f RF 2 π⋅ step⋅,( ) CF+( ):=

imagCF step( ) Im f RF 2 π⋅ step⋅,( ) CF+( ):= The noise figure circle is plotted in Figure 1. Minimum noise figure occurs for ΓS = Γopt. We need to calculate data for several input section constant gain circles. From equation 11.92,

CSgS S1 1,

⋅

1 1 gS−( ) S1 1,( )2⋅−:= RS

1 gS− 1 S1 1,( )2− ⋅

1 1 gS−( ) S1 1,( )2⋅−:=

These values must also be plotted on Figure 1.

realCS step( ) Re f RS 2 π⋅ step⋅,( ) CS+( ):=

imagCS step( ) Im f RS 2 π⋅ step⋅,( ) CS+( ):=

US1 2, S2 1,⋅ S1 1,⋅ S2 2,⋅

1 S1 1,( )2− 1 S2 2,( )2− ⋅:= dB 1:=

Errorupper 20− log 1 U−( )⋅:= Errorupper 0.532 dB=

Errorlower 20− log 1 U+( )⋅:= Errorlower 0.501− dB=

19

Fig. 1. Smith chart with the noise figure circle. gS .947≡

gridlines from SMITHC.PRNNoise figure circleCenter, noise figure circleSource stability circleCenter, source stability circle

Circles of constant resistance for r = 0, .2 .5, 1, 2, and 5.

Contours of constant reactance for x = 0, .2, .5, 1, 2, 5, -.2, -.5,- 1, -2, and -5.

Using trial and error for the value of gS and the zoom and crosshair features of Mathcad, we find that the intersection of the gS circle and the noise figure circle is the desired value of ΓS.

ΓS 0.141035 j 0.522189⋅+:= ΓS 0.541= arg ΓS( ) 74.886 deg=

yielding

GS 10 log1 ΓS( )2

−

1 S1 1, ΓS⋅−( )2

⋅:= GS 1.702 dB=

For the output section we choose ΓL = S22

* for a maximum GL of

GL 10 log1

1 S2 2,( )2−

⋅:= GL 1.249 dB=

The transistor gain is

G0 10 log S2 1,( )2 ⋅:= G0 5.575 dB= so the overall transducer gain will be

GTU GS G0+ GL+:= GTU 8.527 dB=

20

To match the source, we first calculate the normalized admittance looking toward the input generator (the load in this case) from the output of the source matching network. It is given by

Z0 50 Ω⋅:= yS1 ΓS−

1 ΓS+:= yS 0.449 0.663j−=


yS θ( ) 1 ΓS e2j θ⋅⋅−

1 ΓS e2j θ⋅⋅+:= λ 1:= θ 0

π20

, 2 π⋅..:=

0 2 4 6

1

2

Re yS θ( )( )

θ

Guess: θ 1.5:=

θ root Re yS θ( )( ) 1− θ,( ):= θ 1.417=


lStθ

2 π⋅:= lSt 0.226 λ=


yS 2 π⋅ lSt⋅( ) 1 1.286j+=


lSopen1

2 π⋅atan Im yS 2 π⋅ lSt⋅( )( )( )⋅:= lSopen 0.145 λ=


∆ S:=

B2 1 S2 2,( )2+ S1 1,( )2− ∆( )2−:= C2 S2 2, ∆ S1 1,

⋅−:=

ΓLB2 B2

2 4 C2( )2⋅−−

2 C2⋅:= ΓL 0.457= arg ΓL( ) 68.435 deg=

yL1 ΓL−

1 ΓL+:= yL 0.512 0.55j−=


yL θ( ) 1 ΓL e2j θ⋅⋅−

1 ΓL e2j θ⋅⋅+:= λ 1:= θ 0

π20

, 2 π⋅..:=

21

0 2 4 6

1

2

Re yL θ( )( )

θ

Guess: θ 1.5:=

θ root Re yL θ( )( ) 1− θ,( ):= θ 1.522=


lLtθ

2 π⋅:= lLt 0.242 λ=


yL 2 π⋅ lLt⋅( ) 1 1.027j+=


lLopen1

2 π⋅atan Im yL 2 π⋅ lLt⋅( )( )( )⋅:= lLopen 0.127 λ=

A complete AC circuit schematic from Serenade Design Suite, using open-circuited shunt stubs in the matching sections, is shown in Figure 9. The results of the analysis of the circuit are shown in Figure 10. The .flp file follows:

FET11_5 3GHZ 5GHZ 3 50 1 *FET for Example 11.5 FET for Example 11.4 in Pozar 3GHZ 0.6 -60.0 1.9 81.0 0.05 26.0 0.5 -60.0 4GHZ 0.6 -60.0 1.9 81.0 0.05 26.0 0.5 -60.0 5GHZ 0.6 -60.0 1.9 81.0 0.05 26.0 0.5 -60.0 NOI RN 4GHZ 1.6 0.62 100 0.4

Notice that we include noise data in this file and display noise figure in the results.

Figure 9. Schematic for the specified noise figure amplifier of Example 11.5 [1].

22

Figure 10. Results for the specified noise figure amplifier of Example 11.5 [1].

[1] David M. Pozar, Microwave Engineering, John Wiley & Sons, Inc., New York, 1998. [2] M. L. Edwards and J. H. Sinksy, "A New Criteria for Linear 2-Port Stability Using a Single Geometrically Derived Parameter,: IEEE Trans. Microwave Theory and Techniques, vol. MTT-40, pp. 2803-2811, December 1992.

microwave amplifiers i - iitg.ac.in · stable at its design frequency but unstable at other...

Documents