Microwatt Design for Energy Harvesting Wireless Sensors

Rajeevan AmirtharajahUniversity of California, Davis

2

Industrial Plants and Power Line Monitoring(courtesy ABB)

Operating Room of the Future(courtesy John Guttag)

Target Tracking & Detection(Courtesy of ARL) Location Awareness

(Courtesy of Mark Smith, HP)

Websign

NASA/JPL sensorwebs

Emerging Microsensor Applications

3

Recent Battery Scaling and Future Trends

• Battery energy density increasing 8% per year, demand increasing 24% per year (the Economist, January 6, 2005)

4

Commercial Wireless Sensor Mote

Moteiv Sky mote, 2006Jiang, IPSN/SPOTS 2005

• Current sensor node: 70 mW all active, 17 μW idle• Power sources contribute significant volume and cost• Smaller system (1 cm3) desirable (less obtrusive military

sensor, implantable biomedical device)• Reduce power consumption, get energy from environment

5

Energy Scavenging Becoming a Reality

Tx COB

Front

cap

regulator

Front

• Demonstrate a self contained 1.9GHz transmitter - powered only by Solar & Vibrational scavenged energy (Roundy 03)

• Push integration limits - limited by dimensions of solar cellLight Level Duty Cycle

Low Indoor Light 0.36%

Fluorescent Indoor Light 0.53%

Partly Cloudy Outdoor Light 5.6%

Bright Indoor Lamp 11%

High Light Conditions 100%

Vibration Level Duty Cycle2.2m/s2 1.6%

5.7m/s2 2.6%• Courtesy J. Rabaey, UC Berkeley

6

Energy Scavenging Wireless Sensor

Extend sensor node lifetime beyond battery limitation Scavenging energy from light, heat, and vibrations

Cope with the variability of the harvested power Energy scalable approximate signal processing

7

System Requirements

• System works with low duty-cycle, total average power = 5 μW• ADC - requires low power and clean VDD• DSP - requires low power, noisy VDD ok• RF - requires high peak power

Functional Block Power VDD REQ

Sensor[R. Amirtharajah et al, SPIE, 2005]

185 μW 1.2 V 7.78 kΩ

ADC[M. Scott et al, JSSC, 2003]

3.1 μW 1 V 322 kΩ

DSP[B. Warneke et al, ISSCC, 2004]

6 μW 1 V 166 kΩ

RF[B. Otis et al, ISSCC, 2005]

1 mW 1.2 V 1.44 kΩ

• Introduction

• Energy Harvesting Transducers

• Circuits and Microarchitecture

• Conclusions

Outline

9

• Typical solar cells based on crystalline silicon

• Thin-films offer lower costs (amorphous Si, CdTe, etc.)

• Would like to integrate solar cell and capacitor cheaply into standard CMOS logic process

Solar Energy Harvesting

Everlast Mote (Simjee and Chou ISLPED 06)

10

Integrated Photodiodes: Side View

• Side view cutaway of integrated photodiode. Metal connected to p- and n- diffusions correspond to top and bottom capacitor plates, respectively

11

Capacitance Characterization in 0.35 μm CMOS

D1 D2 D3 TL1 † SEUB †

Cm (pF) 0.254 0.254 0.216 1.004 0.616

Cdo (pF) 0.070 0.178 0.285 − −

Cd (pF)* 0.113 0.286 0.460 − −

* Calculated with a junction voltage of 0.55 V, 25 °C, Area = 338 μm2

† [R. Aparicio and A. Hajimiri, “Capacity Limits and Matching Properties of Integrated Capacitors,” JSSC, 2002]

12

Diffraction Grating

• Metal capacitors form optical notch filter

• Resonant wavelength, (ΛO=950 nm →ΛR =1550 nm)*

• Vary duty-cycle, periodicity and grating depth to alter filtering effect

RO Λ∝Λ

*[H. Tan et al, A Tunable Subwavelength Resonant Grating Optical Filter, LEOS, 2002]

13

Die Photograph

• 90 nm CMOS

• Six photodiode designs

• D1- D6

– Same diffusion layout

– Different metal

diffraction gratings

14

P+

Side View of Example Photodiode

• Varying metal heights reduces reflections and helps guide l light into depletion regions

• Space between metal is near 1 μm

• Height between metal layers is 0.675 μm

• Spatial duty cycle between metal width and spacing ~32%

P+ P+P+ P+

15

Generated Electrical Power

• White Light Illumination = 5 kLUX• Photodiode Die Area =10000 μm2

16

Tradeoff

• Increased metal density results in more reflections andlower optical efficiency

• Storage capacitance is important when interfacing withsensitive load circuitry

17

Generated Power of D1

• Maximum power generation is a function of light intensity and load resistance

18

• Polar plot • Green laser with λ = 532 nm• Increased off-axis response with diffraction grating 18

Voc vs. Angle of Incidence

D1D4D1D4

19

Photodiode Comparison

• 20 kLUX, 25 °C, active area (90nm) = 10000 μm • Area for 5 μW = 164 μm x 164 μm (0.35 μm), 124 μm x 124 μm (90 nm)

200.1240Refrigerator

0.2100Second Story of Wood Frame Office Building

0.5109Washing Machine

0.675Notebook Computer while CD is Being Read

0.7100External Windows (size 2ftx3ft) next to a Busy Street

1.03121Bread Maker

1.3385Wooden Deck with People Walking

0.2-1.560HVAC Vents in Office Building

2.25121Small Microwave Oven

3125Door Frame (just after door closes)

3.5121Clothes Dryer

6.4121Kitchen Blender Casing

Peak Acceleration

(m/s2)

Frequency of Peak

(Hz)Vibration Source

Courtesy P. Wright, UC Berkeley

Common Vibration Sources

21

Vibration Generator Mechanical Model

• Second order mechanical system: spring + mass + dashpot• Driven by amplitude forcing function at resonance

2

2

4 T

e AmPωζζ

=

Output Electrical Power

22

Vibration to Electric Energy Converters

Mesoscale Moving Coil MEMS Variable Capacitor

• Estimated output power: 400 μW

• Estimated output power: 8.7 μW

Mesoscale Piezo Bender• Output power: 375 μW

Courtesy P. Wright, UC Berkeley

23

Multi-Electrode Piezoelectric Generator

• Top plate divided into quarter-circle sections

• Bottom plate not divided, total of 5 electrodes

• PZT (lead zirconate titanate) disk diameter = 1.5”

24

Multiple Resonances with Cuts

• Without cuts only mode near 1 kHz is usable• Simulated results from lumped model derived using rigid body

analysis

25

Top Plate Waveforms

• Traveling wave excites neighboring top plate signals with 90° relative phase shift

26

Rectifier Alternatives

• Conventional (inductively loaded) rectifier[M. Ghovanloo, et al., JSSC Nov. 2004]

27

• Dashed outline: one CMOS controlled rectifier (CCR)• Snubbing diode used on each input for negative swings

Full Wave Rectifier Prototype

28• Input frequency = 10 kHz

Measured Efficiency Curves

29

Rectifier Comparison

• Previous rectifiers typically 76-90% efficient

30

Die Photograph

• Constructed in 0.35 μm CMOS

• PMOS power FET width = 500 μm

31

Multiple-Input Power Supply

• AC/DC combines a rectified Vvibe with Vsolar

• DC/DC further smoothes harvested energy to form Vout

32

Multiple-Input Power Supply Measured Output

• DC/DC output controller switches between functional blocks • DSP tolerates high ripple, so the controller trades efficiency for ripple

33

Multiple-Input Power Supply Chip Photo

•• 0.250.25μμm CMOS, total active aream CMOS, total active area

•• To appear ISSCC 2009To appear ISSCC 2009

• Introduction

• Energy Harvesting Transducers

• Circuits and Microarchitecture

• Conclusions

Outline

35

Energy Scavenging Wireless Sensor

Extend sensor node lifetime beyond battery limitation Scavenging energy from light, heat, and vibrations

Improve total efficiency by co-design Self-timed digital circuits enable simple power electronics

36

Sensor Data Processing Subsystem

SWNTor

SiNW

SWNTor

SiNW

SWNTor

SiNW

SWNTor

SiNW

Bridge Sensor

A/D Converter

Microcontroller

to RF

DSP Coprocessor

datactrl

Microcontroller– Sensor calibration– DSP configuration– High active power– Low duty cycle

DSP Coprocessor– Continuous sensor

data processing (e.g., event detection)

– High duty cycle– Ultra low active power

37

Self-Powered System Overview

• Vibration harvester output (VIN) can vary rapidly• Regulator exploits DSP delay/frequency feedback

– Compensates for temperature, process, and computational workload variations

– Allows simple all digital control (Amirtharajah JSSC 98, Dancy TVLSI 00)

• Regulator efficiency still limited to between 30% - 70%

VIN (AC)Energy Harvester

Voltage Regulator DSP

Energy Storage

(Battery or Ultracapacitor) VBK (DC)

VDD(DC)

fREF

fDSP

38

Simplifying Voltage Regulation

• Eliminate AC/DC conversion from power electronics

• Use passive full-wave rectifier with minimum filter cap to reduce complexity and volume

• Self-timed DSP using critical path replica ring oscillator satisfies timing constraints while using rectifier output

VIN (AC)Energy Harvester

Passive Rectifier DSP

Energy Storage

(Battery or Ultracapacitor) VBK (DC)

VDD(AC or

DC)

Ring Oscillator Output

-0.2

0

0.2

0.4

0.6

0.8

1

1.2

0 5 10 15 20time (ns)

Volts

VDDVout

• Self-timed datapath must be initialized at power-on• Must maintain state across power supply cycles

Frequency Variation With AC Supply

tHold

AC Supply Test Chip Block Details

Power-On Reset

3T DRAM Cell and Sense Circuit

Read Out

Read Enable

ReadWrite

Store

Bit Line

M3

M1

M2

Write Enable

Precharge

Write Enable

Write Enable

Write In

Sense

• 3T DRAM (M1-M3) stores data over supply cycles• Precharged bitline and sense node• Single-ended reads and writes

3T DRAM

Sense Circuit

3T DRAM Cell Layout

Read

Store

M3

M1

M2

3T DRAMWrite

• 46 µm2 gate size chosen for 1.2ms retention

– Vdd = 400 mV– 0°C < T < 50°C

• Hold time for 60 Hz supply

3T DRAM POR Threshold Detector

DRAM memory cell can set the minimum supply voltage

3T DRAM

Sense Circuit Replica

Rectified Waveform and POR Output

• POR Output

• On Chip Rectifier Output

– From 60 Hz Sine Input

Measured Frequency Variation with AC Supply

• Ring Oscillator Frequency Varies

• Arbitrary Wave Form Generator Output Used For AC Input

Die Photo and Summary

Technology 180 nm CMOS

Dimensions 2.6 mm x 2.6 mm

Transistors 135K

I/O VDD 1.8 VAC Supply (VPP = 1.8 V)

60 Hz –1 kHz

Core Freq. (max) 75.6 MHz

Power (Core)

127 –113 µW

POR OSC

FIR Filter

• Published Symposium on VLSI Circuits, 2007

48

Energy Scalable Distributed Arithmetic Tile

– Tile implements operations based on Distributed Arithmetic

– Bit serial / word parallel computation enables efficient fine-grained energy scalability

– Configurable memory, reconfigurable interconnect, and iterative approximation allows coarse-grained energy scalability

49

Power Scalable FIR Filter Results

0.00

0.50

1.00

1.50

2.00

2.50

0 2 4 6 8 10 12 14 16 18Input Bit Width

Pow

er (m

W)

84

86

88

90

92

94

96

98

Rec

ogni

tion

(%)

• Simulated power and projected recognition performance for biomedical event detection application

50

Low Power Interconnect Design• Interconnect power must be minimized

– Coarse-grained reconfigurable array has high logic to wire ratio

– Low swing signaling not as effective due to overhead of generating additional supply

– Attempt to minimize switched capacitance instead through wire spacing, bus activity

51

Energy Scalable Array

Several operations confirmed, working out configuration issuesCurrently testing array

Test Chip Features

– Sixteen tiles connected by island-style x and y routing

– Implemented in 0.25 μm CMOS from TSMC

– Includes test structures for low switching activity interconnect

– Includes multiple-input energy harvesting power supply (to appear ISSCC09)

• Introduction

• Energy Harvesting Transducers

• Circuits and Microarchitecture

• Conclusions

Outline

55

Conclusions

• Energy harvesting for wireless sensors is made practical by leveraging low performance demands

• Integrated solar, mesoscale vibration transducers possible, but challenging to scale below 1 cm3

• Exploiting the AC nature of mechanical vibration energy harvesting using self-timed circuits can improve total system efficiency

• Energy and voltage scalable digital and mixed-signal circuits and architectures crucial for energy harvesting systems

56

Acknowledgments

• Albert Chen

• Jamie Collier

• Erin Fong

• Liping Guo

• Nate Guilar

• Travis Kleeburg

• National Science Foundation CAREER Award

• FCRP Interconnect Focus Center

• Xilinx University Program and Xilinx Research Labs

• U.S. Dept. of Education GAANN Fellowship

• Jeff Loo

• Mackenzie Scott

• Jeff Siebert

• Justin Wenck

• Prof. Paul Wright, UCB

• Prof. Diego Yankelevich, UCD

• Prof. Paul Hurst, UCD