microprocessers

18
8086 Microprocessor Addressing Modes and Assembler Directives

Upload: hacralo

Post on 04-Apr-2018

213 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 1/18

8086 Microprocessor

Addressing Modes and

Assembler Directives

Page 2: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 2/18

Contents

• Introduction

• Addressing modes

• Assembler directives

• Assembler directives types

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o    f

   E   &   C ,   M   I   T .

2

Page 3: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 3/18

Introduction

• The MP communicates and operates in the binary systemhaving 0 and 1 as bits. Each MP has a fixed set of instructionsin the form of binary patterns called machine language.

• It is difficult for users to communicate in this binary language.Hence instructions are given abbreviated names calledmnemonics which form the assembly language for a given MP.

• The mnemonic for a particular instruction consists of lettersthat suggest the operation to be performed by thatinstruction.

An instruction is decided into groups of bits or fields, with onefield called as operation code (opcode) indicating what theprocessor has to do and the other fields called operands,indicating the information needed by the instruction incarrying out its task.

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o    f

   E   &   C ,   M   I   T

 .

3

Page 4: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 4/18

Introduction

• An operand may contain a datum, part of the address of a

datum, an indirect pointer to a datum or other information

pertaining to the data to be acted on by the instruction.

• Instructions may contain several operands but more the

operands and longer the operands are, more memory spacewill be occupied and more time will be taken for execution.

• In order to minimize the total number of bits in an instruction,

most instructions will have one operand in register.

Memory and I/O spaces are relatively large and hence theiraddress require several bits. But number of registers is small,

hence it takes only few bits to specify a register.

• Therefore to conserve instruction bits, registers must be used

as much as possible.

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o    f

   E   &   C ,   M   I   T

 .

4

Page 5: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 5/18

Addressing Modes

• The way in which an operand is specified is called its addressing mode.

• 8086 has addressing modes for data and branch address separately.

• 8086 data addressing modes are:

1. Immediate

2. Direct

3. Register

4. Register indirect

5. Register relative

6. Based indexed

7. Relative based indexed

•8086 branch addressing modes are:

1. Intrasegment direct

2. Intrasegment indirect

3. Intersegment indirect

4. Intersegment direct

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o    f

   E   &   C ,   M   I   T

 .

5

Page 6: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 6/18

Data Addressing Modes

• Immediate  – data is either 8 bits or 16 bits and is part of theinstruction.

Ex: mov al,80h

mov AX, 1345h

• Direct  – the 16 bit offset address of the data is part of theinstruction.

Ex: mov BX,[1560h]

• Register direct – the data is stored in the register which is specified Ithe istruction.

Ex: mov AX,BX

• Register indirect –

the 16 bit address of the data is stored in baseregister (BX) or any of the index registers (SI/DI) and this register isspecified in the instruction.

Ex: mov AX, [SI]

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

6

Page 7: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 7/18

Data Addressing Modes

• Register relative – the address of the data is the sum of an 8 or16 bit displacement and the contents of a base register or anindex register and this is specified in the instruction.

Ex: mov AX, [BX+20h]

mov AX, [DI+2349h]• Based indexed – the address of the data is the sum of contents

of an base register and an index register, both of which arespecified in the instruction.

Ex: mov AX,[BX+SI]

• Relative based indexed –

the address of the data is the sum of contents of an base register and an index register and an 8/16bit displacement, all of these are specified in the instruction.

Ex: mov AX,[BX+SI+69h]

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

7

Page 8: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 8/18

Addressing Modes for Branch

addresses

• Refer page 38 &39  – Microcomputer Systems:

The 8086/8088 Family  – by Yu-Cheng Liu &

Glenn A. Gibson.

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

8

Page 9: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 9/18

Instruction Format 

• The general format of an assembler instruction is – 

Label : Mnemonic operand2, operand1

Label  – it is an identifier that is assigned to the address of the

first byte of instruction. Its presence is optional.

Operand2 & operand 1 –

data on which operation to be

performed.

Operand 2 indicates destination and operand 1 indicates source.

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

9

Page 10: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 10/18

Assembler Directives

• There are some instructions in the assembly language which

are not a part of the processor instruction set.

• These instructions are instructions to the assembler. These are

referred to as pseudo operations or as assembler directives.

• They are used to control during program assembling and do

not generate any executable machine code.

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

10

Page 11: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 11/18

Assembler Directives Types

1. Data definition and storage allocation directives – DB,DW.

2. Program organization directives – SEGMENT, ASSUME.

3. Alignment directives – ORG

4. Program end directives – END

5. Value returning directives – LENGTH,SIZE

6. Procedure definition directives – PROC,ENDP

7. Macro definition directives – MACRO,ENDM

8. Data control directives – PUBLIC,EXTRN

9. Branch displacement directives – LABEL, SHORT

10. Header file inclusion directive - INCLUDE

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

11

Page 12: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 12/18

Assembler Directives

1. ASSUME  – used to instruct the assembler the name of the

logical segment it should use for a specified segment. Ex:

ASSUME CS: code, DS: data

2. DB(Define byte)  – used to declare a byte type variable or to

set aside one or more memory locations of type byte inmemory. Ex: temp DB 67h

prices DB 45h,89h,23h

temp DB 100 DUP(?)

store DB 50 DUP(00h)3. DW(Define word)  – instructs the assembler to define a

variable of type word or to reserve memory locations of type

word in memory. Ex: mul DW 437AH

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

12

Page 13: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 13/18

Assembler Directives

4. DD (define double word)

5. DQ(define quad word)

6. DT(define ten bytes)

7.END  – it is put after the last instruction of a program to instruct theassembler that it is the physical end of the program.

Ex: start: mov ax, bxadd ax, bx

END start

8. PROC  – instruction to assembler that next set of instructions form aprocedure.

9. ENDP  – used along with the name of the procedure to indicate theend of a procedure to the assembler.

Ex: display PROC near/far

mov ax,bx

ENDP display

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

13

Page 14: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 14/18

Assembler Directives

10. SEGMENT – used to indicate the start of a logical segment.

11. ENDS – used with the name of a segment to indicate the end

of that logical segment.

Ex: data SEGMENT

Temp DB 45h

data ENDS

12. EQU(Equate)  – used to give name to some value. Each time

the assembler finds the given name in the program, it replaces

the name by the value assigned to it.Ex: data EQU 45h

mov al,data (al = 45h)

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

14

Page 15: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 15/18

Assembler Directives

13. INCLUDE – used to instruct the assembler to insert a block of 

source code from the named file into the current source

module. Ex: INCLUDE macro.lib

14. LENGTH  – instructs the assembler to determine the number

of elements in some named data item such as an array or astring.

Ex: data SEGMENT

name DB 100 DUP(?)

data ENDScode SEGMENT

mov ax, LENGTH name (ax=100)

code ENDS

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

15

Page 16: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 16/18

Assembler Directives

15. OFFSET  – informs the assembler to determine the offset of a

named data item from the start of the segment which contains it.

Ex: data SEGMENT

prices DB 12h,23h,34h

data ENDScode SEGMENT

mov BX, OFFSET prices

code ENDS

16. ORG(Originate)  – the directive informs the assembler that the next

code or data following the directive should be allocatted in the address

mentioned with the directive.

Ex: ORG 100h

temp db 34h,67h,

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T

 .

16

Page 17: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 17/18

Assembler Directives

17. PTR (pointer)  – used to explicitly specify the type of data

being referred by a variable.

Ex: data SEGMENT

Array db 12h,23h,34h,45h

data ENDS

code SEGMENT

mov BX, OFFSET Array

Mov DL, BYTE PTR[BX]

code ENDS

18.MODEL  – this directive provides shortcuts in defining

segments. It initializes memory model before defining any

segment. The memory model can be small, large, medium.

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T .

17

Page 18: microprocessers

7/29/2019 microprocessers

http://slidepdf.com/reader/full/microprocessers 18/18

Assembler Directives

19. MACRO – informs the assembler the beginning of the macro.

20. ENDM – informs the assembler the end of the macro.

Ex: macro name MACRO arguments

----------

--------

ENDM

   P   r   e   p

   a   r   e    d    b   y  :   S

    h   r   u   t    h   i .   K ,

   D   e   p   t .   o

    f

   E   &   C ,   M   I   T .

18