microcomputer engineering operatingsystem slide 1 the operating system (os)
TRANSCRIPT
MicroComputer Engineering OperatingSystem slide 1
the Operating System (OS)
MicroComputer Engineering OperatingSystem slide 2
The Operating System (OS)
Operating System
P1: Editor
P2: Compiler
P3: QuakeArena
MIPS
At any one time the processor (MIPS) is only excecuting one program (process).
MicroComputer Engineering OperatingSystem slide 3
The Operating System (OS)
Operating System
P1: Editor
P2: Compiler
P3: QuakeArena
MIPS
At any one time the processor (MIPS) is only excecuting one program (process).
MicroComputer Engineering OperatingSystem slide 4
The Operating System (OS)
Operating System
P1: Editor
P2: Compiler
P3: QuakeArena
MIPS
At any one time the processor (MIPS) is only excecuting one program (process).
MicroComputer Engineering OperatingSystem slide 5
The Operating System (OS)
Operating System
P1: Editor
P2: Compiler
P3: QuakeArena
MIPS
At any one time the processor (MIPS) is only excecuting one program (process).
MicroComputer Engineering OperatingSystem slide 6
The Operating System (OS)
Operating System
P1: Editor
P2: Compiler
P3: QuakeArena
MIPS
At any one time the processor (MIPS) is only excecuting one program (process).
MicroComputer Engineering OperatingSystem slide 7
Our Assembler
.data
.kdata
.text
.ktext
User
Kernel
MicroComputer Engineering OperatingSystem slide 8
The Hardware
.data
.kdata
.text
.ktext
User
Kernel
OKERROR!
MicroComputer Engineering OperatingSystem slide 9
How does the User program pass control to the Operating System?
Take control on ERROR Pass control explicitly
MicroComputer Engineering OperatingSystem slide 10
ERROR
Ex, Arithmetical Overflow li $4 0x80000000 neg $4 $4 (sub $4 $0 $4)
0x00000000 - 0x80000000
0x80000000
Sign differs
Same Sign ! ERROR
MicroComputer Engineering OperatingSystem slide 11
Signed/Unsigned Arithmetics
The only difference is that– Unsigned never causes ERROR
– Signed causes ERROR on Overflow etc.
Signed
ADDSUBADDI..
Unsigned
ADDUSUBUADDIU..
MicroComputer Engineering OperatingSystem slide 12
Memory Error
Instruction Memory = Bad PC Data Alignment Error Access Protected Memory from User mode Nonexistent Memory (Page fault Chapter 7)
MicroComputer Engineering OperatingSystem slide 13
Do not confuse !
A Memory that tells the pipeline to Wait– relate to “cache miss”
A Memory Error or Page Fault– relate to “TLB miss”, more about that later
MicroComputer Engineering OperatingSystem slide 14
The Consequence
A Memory that tells the pipeline to Wait
–Pipeline Stall A Memory Error or Page Fault
–Exception
MicroComputer Engineering OperatingSystem slide 15
Pass Control Explicitly
The User wants some service from the Operating System– File I/O
– Graphics
– Sound
– Allocate Memory
– Terminate Program (no HALT instruction in real MIPS)
SYSCALL (causes an exception)
MicroComputer Engineering OperatingSystem slide 16
How to choose service:
Is there different SYSCALLs? NO! Only one, use a register ($a0) to choose Use other registers ($a1,...) as parameters Use $v0 for result
ori $a1 $r0 ‘A’ ; Char ‘A’ori $a0 $r0 0x00 ; Write Charsyscallori $a0 $r0 0x01 ; Read Charsyscallor $a1 $r0 $v0 ; Move result $v0->$a1ori $a0 $r0 0x00 ; Echo Charsyscall
MicroComputer Engineering OperatingSystem slide 17
Other ways for the Operating System to take control?
External Interrupts, (not caused by User program)– Timers
– Harddisk
– Graphics
– Sound
– Keyboard, Mouse, other perhipals
MicroComputer Engineering OperatingSystem slide 18
Coprocessor CP0
8 Bad Memory Address 12 Status Register 13 Cause Register 14 Exception Address (EPC)
MicroComputer Engineering OperatingSystem slide 19
Status Register CP0 ($12)
“Mode Stack” External Interrupt enable/disable
MicroComputer Engineering OperatingSystem slide 20
“Mode Stack”
OLD PREVIOUS CURRENT
KU IE
0 Kernel Mode1 User Mode
0 External Interrupt Disable1 External Interrupt Enable
KU
IE
KU IEKU IE5 0
MicroComputer Engineering OperatingSystem slide 21
Exception / Interrupt Occurs
OLD PREVIOUS CURRENT
KU IE KU IEKU IE
KU IEKU IE 0 0
0 Kernel Mode1 User Mode
0 External Interrupt Disable1 External Interrupt Enable
KU
IE
MicroComputer Engineering OperatingSystem slide 22
RFE Instruction (priviliged)
OLD PREVIOUS CURRENT
KU IE KU IEKU IE
KU IEKU IE? ?
We restore the PREVIOUS (KU,IE) into CURRENT
MicroComputer Engineering OperatingSystem slide 23
External Interrupts
Bit 0, (Current Interrupt Enable)– All External Interrupts Enable/ Disable
Bit 15..10, (individual interrupt enable)
INT 4 INT 3 INT 2 INT 1 INT 0 Current IE............
INT 5
15 10 0
MicroComputer Engineering OperatingSystem slide 24
Enable External Interrupt 2
Bit 0 = 1, (External Interrupt Enabled) Bit 12 = 1, Interrupt 2 Enabled
Current IE = 1............
15 10 0
INT 4 INT 3 INT 2 INT 1 INT 0INT 5
0 0 0 0 01
MicroComputer Engineering OperatingSystem slide 25
Cause Register (CP0 $13)
Bit 5..2, Exception Cause Code Bit 15..10, Interrupt Pending Bit 31, Exception Occur In Branch Slot
10
INT 5 INT 4 INT 3 INT 2 INT 1 Ex 3 Ex 2 Ex 1 Ex 0BS
5 231 15
INT 0.... .... ...
Exception Cause Codesee LSI Logic User’s Manual
Pending Interrupts
MicroComputer Engineering OperatingSystem slide 26
Check if Interrupt 2 Pending
Mask with bit 12
15 10
INT 4 INT 3 INT 2 INT 1 INT 0INT 5
AND
0 0 0 0 0
CP0 $13
0 0 0 0 01
INT 2
MicroComputer Engineering OperatingSystem slide 27
Resume User Program
CP0 $14 Holds the Exception Address
(Addr to instruction in EX stage)
mfc0 $k0 $14 ; resume address
jr $k0 ; $k0 kernel reg
rfe ; “delayed branch”
MicroComputer Engineering OperatingSystem slide 28
Shared “Stack”Assume that the User program uses the stack:Can the Kernel use the same stack ($sp)?
Yes, but remember never to use memory below $sp, it will be destroyed (overwritten)!!
$sp
$sp User Data
User Data
User Data
User Data
Kernel Data
Kernel Data