metaswitch and intel: a systematic approach to nfv
TRANSCRIPT
THE BRAINS OF THE NEW GLOBAL NETWORK
INTEL AND METASWITCH A SYSTEMATIC APPROACH TO NFV
Simon Dredge @dredgie Director, Technical Marketing
Carrier Network Virtualization // Intel Pre-Conference Workshop //
November 2015 //
software
SYSTEMATIC STEPS TO NFV
// Make the transition from
NEP to Network Software Provider
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softwarecots h/w
SYSTEMATIC STEPS TO NFV
NIC
CPU
Network Function
Operating System
// Make the transition from
NEP to Network Software Provider
Metaswitch Networks | Proprietary and confidential | © 2015 | 3
softwarecots h/w
virtualize
SYSTEMATIC STEPS TO NFV
NIC
CPU
Network Function
Operating System
NIC
CPU
Virtual Machine
Network Function
Operating System
vNIC
// Make the transition from
NEP to Network Software Provider
Metaswitch Networks | Proprietary and confidential | © 2015 | 4
softwarecots h/w
virtualizecloud/nfv
SYSTEMATIC STEPS TO NFV
NIC
CPU
NIC
CPU
Network Function
Operating System
NIC
CPU
vSwitch
Virtual Machine
vNIC
Network Function
Operating System
Virtual Machine
Network Function
Operating System
vNIC
// Make the transition from
NEP to Network Software Provider
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STEPS TO NFV: CARRIERS
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Custom Hardware
Virtualized
Cloud / NFV LOW
HIGH
COTS Hardware
Price Perf. Efficiency Flexibility
NFV OR BUST
FlexibilityIncreased dependency on SDN techniques augment Capex savings with Opex
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OUT WITH THE OLD: REINVENTING THE SBC
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General Purpose
CPU
DSP
Media Signaling
blacklisted packet discard
NetworkProcessorCrypto
TCAM
No vMigration
SBC Application
NxCPU Core
OS Kernel
System Memory
I/O
Intel Architecture
A path to NFV
A PICTURE OF TWO DISTINCT SBC APPROACHES
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SMART SOFTWARE AND POWERFUL PROCESSORS ELIMINATE THE NEED FOR CUSTOM HARDWARE //
// Multi-thread across multiple cores
// Use cache memory as the TCAM
// Leverage CPU AES instruction set
// Do performance jobs in the kernel
// New codecs are designed for CPU
AN SBC ARCHITECTED FOR THE CLOUD
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software cots h/w
virtualize cloud/nfv
PERFORMANCE AND DATAPLANE ACCELERATION
// Perform processor-intensive functions in the kernel / close to the hardware
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PERFORMANCE AND DATAPLANE ACCELERATION
software cots h/w
virtualize cloud/nfv// Single Root IO Virtualization (SR-IOV)
// DMA’s into guest I/O memory space without interrupting the hypervisor or VM CPU
// Bypasses the Hypervisor / vSwitch
// Perform processor-intensive functions in the kernel / close to the hardware
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PERFORMANCE AND DATAPLANE ACCELERATION
software cots h/w
virtualize cloud/nfv
// Data Plane Development Kit (DPDK)
// A collection of open source Linux libraries and drivers
// Polled zero-copy DMA into large ring FIFO / ring buffer
// Single Root IO Virtualization (SR-IOV)
// DMA’s into guest I/O memory Space without interrupting the hypervisor or VM CPU
// Bypasses the Hypervisor / vSwitch
// Perform processor-intensive functions in the kernel / close to the hardware
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SBC PERFORMANCE TESTING RESULTS
softwarecots h/w
virtualizecloud/nfv
SR-IOVKernel Smarts DPDK
100%
Perimeta vSBC comparison with classic hardware
SBCs
94%85%
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// Lightweight Linux Containers (LXC)
// More efficient for VNFC / Microservices
// No access to the Kernel, unlike VMs
// 20% of the function / 80% of the CPU
// Employ Graphics Processors (GPUs)
// Offload processor-intensive operations
FUTURE: MICRO SERVICES AND MANAGED CONTAINERS
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THE BRAINS OF THE NEW GLOBAL NETWORK
THANK YOU
Simon Dredge @dredgie Director, Technical Marketing
November 2015