metallization and nanostructuring of semiconductor surfaces by galvanic displacement processes

Surface Science Reports 62 (2007) 499–525www.elsevier.com/locate/surfrep

Metallization and nanostructuring of semiconductor surfaces by galvanicdisplacement processes

Carlo Carraroa, Roya Maboudiana,∗, Luca Magagninb

a Department of Chemical Engineering, University of California, Berkeley, CA 94720, USAb Dipartimento di Chimica, Materiali e Ing. Chimica G. Natta, Politecnico di Milano, Milan, Italy

Accepted 8 June 2007

Abstract

The deposition of metals on semiconductors encompasses a broad range of technologically important processes, with applications rangingfrom electronic devices to chemical sensors. Recent years have witnessed a surge of research activities in galvanic displacement processes onsemiconductor substrates. After a brief review of the fundamental aspects underlying galvanic displacement processes on semiconductor surfaces,this paper discusses applications to micro- and nanoscale devices, including schemes developed for the metallization and nanopatterning ofsemiconductor substrates with high selectivity and with optimal interfacial properties.c© 2007 Elsevier B.V. All rights reserved.

Keywords: Galvanic deposition; Metalization; Semiconductor surfaces; Electrodeposition; Electroless deposition

Contents

1. Introduction and roadmap ........................................................................................................................................................ 5002. Electrolytic and electroless plating ............................................................................................................................................ 500

2.1. Electrodeposition .......................................................................................................................................................... 5002.2. Autocatalytic deposition ................................................................................................................................................ 5012.3. Galvanic displacement ................................................................................................................................................... 501

3. Electrochemistry of semiconductors .......................................................................................................................................... 5023.1. Silicon ......................................................................................................................................................................... 5023.2. Germanium .................................................................................................................................................................. 503

4. Galvanic displacement of metallic films on semiconductors ......................................................................................................... 5034.1. General ........................................................................................................................................................................ 5034.2. Displacement of noble metals ......................................................................................................................................... 5054.3. Displacement of platinum group metals ........................................................................................................................... 5074.4. Galvanic displacement from fluoride-free solutions ........................................................................................................... 508

4.4.1. Nickel on silicon .............................................................................................................................................. 5084.4.2. Noble metals on germanium .............................................................................................................................. 508

4.5. Galvanic displacement on III–V semiconductors............................................................................................................... 5084.6. Galvanic displacement on barrier layers ........................................................................................................................... 5094.7. Semiconductor–metal interface....................................................................................................................................... 510

5. Applications to microstructures and devices ............................................................................................................................... 5115.1. General ........................................................................................................................................................................ 511

∗ Corresponding author. Tel.: +1 510 643 7957; fax: +1 510 642 4778.E-mail address: [email protected] (R. Maboudian).

0167-5729/$ - see front matter c© 2007 Elsevier B.V. All rights reserved.doi:10.1016/j.surfrep.2007.08.002

http://www.elsevier.com/locate/surfrep

mailto:[email protected]

http://dx.doi.org/10.1016/j.surfrep.2007.08.002

500 C. Carraro et al. / Surface Science Reports 62 (2007) 499–525

5.2. Process requirements for free-standing microstructures...................................................................................................... 5115.3. Copper forming by galvanic displacement on silicon microstructures .................................................................................. 5125.4. Functionalization of galvanically deposited films and their work of adhesion ....................................................................... 5125.5. Galvanic displacement on AFM microcantilevers.............................................................................................................. 5135.6. Copper displacement for interconnects ............................................................................................................................ 514

6. Applications in nanoscale science and devices ............................................................................................................................ 5156.1. General ........................................................................................................................................................................ 5156.2. Nucleation of metallic clusters........................................................................................................................................ 5156.3. Galvanic displacement from microemulsions.................................................................................................................... 5176.4. Nanowire growth from metal catalysts deposited by galvanic displacement.......................................................................... 5186.5. Complex nanostructures grown by galvanic displacement processes.................................................................................... 521

7. Conclusions............................................................................................................................................................................ 523Acknowledgments................................................................................................................................................................... 523References ............................................................................................................................................................................. 523

1. Introduction and roadmap

The integration of metals with semiconductors has played acrucial role in shaping modern integrated circuit (IC) technol-ogy. Electrochemical processes are at the core of several impor-tant steps in semiconductor manufacturing. Among these, thedamascene electrolytic process, which has allowed the replace-ment of the Al-based interconnect technology with one basedon Cu, may be the most widely known example. However, othertechnologies are being developed and hold promise to deliversignificant advances, especially in regard to the integration ofnanoscale processes and devices. One such technology, the de-position of metals on semiconductors by galvanic displacement,has received intense renewed attention from the research com-munity in the past decade, and is the subject of this review.

In the galvanic displacement process, reduction of metalions in solution is effected by the substrate itself uponimmersion in the plating bath, without external powersources and without the need of a reducing agent in thebath. It is a versatile process, well suited to yield filmswith high purity and substrate adhesion, and with completesubstrate selectivity. The main thrust of the present workis to review the applications of galvanic displacement onsemiconductors to micro- and nanostructures, and to nanoscaleprocesses. Less emphasis is placed on the fundamentalchemistry underlying the mechanism of galvanic displacementon semiconductor substrates, since this is intimately relatedto their surface electrochemistry, for which excellent reviewsalready exist [1–9]. As such, we shall not attempt to write acomprehensive review of the displacement mechanism, but weshall cover those aspects that are essential for understandingits main thrust, with particular emphasis on the properties ofthe metal–semiconductor interface created by the immersionplating process.

This review is organized as follows. After establishing theunique identity of galvanic displacement among electrochemi-cal processes in general, and electroless processes in particular,we illustrate the process by means of a few well-studied ap-plications involving displacement on metallic substrates (Sec-tion 2). The relevant aspects of Si and Ge electrochemistry areintroduced in Section 3. The metallization of Si and Ge by gal-vanic displacement is discussed in Section 4, where the cases

of noble metals and platinum group metals are treated sepa-rately. Galvanic displacement on III–V compound semiconduc-tor substrates and on barrier layers is also reviewed. Of particu-lar interest throughout are those studies that address the chem-ical and mechanical nature of the metal–semiconductor inter-face obtained by galvanic displacement. Applications of gal-vanic displacement processes to microdevices are reviewed inSection 5. Intense research efforts are currently devoted to un-derstanding the properties of nanostructures grown by galvanicdisplacement on various semiconducting substrates. Section 6presents a review of this rapidly evolving field.

2. Electrolytic and electroless plating

The galvanic displacement plating process is sometimesgenerally, but not satisfactorily, defined as the depositionof a metallic coating on a substrate from a solution thatcontains the ions of the coating material. This definition ofthe displacement mechanism is misleading because it can beapplied to most of the plating processes from aqueous phase.Also the expression, plating, denoting a general application of ametallic coating, is commonly used to indicate the deposition ofmetallic films through electrochemical processes. Even if theyare commonly grouped together under electrochemical methodsor electrodeposition processes, distinctions between electrolyticand electroless deposition processes must be made, as is donebelow and illustrated in Fig. 1 [10–13].

2.1. Electrodeposition

An electrolytic process is the modification of a substratesurface in an aqueous or non-aqueous electrolytic environmentby the application of an external voltage or current flowbetween two electrodes, one of these consisting of the basematerial. An electrolytic process may be the deposition ofa metallic coating; in this case, the deposition rate, thelimiting film thickness and its uniformity, and film propertiesdepend on both the electrolyte formulation and the appliedvoltage and current. Electrolytic processes are referred to aselectrochemical deposition methods due to the charge exchangethat occurs at the interface between the solid and the liquidphases.

C. Carraro et al. / Surface Science Reports 62 (2007) 499–525 501

Fig. 1. Cell set up for (left) electrolytic deposition process with external power source; (right) electroless deposition with reducing agent R as the source of electrons.

2.2. Autocatalytic deposition

Electroless plating processes are defined as the depositionof a metallic coating on a substrate without the use of anexternal voltage or current. They are commonly referred toas chemical rather than electrochemical methods in order toemphasize the absence of an external power supply, even iftheir mechanisms can be explained by taking account of theirelectrochemical redox potential. Among the electroless platingprocesses, a distinction can be made between autocatalytic andgalvanic displacement methods. The autocatalytic method isan electroless process in which the reduction of the metallicions in solution and film deposition can be carried out throughthe oxidation of a chemical compound present in the solutionitself, i.e., of a reducing agent. This reducing agent, under adefined temperature which depends on the reducing agent itselfand on the bath’s composition, spontaneously oxidizes, freeingelectrons for the reduction of the metallic ions. It is properlynamed autocatalytic, because the oxidation of the reducingagent can start or become self-sustained only at the depositingmetal surface. This is the reason why for some non-catalyticbase materials, the activation of the deposition with catalyticmetals such as palladium is required [10–12]. Examplesof an autocatalytic process are the well known electrolessnickel deposition from hypophosphite based solution (usedin electronics as a barrier layer in soldering and in surfaceengineering applications as a corrosion resistant coating) orthe electroless copper process for the deposition of the firstthick conductive layer for copper interconnects in integratedcircuits [10]. In comparison to electrodeposition, autocatalyticdeposition avoids current distribution, improves thicknessuniformity and allows film deposition with a thickness thatmainly depends on the deposition time. Complexing agentsand stabilizers can be added to the solution in order to avoidthe reduction and precipitation of metallic powders in the bulksolution.

2.3. Galvanic displacement

Galvanic displacement or immersion plating (sometimesalso called cementation) on a substrate takes place when the

base material is displaced by a metallic ion in solution that has alower oxidation potential than the displaced metal ion [14–25].The base material is dissolved into the solution; meanwhilethe metallic ions in the solution are reduced on the surfaceof the base material. Such a mechanism differs completelyfrom autocatalytic deposition because, in immersion plating,reducing agents are not required to reduce the metal ions tometal, as the base material behaves as the reducing agent.

Perhaps the most commonly discussed example ofimmersion plating is the deposition of copper onto steel in acopper sulfate acid solution through the following reaction:

Fe + Cu+2→ Cu + Fe+2. (1)

Paradoxically, this process is discussed as an example of areaction that must be avoided in copper electroplating from anacid electrolyte onto steel during the dipping of the substrateinto the solution. The reason is that the deposited copperlayers display poor adhesion to the metal layers subsequentlyelectrodeposited. Usually, copper electroplating onto steel iscarried out in an alkaline copper cyanide based electrolyte,whereby cementation can be avoided. Regardless, galvanicdisplacement deposition processes are widely used, since theyyield high value finishes on a variety of metals.

The following characteristics of the galvanic displacementprocess can be pointed out:

• The thickness of the deposited film obtained by immersionplating is limited (typically, in the range of hundreds ofnanometers), because the deposition stops when the entiresurface of the base metal is coated. As a consequence ofsuch complete coverage and dense morphology of the film,the source of reducing agent is hindered.

• Reaction rates increase with increased temperature.• Stirring is sometimes beneficial to the characteristics of

the coating, by improving uniformity and reducing surfaceroughness.

• Immersion reaction rates are not easily controllable, due tothe fast exchange of charges between oxidizing and reducingspecies. Due to the nature of the displacement process,the deposition occurs by downward growth. The surfaceof the coating reproduces almost exactly that of the base


Fig. 2. Comparison of energy level distribution and charge exchange under equilibrium conditions between a semiconductor surface and a redox electrolyte systemwith unnoble (left) and noble (right) normal potential (D stands for density of states.)

material, both in contour and in location, avoiding currentdistributions issues and the absence of electrical connectionsamong areas of the substrate.

Immersion plating is a part of many finishing processes,ranging from decorative or functional coatings to integratedcircuit soldering. Zinc immersion plating on aluminiumfrom alkaline zincate solution is fundamental for subsequentdecorative plating or hard chromium electroplating [10]. Zinccementation is required to reduce the activity of the aluminiumsurface, as a sort of sacrificial layer, which is partially dissolvedduring the immersion in acidic hexavalent chromium basedelectrolytes. Many decorative films of the noble or platinumgroup metals on copper and copper alloys can be depositedthrough immersion plating, producing adherent, wear resistantand tarnish-free coatings.

Immersion gold is used in integrated circuits wheresoldering is required. The so-called ENIG process, ElectrolessNickel Immersion Gold, allows the formation of solderedjoints between components with high strength, reliability andconductivity [26,27]. A layer of nickel, about 5 µm thick, isdeposited autocatalytically on top of the copper pads, in orderto have a barrier layer between the copper and the tin-basedsolder alloys. A layer of gold, in the 0.1–0.2 µm range, isdeposited by immersion plating onto the nickel layer to protectthe barrier layer from corrosion and oxidation during storageprior to soldering. The thin gold film is dissolved rapidly intothe solder alloy during the subsequent heating cycle. Immersiongold on autocatalytic nickel is commonly carried out fromacid cyanide solution in the temperature range of 95–98 ◦C.Immersion plating allows deposition on difficult surfaces, suchas the inside of vias, and on surfaces that are not in the lineof sight, or in cases where it is difficult to make electricalconnections to isolated areas of the base material. This basishas been used for years for obtaining solder finishes with thehighest reliability.

3. Electrochemistry of semiconductors

3.1. Silicon

Numerous electrochemical investigations have been dedi-cated to silicon, particularly to the problems of anodic oxida-tion, electro-polishing, chemical etching and corrosion undergalvanic coupling [28–54]. The electronic properties of siliconare essential in the understanding of silicon as an electrode ma-terial in an electrochemical cell. Silicon immersed in an elec-trolyte behaves as a Schottky diode, a metal–semiconductorcontact with the formation of a space charge region if biasedor due to surface states [55–60]. Fig. 2 shows the example of asemiconductor in contact with a relatively unnoble redox elec-trolyte, in which the electron exchange is dominant in the con-ductance band. In the presence of a relatively noble redox elec-trolyte, the electron exchange predominates in the valence band.When surface states exist in the region of the semiconductorgap, an additional electron exchange can occur with these en-ergy levels.

Silicon has a standard reduction or redox potential of−0.857 V with respect to the standard hydrogen electrode(SHE). Since galvanic displacement on Si is typically carriedout in fluoride containing baths, it is useful to examine thepotential/pH diagram, also known as the Pourbaix diagram,for the Si–F–H2O system. The diagram, depicted in Fig. 3,maps out the various equilibrium phases for two differentfluoride concentrations. The stable region of silicon is shownto lie below the line of equilibrium conditions for thereduction of water to hydrogen, indicating that silicon is notthermodynamically stable in water and aqueous solutions andreadily oxidizes [60].

From the Pourbaix diagrams and considering the effectsof pH and fluoride content on silicon stability, electrolytescommonly used for the electrochemical processing of siliconcan be selected according to their constituents or their pH.At low pH, silicon can be considered as quite inert due to


Fig. 3. Potential–pH diagrams for the Si–F–H2O system at 25 ◦C [60]. In (a)Si = {10−3

}, F = {1}, and in (b) {Si} = {10−3}, F = {10−3

}. Reprinted withpermission from Ref. [60].c© 2005, IEEE.

the formation of a passive layer of oxide. This oxide filmcan be dissolved in hydrofluoric acid (HF) solution, while thedissolution rate of bulk Si in HF at open circuit potential (OCP)is negligible. In pure water, silicon tends to be oxidized withformation of hydrogen, silicon hydride, silica and silicates.In presence of fluoride ions, the formation of soluble siliconhexafluoride, SiF2−

6 , particularly in acid solution, takes place.Following etching in fluoride-containing solutions, silicon

surfaces are characterized by unique electronic passivationproperties, showing the lowest surface recombination veloci-ties, which is attributed to the establishment of a complete Si–Htermination [55]. It is also observed that their surface structureis greatly influenced by the pH of the HF or NH4F solutions, af-fecting the formation of –SiH2 and –SiH3 groups onto the sur-face. Ideal flat H-terminated Si(111) surfaces can be obtainedby increasing the pH to 8, with buffered ammonium fluoride so-lutions [61–63], because the reaction follows a chemical ratherthan an electrochemical mechanism [55].

The dissolution of silicon in fluoride-containing solutionshas been the subject of intense research for the past severaldecades, and can be explained as comprising a chemicaland an electrochemical component. As proposed by Allongueet al. [62,63] and illustrated in Fig. 4(a), for solutions with pH

ranging from 4 to 8, the chemical mechanism requires watermolecules and starts with the hydrolysis of the Si–H surfacebonds at a kink site, as the rate limiting step. The Si–F bondformation that follows weakens the Si–Si back bond, leadingto Si dissolution. At pH 4, the effect of undissociated HFmust be considered. For lower pH, practically no chemicalreactions take place. Under anodic bias and for pH > 4(Fig. 4(b)), the electrochemical reaction takes place due tothe dissociation of the Si–H bond by thermal activation ofthe electrons in the Si–H bond. Fluoride ions are not directreactants, but they contribute to the activation of the dissolutionreaction. Following a two-step process, an Si–F bond is formed,after which the mechanism proceeds chemically, involvingmolecular water. At lower pH, anodic reactions do not involvefluoride species due to the fact that F− ions are almost absent insolution. The electrochemical mechanism at OCP for pH > 4(Fig. 4(c)) involves the dissolution reaction of the Si–H bonds,which becomes reversible. The negatively charged Si(−) surfacegroups react then with molecular water. The observed variationsin the etch rate with the pH at the test potential can be explainedthrough the change in the degree of stability of the Si–H bond –namely, the lower the pH, the lower its tendency to dissociate.

3.2. Germanium

The electrochemistry and wet etching of Ge have beenextensively studied [55–58,64,65]. Some mixtures that arefrequently used for the wet etching of Ge are mentionedhere. The corrosion of germanium in aqueous solutionswithout oxidants occurs by the formation of soluble GeO withsimultaneous hydrogen evolution according to the followingreaction:

Ge + H2O = GeO + H2. (2)

Germanium resembles the III–V semiconductors withrespect to its unstable oxide, which dissolves in water unlikesilica. In contrast to silicon, germanium undergoes anodicdissolution in a variety of acidic media, including H2SO4,HCl and HClO4 [55]. A wide variety of etching compositionsexists that contain HNO3 and HF as basic ingredients, withHNO3 being a strong oxidizing agent and HF being a strongcomplexing chemical. The behaviour of the etching solutioncan be related to its composition with the etch rate characterizedby an induction period due to the fact that not HNO3, buta decomposition product such as NO is the actual etchingagent. H2O2 can replace the nitric acid as the oxidizer andthese mixtures lead to more controllable behaviour, due to theabsence of any induction period. The etch rate is sensitive to thecrystallographic orientation in all cases, as is with silicon.

4. Galvanic displacement of metallic films on semiconduc-tors

4.1. General

Galvanic displacement on Si from solutions containingHF is a redox reaction in which both anodic and cathodic


(a) Chemical reaction.

(b) Anodic reaction.

(c) Electrochemical reaction at OCP.

Fig. 4. Structural 2-D model proposed for the dissolution of n-type Si in NH4F solutions of pH 4–8. (a) Chemical reaction; (b) Electrochemical anodic dissolutionwithout illumination (B is an empty surface state); (c) Electrochemical dissolution at open circuit potential (B′ is state B filled with one supplementary electron).Reprinted with permission from Ref. [162].c© 1995, Elsevier.

Fig. 5. Mechanism of galvanic displacement of metals on silicon.

processes occur simultaneously at the Si surface while thecharge may be exchanged through the substrate, as representedin Fig. 5 [66–71]. Fluoride ions in solution help sustainthe reaction by dissolving the silicon substrate as siliconhexafluoride, avoiding the formation of silicon oxide, thusexposing new silicon surface.

As commonly reported, the global chemical reaction of theredox couple is:

Mn+(aq) + Si0(s) + 6F−(aq) = M0(s) + SiF2−

6 (aq), (3)

where aq and s indicate the aqueous and solid phases, respec-tively. Reaction (3) can be divided in two half-cell processes:

Mn+ (aq) + ne−= M0(s) (4)

SiF2−

6 (aq) + 4e−= Si0(s) + 6F−(aq)

E0(Si4+/Si0) = −1.20VSHE.(5)

Silicon is dissolved in solution as silicon hexafluoride, whilethe metal is deposited from solution with a deposition raterelated to the concentration of HF in the solution. Usually,the silicon surface shows an increase in surface roughness,particularly at the region close to the metal deposits, andsometime pitting is observed. The oxidation of silicon followedby the galvanic displacement of the metal ions in solution isbelieved to initiate at defects on the surface such as kinks,steps, contaminated sites, or areas chemically more reactivethan H-terminated regions. As such, the deposition rates can beenhanced by increasing the density of surface defects, e.g., byAr bombardment. Doping of the silicon substrate can affectthe deposition mechanism, due to the transfer of the chargedcarriers through the substrate during displacement [72].

The standard redox potentials for metal reaction are reportedin Table 1 [71]. Galvanic displacement is thermodynamicallymore favourable for metals with higher redox potentialvalues, e.g., for gold or palladium than for copper or nickel.Considering that the redox potential for reaction (4) is muchmore negative than for hydrogen evolution (e.g., −0.48VSHEin 40% NH4F and −0.12 V in 0.5% HF) and for noble andplatinum group metals deposition, two cathodic reactions mustbe considered, namely, reaction (4) together with the followingone:

2H++ 2e−

= H2. (6)

The efficiency of the metal deposition on the silicon surface isexpected to vary according to the composition and the pH of the


Table 1Redox potentials for metals more noble than hydrogen (referred to the hydrogenstandard electrode)

Metal Redox Potential (V vs. NHE)

Au Au+3/Au 1.42Pt Pt+2/Pt 1.2Ir Ir+4/Ir 0.926Pd Pd+2/Pd 0.83Ru Ru+2/Ru 0.8Ag Ag+/Ag 0.779Rh Rh+3/Rh 0.76Cu Cu+2/Cu 0.340Re Re+3/Re 0.3Ni Ni+2/Ni −0.23

solution. In addition, the presence of the first metallic nuclei ontop of the silicon surface can modify the dissolution mechanismand catalytically enhance the evolution of hydrogen [66,73].

4.2. Displacement of noble metals

The reducing behaviour of elemental silicon toward noblemetal ions in aqueous solutions containing fluoride ions haslong been known [74–80]. These reactions are of interest inmicroelectronics technology, where fluoride solutions are usedto wet etch the native oxide of silicon. Contamination bymetallic ions can lead to undesirable deposition of noble metalimpurities on the Si surface, compromising the performanceof electronic devices [81–83]. The deposition of metal filmsfrom fluoride-containing solutions both on silicon (Cu, Au)and germanium (Au) was studied by Balashova et al. [84] andKrikshtopaitis et al. [85] about thirty years ago. A reductionin the metal precipitation rate was observed with time forboth silicon and germanium. The evaluation of the germaniumpotential during deposition indicated that the reduction of goldions took place predominantly by charge transfer through thevalence zone of the electrode.

Magagnin et al. studied Au films deposited on Si(111) andon Ge(111) surfaces by the galvanic displacement method influoride-containing solutions, as shown in Fig. 6 [86]. While theAu/Si interface formed in this process was found to be weak,the Au films adhered very strongly to the surface of Ge, even inthe thick film regime. Adhesion of the gold films on germaniumwas related to the formation of a chemical bond betweenthe Au and Ge atoms. This was confirmed from the valenceband (VB) region of the X-ray photoelectron spectra obtainedfrom germanium coated with gold. In particular, the spectrumshowed a shift in the main peak towards higher binding energiesas well as an increased density of states at binding energy BE =

0. The deconvolution of the valence band spectrum revealed asecond peak at 3.7 eV binding energy after 5 s deposition. Thisbinding energy is 0.5 eV higher than that of the 5d5/2 orbitalsin the clean Au VB peak (the VB of clean gold has peaks at3.2 and 6.1 eV binding energies), see Fig. 7. Such a shift wasattributed to the interaction of the metal with the germaniumsubstrate, with the formation of a stoichiometric compoundat room temperature, such as in the case of palladium andplatinum on silicon and germanium [86–88]. In contrast, no

Fig. 6. Scanning electron micrograph of a Ge sample plated for 30 min in 1mM Au bath.

Fig. 7. X-ray photoemission spectra of the valence band region of clean (a) andAu plated (5 s in 1 mM KAuCl4 bath) Ge. Thick solid line: data. Dashed line:fitted peak constrained to the Au 5d binding energy values. Dotted line: fittedpeak at 3.7 eV BE. Thin solid line: residual. The new peak at 3.7 eV bindingenergy is attributed to the interaction of the Au 5d5/2 electrons with Ge 4(sp)orbitals.

perturbation of the core or valence band electronic structure wasdetected at the Si–Au interface.

Silver galvanic displacement on silicon has been employedto achieve nanostructured films, such as nanopillars, for surfaceenhanced Raman scattering (SERS) analysis [89]. Galvanic dis-placement of silver can be carried out in silver nitrate and hy-drofluoric acid solutions [89–91]. The displacement reaction is:

Si (s) + 6F−(aq) + 4Ag+(aq) = 4Ag(s) + SiF2−

6 (aq). (7)

Considering the metal reduction reaction:

Ag+(aq) + e−= Ag(s) E0

= 0.8VSHE (8)

The process is thermodynamically favourable, with a standardcell potential of 2 V. There are a large number of possible steps,and in principle any one of these could be rate determining:(i) diffusion of Ag+ to the silver surface; (ii) adsorption ofAg+and charge transfer to yield silver on silver; (iii) F− dif-fusion, charge transfer and reaction at the Si surface to yieldSiF2−

6 ; (iv) desorption of SiF2−

6 ; and (v) diffusion of SiF2−

6away from surface. The overall growth rate was observed tobe diffusion controlled by silver species [89].

Metallization plays a key role in the production process ofintegrated devices. Copper has been pursued as an alternativematerial to aluminium to address the need for metallic thin films


Fig. 8. Copper film from ammonium fluoride (NH4F 40%) 50% vol., coppersulfate (CuSO4·5H2O) 0.01M, ascorbic acid (C6H8O6) 0.01M, sodiumpotassium tartrate (KNaC4H4O6·4H2O) 0.005M, and methanol 30% vol. after30 min deposition at room temperature on Si(100) [97].

with low resistivity and high electromigration resistance [92].Several studies have been carried out on the galvanic depositionof copper from fluoride containing solutions, providing anattractive deposition method for copper interconnects or seedlayers for subsequent metallization [93]. Galvanic displacementis also a promising avenue for the integration of metals inmicromechanical devices, due to its conformal nature and highsubstrate selectivity [86].

In the case of copper, the displacement reaction involvesreactions (6) and (7) together with the following one:

Cu2++ 2e−

= Cu E0= 0.340VSHE. (9)

Typically, copper deposition has been carried out from a coppersulphate and hydrofluoric acid based solution [74–80,94,95].A crucial issue in the aforementioned processes is the lackof adhesion between the copper and the Si substrate, whichmay severely constrain their application [96]. Magagnin et al.reported a new process for the galvanic deposition of copperfilms with high reflectivity and smoothness onto silicon fromammonium fluoride containing solutions [97]. The deposition

was carried out at room temperature in a solution consistingof ammonium fluoride (NH4F 40%) 50% vol., copper sulphate(CuSO4·5H2O) 0.01M, ascorbic acid (C6H8O6) 0.01M,sodium potassium tartrate (KNaC4H4O6·4H2O) 0.005M, andmethanol 30% vol. (percentages are referred to the finalsolution volume). The deposition was achieved on singlecrystalline Si(100) and Si(111), p- or n-type as well as onpolycrystalline silicon substrates. The authors observed thatthe adhesion of the copper film to the substrate was stronglyrelated to the presence of ascorbic acid in solution. The absenceof the acid resulted in the formation of a copper film whichfailed the standard scotch tape test. The good adhesion of themetallic films to the substrate was attributed to the preventionof hydrogen evolution at the silicon–copper interface, due to thehydrogen scavenging action of the ascorbic acid [98].

The nucleation and growth followed a 3D island growthmechanism with nucleation of metal clusters and subsequentgrowth of a film. The initial displacement was characterizedby an extremely fast nucleation with a large number of nuclei.The 3D structure was found to be permeable to fluoride ions,resulting in long plating times and thick deposits. Fig. 8 is across-sectional scanning electron microscopy (SEM) image ofa copper film deposited by displacement on silicon (100) after30 min of immersion, corresponding to a thickness of 75 nm.

The copper films deposited on p-type Si(100) was found toexhibit a strong preferential orientation along the (111) plane,the close-packed plane for the face centered cubic structure,and a weak peak corresponding to the (100) plane, most likelyrelated to the influence of the substrate. Regarding adhesion,peeling of the deposited copper film was never observed,independently of the substrates (i.e., p- or n-type, single- orpoly-crystalline silicon) and film thickness, demonstrating ahigh degree of adhesion to the substrate and resistance toscratching.

As discussed extensively in Section 5.3, the coatingprocess is suitable to plate free-standing polycrystalline silicon

Fig. 9. (a) SEM image of MEMS structures coated with copper by galvanic displacement [97]; (b) close-up SEM (light regions are polycrystalline silicon and darkerregions are silicon nitride); (c) Cu EDS micrographs of the same region showing that only the polycrystalline silicon, and not silicon nitride, features are coated.


micromachined devices. Fig. 9 shows a MEMS structureconsisting of an interdigitated comb drive and a suspendedshuttle, coated with a conformal metallic Cu film with thicknessof about 25–30 nm. The selectivity of the deposition processis evidenced by the absence of copper on the silicon nitridemask.

The galvanic displacement of copper on H-terminatedSi(111) substrates has been studied also by Ye et al. [99].After the immersion of the silicon substrate in the HF solutioncontaining Cu+2, the amount of SiH species decreased, whilethose of the SiH2 and SiH3 species largely increased, abehaviour that was attributed to the increased density of stepsand kinks. The amount of copper deposited was much lessthan that in the ammonium fluoride solution containing thesame concentration of copper ions [99]. This was attributedto the competition between H2 evolution and Cu deposition,and the pH dependent anodic oxidation of Si and SiO2. Inanother study, the effect of the micro-roughness and kink-site densities of Si(100) and Si(111) on copper depositionwas investigated [100]. Under identical conditions, the copperdeposition rate was an order of magnitude lower on flatmonohydride terminated Si(100) than on microscopically roughH-terminated Si(100) surfaces. In deionized water withoutfluoride but containing copper ions, the difference in thedensities of dihydride sites on Si(111) and Si(100) wassuggested to be the cause of the difference in copper coverageduring metal reduction [100].

Zhong et al. studied the behavior of Cu immersiondeposition on a Cu substrate in a CuSO4–HF solution usinga Si wafer as anode. The results showed that the weightof Cu substrate increased with bath temperature and platingtime before reaching a constant value. The weight gain ofthe Cu substrate decreased with the distance between thetwo electrodes. The relationships of the plating time andthe weight gain of the Cu substrate revealed that Cu filmcoated on the Si wafer may prevent electron diffusion to thecathode [101]. Scheck et al. reported on the photoinducedelectrochemical deposition of Cu structures on p-type Sisubstrates by local illumination with a focused laser beamin an ammonium fluoride solution similar to that employedby Magagnin et al. [97]. The lateral dimensions of thestructures formed were found to decrease with reduced laserwavelengths or intensities but were independent of the durationof the illumination. The effect of spontaneous backgroundprecipitation on the Si surface was studied as a function of thesolution composition [102,103]. In the presence of additivessuch as ascorbic acid, but in the absence of NH4F, theyobserved Cu background plating as Cu oxide, while with theNH4F present in the solution, the background plated Cu was inthe metallic state.

4.3. Displacement of platinum group metals

Several properties shared among the platinum group metals(and some of their oxides as well) make them attractivefor technological and commercial applications. These includetheir exceptional catalytic activity, their high resistance to

wear, tarnish and chemical attack, and their stability at hightemperatures. A glance at Table 1 shows that these metalsare suitable for the immersion plating of semiconductors,and indeed, the galvanic displacement of Pt and Pd on Siand Ge has been observed [73,91,104–106]. In the case ofGe, deposition occurs even in the absence of fluorides orcomplexing agents [105], due to the solubility of GeO inaqueous environments.

The best studied case is the displacement of Pt on Si, usingeither Pt(II) or Pt(IV) salts. Gorostiza et al. investigated theearly stages of Pt(IV) galvanic displacement on Si(100) fromHF solutions. Nucleation of polycrystalline platinum silicideswas observed, along with the etching of the substrate surface.Etching was more substantial for p-doped than for n-dopedsamples; higher etching was observed to correlate with higheramounts of deposited Pt. A subsequent study aimed to clarifythe reaction mechanism of Pt(II) on Si in the presence offluorides [73]. The authors used a carefully electropolishedsilicon sample to minimize the density of surface defects. Theyexposed the polished side to a solution containing fluorideions and PtCl2− ions under OCP conditions, and observed tworeactions occurring simultaneously on the Si electrode surface.In the cathodic half cell reaction, Pt2+ ions were reduced tometallic Pt, while holes were injected into the Si valence band.In the anodic half cell reaction, silicon oxidation was promotedby the capture of the injected holes by Si atoms in the spacecharge layer near the sample surface, and the resulting siliconoxide was removed by the fluoride species. Because the holescan travel between injection and capture, cathodic and anodicreactions may occur at different regions of the surface. Hence,the formation of metallic nuclei and etch pits can be observedin different locations of the Si electrode surface. The extent ofthis etching is such that it leads to the formation of porous Si,accompanied most likely by the incorporation of hydrogen inthe electrode.

Galvanic displacement of palladium films on silicon hasreceived less attention compared to platinum. Most studiesemploy the displacement of palladium nuclei for subsequentelectroless metallization. Karmalkar et al. reported on thepalladium activation of silicon surfaces achieved using asolution of PdCl2 and NH4F in dilute HF. Palladium activationoccurred by a displacement plating reaction, which requiresa supply of holes; the authors found that the process wasmost effective on p+ substrates and least effective on n+

substrates. The activation layer showed poor adhesion to thesubstrate, even though a silicide layer was readily formed.This characteristic may make this process preferable overother activation methods in applications where a Schottky-typecontact is required [108].

Ye et al. proposed the deposition of high-purity Pd filmson silicon and germanium surfaces using the supercriticalfluid immersion deposition procedure. The deposition reactionsinvolved a precursor, HF, and a substrate (silicon orgermanium). The reducing agent was the substrate (Si or Ge)itself, and metal films were formed only on the substratesurfaces. This new metal film deposition process did not requirehydrogen gas and high temperature, and HF was introduced by


a HF-carrier. The palladium films were shown to be convertedto palladium silicide by annealing [106,107].

4.4. Galvanic displacement from fluoride-free solutions

4.4.1. Nickel on siliconNickel is an attractive metal due to its magnetic properties,

which are useful in a wide spectrum of applications includingmagnetic recording media and magnetic actuators. Thefabrication of arrays of magnetic nanodots using metals suchas Ni, Co, and Fe is expected to contribute to the realizationof ultrahigh-density ROM and RAM devices. It is also knownthat these metals can be converted to silicides by subsequentheat treatment. The deposition of Ni on silicon by simpleimmersion plating is a challenging subject from both basic andpractical points of view, due to its negative redox potential (seeTable 1) [109,110].

Takano et al. [111] and Niwa et al. [112,113] developedan electroless deposition process in aqueous alkaline solutionsfor Ni plating on Si surfaces. It was found that Ni couldbe deposited on a Si(100) wafer immersed in a pH-adjustedalkaline NiSO4 solution containing no reductants such assodium hypophosphite. This process was applied for theselective Ni deposition on patterned Si substrates. Thiswas followed by immersion in a hypophosphite-based bathfor further growth by autocatalytic deposition. The authorsproposed that the nucleation step proceeded by a galvanicdisplacement reaction in which Si was oxidized and Ni ionsin solution were reduced to Ni nuclei, with the process takingplace in an alkaline electrolyte without fluoride. In this regard,it must be noted that Si is normally etched in alkaline solutions,whereas the high pH inhibits hydrogen evolution, a processwhich would otherwise be more favourable than Ni2+ reductionbased on the standard potential table.

Gorostiza et al. studied the open-circuit potential depositionof nickel on silicon from fluoride solutions at pH 1.2, wherenickel ions are unable to exchange charge with the siliconsubstrate, and at pH 8.0, where nickel ions in solution canexchange electrons with both the conduction band and thevalence band of the silicon substrate. In high pH, depositionof nickel took place due to the coupling between the anodicdissolution of silicon in fluoride media and two competingcathodic reactions, namely, hydrogen evolution and nickeldeposition [114].

4.4.2. Noble metals on germaniumGalvanic displacement of metal ions from hydrofluoric acid

solutions onto semiconductors initially posed a formidablebarrier to electronics fabrication. Recent studies have proposedthe galvanic displacement process as a metallization method iscompetitive with state of the art physical and electrochemicaldeposition methods. While the majority of the studies has beencarried out on Si due to its technological dominance, galvanicdisplacements on Ge surfaces have also been examined.Although most deposition bath solutions contain hydrofluoricacid as a component, noble metal deposition on germanium hasbeen demonstrated in the absence of HF. The use of HF is not

necessary, due to the fact that germanium oxide is soluble inwater, in contrast to silicon oxide. Likewise, the addition of pHadjusters, complexing agents, or any other additives is foundnot to be necessary. Electroless deposition of noble metal filmson germanium substrates is accomplished via immersion of thenative oxide-capped wafer into aqueous solutions of AuCl−4 ,PdCl2−

4 , or PtCl2−

4 . The proposed process is able to providecontrol over the surface morphology and deposition rate bycareful modulation of such plating parameters as metal ionconcentration, temperature, and immersion time [105,115,116].

4.5. Galvanic displacement on III–V semiconductors

Compared to Si and Ge, relatively few studies have dealtwith galvanic displacement on III–V semiconductor substrates.To assess the possibility and reaction mechanisms of immersionplating on these substrates, the etching behavior of the groupIII–V compound must be carefully considered, taking intoaccount that the two components have different corrosionreactivities, and that the number of possible corrosion reactionsis very large [117]. Potential–pH Pourbaix diagrams arehelpful, although they are themselves quite complex. ThePourbaix diagram of GaAs in water, as shown in Fig. 10,well illustrates the point when compared to the much simplerdiagram for Si in water and fluoride shown in Fig. 3.

D’Asaro et al. have observed the nucleation of metallicPd on GaAs immersed in aqueous solutions of PdCl2 in thepresence of HCl, which solubilizes the salt by complexing itto PdCl2−

4 , HF and acetic acid. [66] Based on the Pourbaixdiagram, they propose that displacement may occur via thefollowing reactions:

PdCl2−

4 (aq) + 2e−= Pd(s) + 4Cl−

E0= 0.62VSHE

(10)

Ga3+(aq) + 3e−= Ga

E0= −0.54VSHE

(11)

HAsO2 + 3H++ 3e−

= As(s) + 2H2O

E0= 0.25VSHE

(12)

H3AsO4 + 5H++ 5e−

= As(s) + 4H2O

E0= 0.38 VSHE.

(13)

with the last three proceeding from right to left. Hence, theelectrons necessary to reduce the Pd ions can be supplied byeither Ga or As atoms on the substrate.

It should be noted that galvanic displacement on GaAsdoes not require the presence of HF in the plating bath, eventhough it is present in the aforementioned case. Fluorides arerequired neither by the reaction mechanism nor to dissolvethe substrate oxides. The oxides of GaAs are soluble inHCl, and indeed, the earliest work on GaAs metallization bygalvanic displacement used a plating bath comprised only ofan aqueous solution of tetrachloroauric acid (Ref. [118], morereadily accessible in the West through the account providedin Ref. [119]). With the same bath, Donzelli et al. were able


Fig. 10. Potential–pH diagrams for the GaAs–H2O system at 24 ◦C. Reprinted with permission from Ref. [117].c© 1979, Elsevier.

to deposit selectively Au films on photoresist-patterned GaAsand to characterize the resulting Shottcky diodes, and in thismanner the obtained information about the dissolution rate ofthe substrate during plating (e.g., 1.3 nm/s in a 2 g/l aqueoussolution of tetrachloroauric acid at 24 ◦C). Since this earlywork, galvanic displacement has been employed to deposit Au,Pd, Pt and Ru on various III–V substrates, including GaAs,AlxGa1−xAs, GaP, and InP [66,120,121].

4.6. Galvanic displacement on barrier layers

Although not semiconducting, barrier layers play animportant role in semiconductor technology and in deviceelectroplating applications. Thus, it is not surprising thatgalvanic displacement processes on barrier layers have beenthe focus of some research efforts, and it seems fitting toreview briefly the subject at this point. The main function ofthe diffusion barrier is to prevent interdiffusion and to improvethe adhesion between layers. Nitride barrier materials, such asTiN and TaN, but also pure Ta, are used to avoid the thermaldiffusion of Cu into dielectric SiO2 in microelectronic devices.TiN has been used as a barrier material because of its highrigidity, the high melting point of ∼2930 ◦C, its good thermaland electrical conductivity, high thermal stability, and ease ofmanufacturing. The properties of TaN approach those of TiN.Usually, copper interconnects are electrochemically depositedon top of a thin copper layer, which is deposited by the vapourphase deposition method on the barrier layer. In order to avoidthe vapour phase step, a thin metallic layer may be depositedthrough a galvanic displacement process [122–124].

The displacement reaction between the nitride barrierlayer/Si substrate and metal ions has been reported. Dubinet al. reported that Cu deposition occurs as a result of thedisplacement reaction with the TiN/Si [125]. Fung et al. alsoreported such deposition due to the displacement reactionbetween Cu+2 and the underlying Si with cracks in theintermediate TiN film [126]. Unpublished results from our

Fig. 11. Copper film deposited on TiN/Si(100) substrate from ammoniumfluoride (NH4F 40%) 50% vol., copper sulfate (CuSO4·5H2O) 0.01M, ascorbicacid (C6H8O6) 0.01M, sodium potassium tartrate (KNaC4H4O6·4H2O)

0.005M, and methanol 30% vol., after 60 min deposition at room temperature.

group about copper displacement from an ammonium fluorideand copper ions solution confirm the possibility of metaldeposition as a consequence of solution interaction with thesilicon underneath, leading to a three dimensional growth ofthe Cu film with poor adhesion, as shown in Fig. 11.

O’Kelly proposed that a Cu layer could be obtained after apretreatment of TiN surface with Pd, which had been depositedvia a displacement reaction [127]. Wu et al. proposed adisplacement reaction of TiN according to the following overallmechanism

4TiN + 12HF−

2 → 4TiF2−

6 + 4NH3 + 4e− (14)

with simultaneous palladium ions reduction and deposition, andhydrogen evolution [128]. Cesiulis et al. proposed a similarmechanism for silver displacement on TiN from silver nitratebaths [129]:

TiN + 4Ag++ 6F−

→ 4Ag + TiF2−

6 + 1/2N2. (15)


Wang et al. demonstrated that continuous Cu films can bedeposited on Ta by a two-step process, namely the galvanicdisplacement of Ta by Cu from ammonium fluoride solutionsand subsequent electroless Cu deposition from a formaldehyde-containing bath [130].

4.7. Semiconductor–metal interface

Deposition of metals on semiconductors is an importantand ubiquitous process in the electronic industry. Whendeposited by electrochemical methods, metallic films tendto grow by a three-dimensional island growth mechanism.On semiconductor surfaces, the process involves conductionand valence bands and surface states. Lower surface electrondensity and lower rate of charge transfer in semiconductorsrelative to metals often entail problems in obtaining good filmstructure and substrate adhesion. Good adhesion is a necessaryrequirement for good thermal and electrical contacts. Thenature of chemical bonding in metals is quite different fromthe strong covalent bonding prevalent in semiconductors, andhence, it is often difficult to obtain a robust semiconductor-metal interface. Indeed, regardless of the deposition methodused, the adhesion of metallic films to semiconductors isusually poor, especially for noble metals. Thus, the expensiveextra processing steps of interposing adhesion or seed layers inhigh vacuums are often required.

There are multiple factors influencing the adhesion of thedeposited film to the substrate. Properties such as the density ofnucleation sites, chemical bonding between film and substrate(including, e.g., the existence of stable “intermetallics”),presence of an intervening layer (e.g., oxide layer), gasevolution during deposition (leading to formation of voids), andfilm morphology (including density and grain structure of thedeposit) can all affect the mechanical (and electrical) quality ofthe interface.

As a specific example, consider a gold film on thesilicon surface. Based on the rather general argument ofincompatibility between the metallic bonding in the film and thecovalent bonding in the substrate, poor interfacial adhesion isexpected, and is indeed found experimentally [86]. This entailspoor mechanical and electrical properties. Thermal treatmentis found to sometimes improve the quality of the interface,perhaps by promoting the intermixing with the formation ofsilicides. But Si and Au do not form stable or even metastablebulk silicides at any temperature, and hence, thermal treatmentonly speeds up the dewetting of the Au film on the Si surface.Poor adhesion is accompanied by the enhanced oxidationof the Au–Si interface. Ferralis et al. have used ultrahighvacuum techniques of low energy electron diffraction andAuger electron spectroscopy to study this interface for Audeposited by galvanic displacement [131]. Thermal annealingis found to remove the interfacial oxides and produce filmsindistinguishable from those evaporated in situ. Furthermore,annealing is shown to produce a stable monolayer of silicide.However, unlike the case of the Au–Ge interface discussed inSection 4.2, this silicide layer does not promote film adhesion.

This is most likely due to the fact that Au (or, during annealing,the Au–Si eutectic alloy) does not wet the silicide monolayer.

Quantitative methods for evaluating the strength of themetal–semiconductor interface have been developed to improveupon the quick and commonly employed, but qualitative,ScotchTMtape test. One difficulty encountered in measuringadhesion of immersion plated films is that the metals aregenerally softer than the substrate. (This is certainly the casefor noble metals, although it need not be for Pt-group metals).Magagnin et al. [132] demonstrated the use of microhardnessmeasurements in conjunction with a composite hardnessmodel [133], for the adhesion evaluation of soft films, such asnoble metals, galvanically deposited on hard substrates such asSi or Ge.

Qualitatively, stronger adhesion corresponds to highercomposite Vickers microhardness and produces a moreextended deformation zone at the film substrate interface [132,133]. Quantitatively, one plots the difference between thehardness of the substrate and that of the (softer) substrate-film composite against the ratio of film thickness over theindentation diagonal. For soft films on hard substrates, oneexpects an approximately straight line [134], whose slope yieldsthe desired quantitative measure of adhesion. In particular, theinverse slope is proportional to the so-called critical reduceddepth (i.e., the ratio between the radius of the plastic zonebeneath the indentation and the indentation depth), for whichlarger values denote better adhesion. (The linear relation breaksdown at high loads or at very small indentation depths, wherethe measured hardness is dominated by pure substrate or purefilm effects, respectively.)

The results of our microhardness tests are shown inFig. 12(a) for Au films deposited by displacement on Si andGe. The much higher value of the critical reduced depth,b, obtained for Ge is consistent with the finding of a goodchemical bonding at the Ge–Au interface, as discussed inSection 4.2. Fig. 12(b) shows the results of similar testsperformed on immersion plated copper films deposited onSi(100) from fluoride containing solutions, with or withoutadhesion-promoting additives [132]. The highest indicator ofadhesion of the metallic film to the substrate is obtained whenascorbic acid is added to the solution. As already discussed inSection 4.2, this additive prevents hydrogen evolution owingto its hydrogen scavenging action, which in turn is likely toproduce a more compact Cu film and a void-free interface.Furthermore, the well known strong antioxidant properties ofascorbic acid may result in an interface of higher quality.Antioxidant action alone does not promote the best adhesion;however, as evidenced by the lower b value obtained withbaths containing antioxidant sulphites as the only additive withrespect to baths containing ascorbic acid.

Other studies of the metal–semiconductor interface havegenerally reported results that are consistent with expectationsbased on considerations of compatibility between the chemicalbonding model and of the equilibrium phase diagram of thesystem. D’Asaro et al. examined the displacement of Pd ona variety of substrates as a means of promoting adhesion ofsubsequent electroless Au [66]. They observed a high density


Fig. 12. Hardness difference vs. ratio between the film thickness and theindentation diagonal for copper films from basic, sulphite and ascorbicsolutions after plating for 30 min and gold films from 1 mM gold bath onSi(100). The critical reduced depth b for each system is reported in Ref. [132].Reprinted with permission from Ref. [132].c© 2003, Elsevier.

of Pd nucleation sites on GaAs. The good adhesion of theelectroless film to this substrate was attributed in part to thelarge number of anchoring points, and in part to the stronginteraction between Pd and GaAs (contributing to make eachanchor strong). In contrast, they pointed out how the muchsmaller density of nucleation sites obtained on Si, coupledwith the much weaker interaction between the two mutuallyinsoluble elements, produced poorly anchored films. Based onthe argument of mutual solubility, they also ruled out goodadhesion between Au and Si, while they pointed out thatbetter adhesion may be expected for Au on GaAs. Accordingto Donzelli et al., immersion plating Au on GaAs producesinterfaces of high electrical quality, comparable to those formedwith evaporated Al, although mechanically they are not stableenough to prevent liftoff by ultrasonication [119].

5. Applications to microstructures and devices

5.1. General

Processes that use copper metallization in the production ofintegrated circuits have been studied to achieve the deposition

of conformal metallic thin films with low resistivity and highelectromigration resistance [92]. Electrochemical processesat the core of these IC technologies have been extensivelyinvestigated. Electroforming offers unique properties, such asthe excellent filling of high aspect ratio structures, low stressfilms, and low temperature and cost-effective processes [135].Electroless forming is demonstrated to be an alternativedeposition method to galvanic forming and to be compatiblewith silicon technology [136–138]. The forming of nickelby autocatalytic deposition onto high aspect ratio metallicstructures has been proposed and studied as a function ofthe temperature, reaction kinetics and different geometricproportions of test structures. It is found that the formation ofgas blankets attached to the walls locally hinders the depositionand hence, ultrasonic agitation is needed [136].

The metallization of silicon micromechanical structures andmicroelectromechanical systems (MEMS) remains a relativelyunexplored subject [139–141]. Copper deposition by electro-chemical contact displacement into microtrenches filled withamorphous silicon is investigated as an alternative to electro-plating [142]. Electroless deposition of nickel and cobalt alloysis used for the selective metallization of the uppermost surfaceof silicon beams [141]. In this chapter, we review applicationsof galvanic displacement methods to coat and functionalize sil-icon MEMS devices as well as silicon AFM microcantilevers.Metallization of silicon micromechanical structures and devicesentails design and processing issues beyond those of concernin IC technology. Mechanical functions are performed by mi-cromechanical devices, thus subjecting the metal films to me-chanical stresses, fatigue and wear.

Technologies for metal integration in MEMS must considerthat these devices are intrinsically non-planar. A high degreeof conformality is therefore required. Galvanic displacementmethods not only minimize the stress typically found inmetal films formed on silicon by physical deposition methods,they also balance the forces by metal coverage on all sidesof the free-standing silicon structures owing to their highlyconformal nature. Furthermore, their deposition can be tunedto produce homogeneous, smooth and reflective coatings withgood substrate adhesion. Lastly, metallic films provide ahighly stable coupling layer for subsequent microstructurefunctionalization via self-assembly, for example, of thiol-basedmonolayers. Ordered and stable alkanethiol films form on goldas well as on copper and copper oxide [143–146], and are ableto provide some protection against oxidation [147].

5.2. Process requirements for free-standing microstructures

There are several issues of concern in immersion plating ofmicrostructures (such as MEMS), namely the uniformity andconformality of the coating process, the surface energy of thecopper films, and the film–substrate adhesion. The last issue hasbeen addressed elsewhere. To highlight the importance of theother issues, the deposition process may be evaluated in termsof diffusion to a plate underneath the floating structures. Let usconsider a typical MEMS structure, such as a cantilever beam,suspended a distance h above the ground plane. A rectangular


shape of sides a and b, with b < a, is assumed. (Practicalvalues may be h ≈ 1 µm, b ≈ 5–20 µm, a ≈ 50–1000 µm.)The concentration, ρ, of the coating species in the liquid phase(i.e., the metal ion) is usually in the range 1–10 mM. Neglectingfor the moment diffusion processes, to coat an area equal to2ab, a number of molecules equal to Nc = ρabh is presentin the volume of fluid trapped between the ground plane andthe underside of the beam. If we consider the typical values ofh and ρ, this translates into roughly 1014–1015 mol/cm2, i.e., acoating thickness of about one monolayer. Thus, the single mostimportant limiting factor for coatings thicker than a monolayeris diffusion in the liquid phase. Let us now take diffusion intoaccount. Simple dimensional analysis indicates that the numberof atoms (per unit area) available to form a coating film mustscale as N = ρh Dt/b2, where D is the diffusion coefficientand t the coating time. With ρh a fraction of a monolayer,times of the order of an hour are required to achieve a coatingthickness of a few tens of nanometers on the underside of amicrostructure. These considerations have serious implicationsfor the metallization of MEMS by immersion plating.

5.3. Copper forming by galvanic displacement on siliconmicrostructures

Carraro et al. [148] showed that the introduction of suitableadditives into the plating bath can overcome diffusion-relatedproblems, thereby allowing the formation of very conformalcopper coatings on silicon microdevices. Furthermore, theytailored the surface properties of the copper films with organicself assembled monolayer coatings in order to reduce adhesionof MEMS devices during operation.

Microfabricated cantilever beam arrays were used to assessthe extent to which the plating process was able to coatsuspended high aspect ratio structures conformally. Galvanicdeposition was carried out for 30 min. Optical observationsafter peeling the beams away with adhesive tape confirmedcopper film forming both on top and underneath the beams,as well as on the ground plane. Fig. 13 (top) shows a SEMmicrograph of the cross section of a beam after plating.Copper has coated the whole structure, forming an adherentand homogeneous film with a thickness in the range of 100nm. The concentration line profiles reported in Fig. 13 (bottom)for copper and silicon confirm the copper deposition on theground plane and the coating of the whole beam. The copperconcentration line profile along the cross section shows threepeaks in correspondence with the ground plane, the undersideand the uppermost sides of the beam, respectively. Conformalcopper coating was achieved if two ingredients were presentin the plating bath. One is methanol, which promotes thewettability of the hydrophobic surface after release in HFand during plating in the presence of either HF or NH4F.The presence of a surfactant with levelling action, such asPEG, permits the immersion plating for sufficiently long timeswithout the onset of inhomogeneous or dendritic growth.

The copper films deposited by displacement on siliconmicrostructures were also used as seed layer for subsequentENIG metallization after selective palladium activation.

Fig. 13. (top) SEM micrograph of a polysilicon cantilever beam (shownschematically in the inset) following 30 min selective copper plating; (bottom)copper and silicon concentration line profiles along the line indicated in theabove micrograph.

Electroless nickel was deposited for 30 min, corresponding to athickness of a few micrometers. The autocatalytic depositionof nickel was conformal to the MEMS geometry. Hydrogenevolution was minimized to avoid bubble segregation or thebreaking of the suspended silicon structures. The process wasthen followed by immersion gold plating for 15 min, leadingto homogenous gold film of about 0.1–0.2 µm thickness ontothe electroless nickel layer. The optical image in Fig. 14 showsa comb drive structure after ENIG deposition. Electrolessforming can be considered a viable metallization process ofsilicon microdevices, particularly if it is coupled with galvanicdisplacement processes to form adherent and conformal seedlayer films onto the silicon substrate.

5.4. Functionalization of galvanically deposited films and theirwork of adhesion

Functionalization schemes are readily available for manyof the noble metals listed in Table 1, and can be usedto render the surfaces hydrophobic in order to avoid themicrostructure adhesion caused by capillary forces. As anexample, alkanethiol self assembled monolayer passivationhas been applied to microfabricated polysilicon adhesiontest structures following copper plating [148]. Hydrophobizedcopper plated structures possess extremely low adhesion since


Fig. 14. Polycrystalline silicon comb drive after copper plating fromammonium fluoride solution [97] and ENIG metallization.

they are hydrophobic, very rough, and not susceptible tocharge build-up. The apparent work of adhesion of the film isevaluated by testing the cantilever beam arrays (CBAs). Beamsare actuated and then the actuation force is removed. Beamsshorter than a characteristic length are sufficiently stiff to freethemselves completely from the substrate. Beams longer thanthis characteristic length remain adhered to the surface. Thedetachment length, ld, is measured as the beam length at whichthe beams exhibit a transition from adhered to free standing.Adhesion of the beams to the substrate at the transition regionis confined at their tips. The work of adhesion, W , between thetwo surfaces can be calculated by balancing the elastic energystored within the beam and the beam-substrate interfacialenergy. The following equation can be used [149]:

W =38

Eh2t3

`4d

, (16)

where E is Young’s modulus (170 GPa for polysilicon), his the spacing between the beam and the substrate, and t isthe thickness of the polysilicon beams. Eq. (16) is applicablefor a homogeneous beam, and therefore it should be usedif the thickness of the plated film is small compared to thethickness of the polysilicon beam, a condition that is met inthe aforementioned experiments.

Fig. 15 shows a picture of a typical CBA after copper plating(20 min) and dodecanethiol coating, as seen under differentialcontrast microscopy after several actuation cycles, and uponremoval of the bias voltage. Adhesion to the substrate of theninth beam from top is observed at a length of about 500 µm.All the other beams in the picture are free standing. An averagedetachment length of about 1100 µm, or a work of adhesion ofabout 3 µJm−2, was obtained after measurements on severaldifferent arrays. For comparison, a detachment length ofabout 750 µm was obtained with the same test structures,following the state-of-the-art octadecyltrichlorosilane coatingprocess [150]. Considering the similar chemical termination ofthe surfaces, the lower work of adhesion of the dodecanethiol-coated copper surfaces was attributed to the increased surfaceroughness. A study performed with a copper coated AFM tipconfirms this interpretation (vide infra).

Fig. 15. Differential interference contrast optical micrographs, after severalactuation cycles, of a polycrystalline Si cantilever beam array that is copperplated and dodecanethiol coated. Brightness indicates downward curvature.The shortest beam (top) is 150 µm long, and the longest (bottom) is 900 µm.Reprinted with permission from Ref. [148].c© 2002, Elsevier.

5.5. Galvanic displacement on AFM microcantilevers

The functionalization of scanning microprobes by self-assembled monolayers (SAMs) of alkanethiol compounds ongold-coated surfaces and of silanes on silicon is widelyemployed [151–159], and is useful to probe the effects ofchemistry on the tribological properties of surfaces. Becausethiol attachment chemistry is generally cleaner and easier toimplement than silanization, the coating of cantilevers witha noble metal is a particularly useful process. Conventionalvapour deposition techniques for metals are not conformal,require a high vacuum apparatus and the deposition of adhesionpromoters such as chromium or seed layers. Furthermore, thethermal expansion mismatch between the metallic coating andthe cantilever (which is usually made of silicon) may inducebending of the microprobes.

A galvanic displacement technique was used by Fritz et al.to coat silicon scanning force microscopy cantilevers with acopper film [160]. The plating solution contained ascorbic acid,sodium potassium tartrate, methanol and ammonium fluoride,in addition to copper sulphate. An atomic force microscopewas then used to perform adhesion measurements in a liquidenvironment, using copper-coated cantilevers, which wereeither cleaned and oxidized by a UV–ozone (UVO) treatmentor coated with a dodecanethiol (DDT) SAM. The substrateswere copper-coated single crystalline Si chips, which werealso either treated by UVO or coated with a DDT monolayer.Force–distance curves were obtained in water, methanol andethanol. The authors reported adhesion values of 0.33±0.10 nNin water, 0.023 ± 0.005 nN in methanol, and 0.008 ± 0.004 nNin ethanol between the UVO cleaned copper tip and sample.After coating the same sample and the tip with the thiol SAM,the adhesion forces became 1.34±0.66, 0.11±0.08 and 0.06±

0.02 nN in the three liquid media, respectively. The results werequalitatively consistent with the expectation of a lower adhesionforce between hydrophilic surfaces than between hydrophobic(methyl-terminated SAMs) surfaces in water. Quantitatively,the observed ratio between the measured adhesion forces inwater and ethanol for the hydrophobic interaction, equal to


Fig. 16. (a) Scanning electron micrograph of a silicon scanning force microscopy cantilever. (b) Close-up of the tip after immersion plating in the aqueous coppersolution for 3 min. Reprinted with permission from Ref. [160].c© 2004, Springer.

about 22, was noted to be in very good agreement with theexpected value of about 25 [161,162].

Contact mechanics theory, in particular, the Johnson,Kendall and Roberts (JKR) approach [163], which is a goodmodel for tip–copper contacts, was employed to derive the(combined) radius of curvature of the copper contacts. Notethat this need not be the same as the radius of curvature ofthe tip, since the film possesses a nontrivial, possibly fractal,structure. JKR theory predicts a force F = −1.5πW R, withR being the radius and W the work of adhesion. Knowingthe work of adhesion (88.4 mJ/m2) [162] and the adhesionforce (1.34 nN) between methyl-terminated alkanethiol filmsin water, Fritz et al. estimated the radius of the contacting probeto be about 3 nm, which is far smaller than the radius of 200 nmobtained from scanning electron micrograph of the coated tip.This difference was attributed to the presence of a nanometersized asperity on the otherwise broad tip (Fig. 16).

5.6. Copper displacement for interconnects

Galvanic displacement of copper in fluoride solution wasemployed by Lee et al. to produce copper trenches on atantalum barrier layer. An amorphous silicon layer was firstdeposited in the trenches, followed by chemical mechanicalpolishing to remove the Si from outside the trenches. Thesilicon remaining in the trenches was then displaced by copper.This selective copper metallization method was evaluatedas promising for overcoming the obstacles in the currentdamascene process, such as the limitations due to high aspectratio trenches for copper interconnects [142].

Copper trenches can be selectively plated through a galvanicdisplacement process by using a thermal oxide mask. A siliconwafer with a 1000 A thick wet thermal oxide on top andgrooves cut into the sample with a diamond dicing saw wascopper plated by galvanic displacement. The grooves wereabout 80 µm wide, spaced about 150 µm apart, and 20 µm deep.Thermal oxide masking was used as a template for the selectiveforming and gap-filling of copper. Galvanic displacement in anammonium fluoride solution was carried out up to two hourswithout dissolving completely the oxide mask (the etching rateof wet thermal oxide in concentrated hydrofluoric acid is about2 µm/min, and in diluted 10:1 hydrofluoric acid, it is about230 A/min). Fig. 17(a) and (b) show the side view of the sample

Fig. 17. Silicon wafer with a 1000 A thick wet thermal oxide mask (a) beforecopper plating and (b) after plating for two hours (side view); (c) top view ofthe sample in Fig. 17(b).

before and after 2 h of copper plating respectively. The fillingof the grooves was better revealed by the top view of the samplein Fig. 17(c).


6. Applications in nanoscale science and devices

6.1. General

The properties of matter confined to zero dimensions, i.e.,assembled into structures termed quite interchangeably asclusters, dots, nanoparticles, and nanograins, have been thesubject of intense research efforts for three decades. Metalsare particularly interesting for the unusual optical and chemicalbehavior they display in the form of nanoclusters. For instance,the high catalytic activity of gold clusters has been welldocumented, and is in stark contrast to the inertness of the bulkmetal. Moreover, silver, gold, and to a lesser extent, most othermetal clusters possess strong plasmon resonances that impartthem with novel optical properties. These properties in turnallow the use of nanoclusters as optical reporters and enablea class of ultrasensitive spectroscopies for single moleculedetection. In short, the synthesis of metallic clusters of highpurity and with precise size and location control is an importantsubject in nanotechnology research.

Galvanic displacement processes offer many attractive char-acteristics for nanocluster synthesis when the cluster is requiredto reside on a surface. Indeed, the metals thus deposited are ofhigh purity, and there is no need for the complexing agents thatare required to stabilize metallic clusters in colloidal solutions.The process is substrate selective, and this fact enables noveland powerful nanolithographic processes for the integration andlocalization of metallic [89,105] and semiconducting [164,165]nanostructures. In contrast, nanoclusters produced by reductionin solution to form colloidal suspensions are normally blanket-deposited without any intrinsic substrate selectivity.

Although most of the work on galvanic displacement onsemiconductor substrates deals with studying and improvingproperties of galvanically deposited thin films, deposition ofclusters by this technique is gaining significant attention be-cause of the marked advantages that it presents over alternativemethods. Several important studies concern themselves with theshape and properties of nanoclusters obtained at short depo-sition times, i.e., at the initial stages of film nucleation; thesestudies are reviewed in the next section. We shall then review aspecific technique, which employs galvanic displacement depo-sition from microemulsions [166], and is designed to produceclusters of controlled-size distribution and surface coverage.A separate section is devoted to the growth of semiconductornanowires from catalyst seeds deposited by galvanic displace-ment. This technique is rapidly gaining favour, because it is aninexpensive and very clean way of depositing noble metal cat-alysts, selectively and with tight size control. It also holds thepromise of enabling the heterogeneous integration of electroni-cally relevant materials, since it applies to a variety of semicon-ductor substrates. Finally, we review the growth of more com-plex nanostructures.

6.2. Nucleation of metallic clusters

Galvanic displacement processes have been used to createseed layers for the subsequent deposition of metallic films

by an electroless reaction. These seed layers often consist ofclusters of a catalyst metal such as Pd. Thus, the formationof nuclei during galvanic displacement has attracted attentionin early studies of film deposition, because the nucleationprocess is crucial in determining the quality of the finalmetal film-substrate interface. D’Asaro et al. [66] studied thenucleation of Pd clusters on III–V semiconductors such asGaAs, AlxGa1−xAs, GaP, and InP, as well as on Si and Ge.The clusters form upon immersion of the substrate in anacidified solution of PdCl2, whereby Pd2+ ions are reduced tometallic Pd by galvanic displacement at nucleation sites on thesemiconductor substrate. Subsequent plating in an electrolessgold bath containing a reducing agent, such as potassiumborohydride, results in films that display excellent adhesion onthe III–V substrates, but not on Si or Ge. Transmission electronmicroscopy has been employed to examine the interfacebetween the Pd clusters and GaAs or Si substrates, revealingremarkably different morphologies and distributions of clustersfor the two cases. On GaAs, a uniform and dense distribution ofPd nanoclusters is obtained, indicating that nucleation is highlyfavoured on this substrate. In contrast, nucleation occurs at amuch smaller number of cathodic sites on Si substrate, followedby the growth of these few sparse nuclei into large sphericalparticles. Thus, nucleation occurs preferentially on the alreadyexisting palladium clusters rather than directly on the substrate,which signals a weak interaction between metal atoms and thesemiconductor surface. The weakness of the interface betweenelectroless Au film and Si (or Ge) is then attributed to thescarcity and weak bonding of the catalyst Pd nuclei on bothsubstrates, whereas on III–V substrates, the nuclei provide astrong anchor for the electroless Au film.

The formation of Au nuclei during the initial stagesof thin film deposition on both Si(111) and Ge(111) hasbeen characterized by Magagnin et al. [86] using atomicforce microscopy and X-ray photoelectron spectroscopy. Thesamples were prepared by immersion plating in 0.1 mMKAuCl4 and 5 M HF aqueous solutions. Fig. 18(a) and (b) showtapping mode AFM images of the pristine Si(100) and Ge(100)samples, respectively, after etching in HF. The surfaces are flat,with root-mean-square (rms) roughnesses of 0.08 and 0.24 nm,respectively. After immersion in the plating solution for thespecified times, the samples were imaged in air. Fig. 18(c) (Si)and (d) (Ge) show images taken after a 5 s deposition. Smallclusters in the range of 10–30 nm are formed on both surfaceswith fairly uniform distributions. The cluster density increaseswith time for both substrates (Fig. 18(e) and (f)) after depositionfor 60 s. The Si surface is covered more rapidly, as would beexpected of the less noble substrate. It is somewhat surprisingthat at these very early stages, the difference in Au coverageis accounted for, primarily, by a higher number of nucleationsites, rather than by the larger size of the individual nuclei.Thus, the formation of gold films on Si proceeds from clustersdistributed uniformly all over the active surface. However,following the completion of a first layer of nuclei at the Sisurface, growth proceeds with the formation of overlayers oflarge isolated structures, as evidenced in Fig. 18(g) after 10min deposition. The surface rms roughness is about 18 nm.


Fig. 18. Atomic force micrographs of clean (a) Si(111) and (b) Ge(111) surfaces, and these surfaces taken after immersion plating in 0.1 mM Au, 5 M HF aqueousbath for 5 s (c, d), 1 min (e, f) and 10 min (g, h). Scan area of 1 × 1 µm2. The rms roughness values of the various surfaces are (a) 0.08 nm, (b) 0.24 nm, (c) 0.84nm, (d) 0.96 nm, (e) 1.7 nm, (f) 1.8 nm, (g) 19 nm and (h) 1.9 nm. Reprinted with permission from Ref. [86].c© 2002, American Chemical Society.

In contrast, Fig. 18(h) shows the formation of much smootheroverlayers on Ge substrates following the cluster island growthmode of the first layer, with the rms roughness remainingaround 2 nm after 10 min plating. At this stage of growth,a resemblance is noted with the previous work [66] on Pdnucleation on Si vs. GaAs, and therefore the different interfacestrengths of the fully formed films may be attributed to thedifferences in the number and morphology of the anchoringclusters. As already discussed in Section 4.2, the difference

in chemical bonding between the Si–Au and Ge–Au system isresponsible for the difference in interfacial strength of the twosystems.

Motivated by the quest for high-density memory, Osaka et al.used galvanic displacement to deposit Ni particles on Si [167].Because the standard electrode potential of Ni (−0.26 V) islower than that of H, deposition of Ni requires an alkaline bath(pH = 8). The displacement reaction is effected in the absenceof fluoride ions, and hence, a thick oxide layer is present at the


Ni nanodot–Si interface, as revealed by transmission electronmicroscopy. Subsequent to the nucleation of the metallic Nidots, the substrate is transferred to an electroless NiP bath tocomplete the nanodots’ growth. The authors show that nanodotarrays can be fabricated simply by patterning an oxide film onthe Si substrate. This selectivity to elemental Si regions of thesubstrate is due to the fact that the initial nucleation step is agalvanic displacement process.

The kinetics of Au nucleation on Si(111) from aqueoussolutions of KAu(CN)2 and HF has been studied by secondharmonic generation, extinction spectroscopy and atomic forcemicroscopy [168]. By correlating the SHG signal with clustersize, the authors were able to measure the Au clustergrowth rate in situ. This in turn was used to determine theorder of the displacement reaction with respect to [HF] and[Au(CN)−2 ], yielding values of 1

2 and zero, respectively. Thelatter value indicates an excess of available Au ions, but theAu concentration could only be varied within a fairly restrictedrange, due to the weakness of the SHG signal at one end, andparticle coalescence at the other.

6.3. Galvanic displacement from microemulsions

Applications to catalysis, plasmonics and electronics oftenrequire a greater degree of control in cluster size distributionthan is encountered in metallic dots formed in the earlystage of film nucleation. A novel method was devised byMagagnin et al. [166] to tighten the size distribution ofnanoparticles deposited by galvanic displacement, based onimmersion plating in reversed micellar solutions of the platingbath. A reversed micellar solution is a dispersion of nanometer-sized water drops in oil, which are stabilized by the presenceof a surfactant. Much work has been devoted to the theoryand application of micellar solutions [169,170]. A particularlywell studied system is that of water, sodium bis(2-ethylhexyl)sulfosuccinate (AOT) as the surfactant, and an n-alkane asthe oil. The size of the micelle in these systems is known tobe a function of the microemulsion parameter R, defined asthe ratio of the molar concentrations of water and surfactant(R = [water]/[surfactant]). For instance, for reversed watermicelles in n−heptane, the concentrations of water and AOTand the radius of the micelles follow the linear relation

Rmicelle = 0.175R + 1.5, (17)

where the micelle radius Rmicelle is measured in nanometers.The conventional approach to obtaining metal clusters in

solution is based on the mixing and reacting of two differentmicellar solutions, e.g., one (A) carrying a metal salt andthe other (B) carrying a reducing agent [171]. Nanoclusterformation ensues upon the collision of micelles of the A and Btypes, with material exchange between them and the subsequentreduction of the metal ions in A by the reducing agent of B. Thisnonselective electroless process would lead to blanket clusterdeposition upon substrate immersion. In contrast, the methodbased on galvanic displacement from micellar solutions allowssize and location control of the Au nanoclusters deposited onSi surfaces. In this process, only one type of solution is present

Fig. 19. Schematic of immersion plating from an inverted micelle solution. Thecontinuous medium is oil. The surfactant molecules expose their hydrophobictails to the oil to solubilize the water droplets, which are in contact with thehydrophilic moiety of the surfactants. The size of a micelle is determined by theratio of the molar concentrations of water to surfactant. Metal salt and fluorideions, dissolved in water, are contained inside the micelles and are released uponthe micelle–substrate impact. The metal ion is reduced by the substrate atoms,leaving behind a small metallic cluster.

(solution A), which may contain a fluoride species in additionto the metal salt. The solution is stable, with the metal inits oxidized state; however, when a micelle impinges on thesemiconductor substrate, it delivers a droplet of plating bathof controlled volume. The solution reacts with the substrateand the metal ions are reduced by the galvanic displacementmechanism (Fig. 19).

The average size of the deposited Au clusters was probedby X-ray diffraction in Ref. [166], as the width of the Au(111)diffraction peak is related to Au crystallite size through Scherr’slaw. The authors probed the microemulsion parameters R =

1, 50 and 100, and showed that cluster size is determined byR, and not by deposition time. Longer immersion times in theplating microemulsion resulted in higher intensity of the XRDpeak, but the peak width depended only on R. In other words,plating time only affected cluster density, but not cluster size.

Gao et al. used galvanic displacement from microemulsionsto deposit catalyst nanoparticle seeds for the subsequentgrowth of Si nanowires (vide infra), and probed a largerset of microemulsion parameter values [164]. They usedfield emission scanning electron microscopy (Fig. 20) tocharacterize the Au clusters deposited on Si(111) substratesfrom microemulsions with R values of 16 (a), 25 (b), 50(c), 100 (d), and 200 (e) respectively. They observed that thesize of the Au clusters appears to be fairly uniform on eachsample. They extracted the Au cluster diameter as a functionof R (see Fig. 21). The mean diameter of the Au clustersincreases roughly from about 20 to 140 nm as R increasesfrom 16 to 200, and these measurements are in agreement withthe radii previously reported by Magagnin et al. [166]. It isworth noting that when the galvanic displacement process isperformed in a water-based solution instead of microemulsions(i.e., without AOT or heptane), the size of the Au clustershas a wide distribution from 30 to 300 nm, and substantialcluster agglomeration is observed (Fig. 20(f)). Thus, the authorsconcluded that the microemulsions are effective in reducing theaggregation of nanoparticles during the galvanic displacementprocess, and enable the tuning of the Au nanodots size by tuningthe microemulsion parameter R.


Fig. 20. Scanning electron micrograph of Au clusters deposited on Si(100) substrates by immersion plating from microemulsion solutions with R values of 16 (a),25 (b), 50 (c), 100 (d), and 200 (e). For comparison, (f) shows the metal deposit obtained by immersion plating from an aqueous solution. Reprinted with permissionfrom Ref. [164].c© 2005, American Chemical Society.

Fig. 21. Average cluster diameters obtained from the analysis of the scanningelectron micrographs of Au clusters deposited on Si(100) by galvanicdisplacement from microemulsions with various R values. Reprinted withpermission from Ref. [164].c© 2005, American Chemical Society.

6.4. Nanowire growth from metal catalysts deposited bygalvanic displacement

Semiconductor nanowires are quasi-one dimensional struc-tures with interesting physical, optical and mechanical prop-erties, which make them good candidates for advanced

applications such as interconnects and functional units in elec-tronic, optoelectronic, electrochemical, and electromechanicaldevices. Although proofs of concept have been given of vari-ous nanowire-based devices for sensing, electron and ion gat-ing, and lasing, researchers face serious challenges in the syn-thesis, assembly and interfacing of nanowires for high yieldbatch-fabrication of reproducible devices. Among the syntheticapproaches to nanowire fabrication, metal cluster-catalyzedgrowth from gas phase precursors is probably the most com-mon method for obtaining high quality nanowires. The processis thought to proceed by vapour–liquid–solid (VLS) [172–174]or vapour–solid–solid (VSS) [175] mechanisms. The diametersof the nanowires synthesized in this manner is largely deter-mined by the size of the metal clusters that serve as the nu-cleation sites during the initial phase of nanowire growth. Themetallic clusters are conventionally obtained in either of twoways. One involves the deposition of a uniform Au film, whichbreaks up into more or less spherical aggregates upon high tem-perature annealing. These aggregates serve as the clusters tocatalyze nanowire growth. This methods suffers from poor clus-ter size control and from being substrate unspecific, in that thewire growth occurs everywhere.


Fig. 22. Scanning electron micrograph of silicon nanowires grown on Si(111) substrates by the VLS method, using as catalyst Au clusters deposited by immersionplating from microemulsion solutions with R values of 16 (a), 25 (b), 50 (c), 100 (d), and 200 (e), or from aqueous solution (f). Insets: close-up of the wires, showingthe more uniform wire diameters in (a–e) relative to (f) (scale bar = 300 nm). Note the catalyst droplets decorating the tips of most wires. Reprinted with permissionfrom Ref. [164].c© 2005, American Chemical Society.

From the design and manufacturing perspective, the abilityto control the nanowires’ size, orientation and location duringgrowth is highly desirable. Indeed, if the growth and assemblyof nanowires are combined in a single step, subsequentfabrication processes are facilitated by the epitaxial nature ofthe wire-substrate interface, which implies good electrical aswell as mechanical [176] contacts between wire and substrate.Nanowires synthesized via the VLS or VSS mechanismsgenerally have a preferred growth direction, whereby they tendto align along the 〈111〉 direction, possibly as a consequenceof epitaxial growth (the nanowire axis usually, but notalways, lies along a close packed crystallographic direction).This characteristic has been exploited to align nanowires bychoosing the proper substrate orientation. For example, Sinanowires grow preferentially along the 〈111〉 direction, andhence, vertically aligned nanowires can be obtained on aSi(111) substrate, while laterally aligned Si nanowires areobtained on vertical Si(111) planes exposed by a straight etchof a (110)-oriented Si wafer. In those experiments where thenucleating metal catalysts are deposited by physical vapourdeposition or by immersion in colloidal gold suspensions, theentire substrate is covered indiscriminately. As a result, a thick

mesh of nanowires grows everywhere, frustrating attempts tofabricate useful devices. For example, in the case of Si nanowirebridges formed between sidewall trenches fabricated on (110)Si substrates, the nanowires grow both inside and outside of thetrenches, as well as on top of the electrodes and every otherplace on the substrate. It is easy to appreciate why the metalcatalysts should only be deposited in the locations where thenanowires are desired.

Gao et al. have used galvanic displacement to selectivelydeposit Au catalyst on Si surfaces for the growth of verticallyand laterally aligned Si nanowire arrays [164]. Water-in-oilmicroemulsions were employed to control the size of the Auclusters. The authors showed that cluster size correlates withnanowire diameter, as shown in Fig. 22 for growth on Si(111)substrate. The fabrication process for horizontal nanowirestructures used in their work is a recurring motif in horizontalnanowire device processing [177,178], and is schematicallyillustrated in Fig. 23. The (111) sidewall-exposed structuresare etched into a (110) silicon-on-insulator (SOI) substrate.The horizontal surfaces (top of SOI as well as bottom of thetrenches) are covered by a thick oxide (hundreds of nm), andthus resist short time etches in hydrofluoric acid. Galvanic


Fig. 23. Schematic of the fabrication process used to produce horizontallyaligned nanowire arrays. (a) Patterning of the oxide-capped Si(110) SOIwafer exposes the (111) sidewalls. (b) Immersion plating in microemulsionsolution deposits uniform catalyst clusters selectively on the exposed sidewalls.Reprinted with permission from Ref. [164].c© 2005, American Chemical Society.

displacement deposition of Au as the catalyst results in thepresence of metallic nanoclusters exclusively on the verticalsidewalls of the trenches. If microemulsions are employed (asthey were in Ref. [164]), the size and coverage of clusters canbe tightly controlled.

Fig. 24 shows field emission scanning electron microscopyimages of the final structures after growing Si nanowires onsuch structures by the galvanic deposition of Au nanoclustersas catalyst. Dense Si nanowires, with diameters ranging from100 to 300 nm, are grown laterally from the (111) sidewallsof Si pillars. The nanowires are straight, have a uniform lengthof about 15 µm, and are well aligned (90◦ to the sidewalls).It is also evident that the nanowires only grow on the Sisidewalls and are absent from the tops and bottoms of thesamples where SiO2 (rather than Si) is exposed, as expectedfrom the selectivity towards Si of metal deposition by galvanicdisplacement. Another advantage of this deposition method isthe uniform density of nanowires grown across 80 µm deeptrenches. Achieving such a degree of uniformity would bea major challenge if Au were deposited by physical vapourdeposition.

The process versatility and synthetic advantages of thegalvanic displacement method of catalyst deposition have beenexploited by San Paulo et al. to design and fabricate novelmechanical beam-like structures comprised of freely suspendedsingle crystalline Si micropaddles alternating with horizontal Sinanowire arrays grown from microemulsion-deposited catalystAu nanoparticles [165]. The fabrication process flow begins

with the steps outlined in Fig. 23 above. The nanowires aregrown for a sufficient time to bridge the gap across the trench.A long HF etch results in the complete underetching of the SOIdevice layer, resulting in freestanding micropaddles suspendedby the nanowire arrays (Fig. 25). This composite mechanicalstructure yields a low spring constant and an exceptionally highsurface area. It illustrates the power of designing in a processthat combines bottom-up growth with top-down fabrication andselective catalyst deposition.

Doping is a major problem in the so-called bottom-upmethods of nanowire fabrication, like the VLS and VSSmethods, examples of which have been discussed above.Moreover, since nanowires tend to grow in the closed-packdirection, it is hard to obtain wire growth in an arbitrarycrystallographic orientation. In contrast to bottom-up synthesis,straight top-down fabrication methods, by which the wires areetched away from a bulk substrate, obviously do not suffer fromeither shortcoming. Advanced lithographic techniques can beemployed toward the goal of fabricating top-down nanowiredevices, but the process flow involved is quite laborious.

A simple electrochemical process has been employed byPeng et al. to fabricate highly oriented SiNW arrays by etchingsingle crystalline silicon wafers in an aqueous HF solutioncontaining Fe3+ ions. It is based on the metal-seed-inducedexcessive local oxidation and dissolution of the substrate [179,180]. Metal nanoparticles are deposited on the Si substrate bya galvanic displacement reaction. The metallized wafers aresubsequently immersed in an aqueous HF/Fe(NO3)3 solutionat 50 ◦C for 30 min, after which the substrate acquires a black-looking aspect. The formation of aligned nanowire arrays isconfirmed by SEM.

The authors proposed an etching mechanism by which themetal nanoclusters catalyze the oxidation of the substrate. Thismay happen because the higher electronegativity of the metalcluster attracts electrons from the Si substrate, which is thenmore readily oxidized. In other words, the metal nanoparticlesare proposed to act as local microcathodes and promote thecathodic reaction Fe3+

+ e−→ Fe2+. The oxidized Si is

then rapidly removed by the HF, causing the catalyst to sinkinto the bulk silicon, and giving rise to either porous Si atlow coverage (the pores corresponding to the original locationof the disconnected nanoparticles), or to arrays of straightSi nanowires (when the nanoparticles form interconnectednetworks).

The nanowires produced in this manner have crosssections of three main shapes: wires, ribbons, and triangles.Interestingly, the size of a nanostructure appears to influenceits shape, with ribbons typically 150–250 nm wide, round wirestypically 10–20 nm in diameter, and triangles typically 80–150wide. These 1D nanostructures are usually smooth from top tobottom and there is almost no diameter variation along the axis,indicative of a straight sidewall formation during the etch [180].

The effect of using different metal catalysts, such as Au,Ag and Pt, in the etch process described above has alsobeen characterized [180]. Differences were observed thatcould be attributed to two main causes. One is that differentcatalyst nanocluster film morphologies are obtained in galvanic


Fig. 24. Scanning electron micrographs of silicon nanowire arrays grown selectively on the sidewalls of a patterned SOI wafer (see Fig. 24 for process schematics).Note the high alignment of the wires, the selectivity of the catalyst deposition process, and hence, of the growth, to the sidewalls, and the uniformity of the arealdensity of the arrays over the whole depth of the trenches (80 µm). The scale bar is 20 µm (2 µmin inset). Reprinted with permission from Ref. [164].c© 2005, American Chemical Society.

displacements from solutions of different noble metal salts.For instance, the strong reaction between silicon and solutionsof HF/AgNO3 tends to produce large quantities of silverdendrites. Gold nanoparticles also have a strong tendency toform dense networks, but platinum particles remain isolated,producing only well separated pores. Another interestingdifference is that while Ag and Au nanoparticles sink straightinto the substrate, producing straight etch sidewalls and hence,straight nanowires, the pores excavated by Pt clusters arenot as straight. This observation points to a difference in thepropagation of the Si-metal interface in the two cases. Its causeremains unknown.

6.5. Complex nanostructures grown by galvanic displacementprocesses

In addition to studies establishing the usefulness ofgalvanic displacement processes for seeding the growth ofsemiconductor nanostructures, recent work provides a proofof concept that galvanic displacement can be employed torealize a number of metallic nanostructures as well. Porteret al. have reported on metal nanostructure fabrication by static

Fig. 25. Suspended silicon micropaddles joined by sidewall-grown siliconnanowire arrays. Reprinted with permission from Ref. [165].c© 2007, American Chemical Society.

plowing lithography and galvanic displacement plating [116].The process flow is comprised of the following sequenceof steps. First, a layer of polymer resist is applied onto aGe(111) substrate, and then the resist is patterned by plownanolithography, in which an atomic force microscope tip isused to scrape off the polymer in a desired pattern. Uponthe immersion of the substrate in a dilute metal salt aqueous


Fig. 26. Galvanic displacement of silver on Ge(100) from 1 mM aqueousAgNO3. (a) Optical viewgraph of Ge chip (1 cm × 1 cm) denoting areaswhere scanning electron micrographs (b, c, and d) were obtained; (b) silverplatelet stacks (nano-inukshuks); (c, e) region of germanium oxide and somesilver deposits (chemical composition determined by EDS); (d, f) dendriticstructures are visible near the corners of the chip. Reprinted with permissionfrom Ref. [182].c© 2005, American Chemical Society.

solution, the exposed regions of the Ge substrate displace themetal ion, leading to the formation of nanostructures in thepreviously patterned shape. Finally, a solvent rinse removes thepolymer mask.

The lithography steps can be bypassed entirely, however. It iswell known that complex patterns arise in the electrodepositionof metals, as a consequence of the strong nonlinearities ofthe process. This complexity can sometimes be exploited tocreate new nanofabrication paradigms, the best known of whichis perhaps the spontaneous formation of ordered hexagonalarrays of nanopores during the anodization of aluminumfilms [181].

In galvanic displacement processes, the necessary etchingand charge transport in the semiconducting substrate addto the complexity brought about by mass diffusion andcharge transport in the solution. The spontaneous formation ofcomplex nanostructures was reported by Aizawa et al. [182]upon immersion of germanium substrates in aqueous silversolutions at room temperature. Systematic studies of thefunction of Ag+concentrations reveal a progression frompredominant substrate etching (10−5 M), to formation of etchpits with metallic nuclei inside of them (10−4 M), to extendedgrowth of nanostructures with global dendritic aspect forlonger deposition times (10−3 M and higher). These structuresare comprised of silver platelets of predominantly regularhexagonal shape, regardless of the Ge substrate’s orientation.

Before branching into dendrites, these platelets are stackedupon one another to form structures reminiscent of the (man-made) stone inukshuks, and were thus termed nano-inukshuks(Fig. 26(b)). These structures begin to grow perpendicularto the substrate. Long growth times and/or high growthrates favour the development of branched dendritic structures,which the authors have shown are found predominantlyaround the edges of the substrate (Fig. 26(a) and 26(d)). Theobservation is consistent with the finding that the contactangle of hexadecanethiol-coated Au films formed by galvanicdisplacement and long deposition times regularly exceeds 120◦,which is indicative of fractal growth [148].

The production of metallic nanostructures of controlledsize, shape and structure, as well as their integration withsemiconductors, is important for a variety of technologicalapplications. Shape and size have a strong influence on optical,electrical, and catalytic properties of metal nanoparticles.The controlled growth of silver nanostructures of severaldifferent regular geometric shapes has been accomplished bythe reduction of silver nitrate with ethylene glycol at 160 ◦Cin polyvinylpyrrolidone [183,184]. Galvanic displacement byimmersion in aqueous HAuCl4 was then employed to turn thesilver solid shapes into (hollow) Au shells. These experimentsdemonstrated that any method of producing silver nanoparticlesof well-controlled shape and size by galvanic displacement canbe used to produce Au nanostructures as well by a seconddisplacement process, even though the original method byitself may not lead to regular nanostructure formation whenemployed directly with Au salts. More generally, a sequence ofdisplacement reactions can be used conveniently to transformany nanostructure built of a less noble metal into one made of amore noble one.

The starting point of this sequence of displacement reactionsmight conceivably be a semiconductor nanostructure as well.Although we are not aware of any report to this effect, we notethat immersion plating has been used to metallize Si nanowiresgrown by metal-catalyzed CVD [185]. The nanowires weredecorated by immersion plating in solutions of AgNO3 andNaAuCl4·2H2O, leading to the assembly of Ag (30–100 nmdiameter) and Au (5–25 nm diameter) nanodot arrays. The dotsare spaced a few nanometers apart. Improved coverage resultedwhen HF was added to the metal solution, since HF promotedthe removal of silicon oxide from the nanowire surface (thegrowing oxide layer eventually suppresses the formation ofmetal nanocrystals). The authors suggested that such metal-decorated nanostructures would be useful for sensing of ananalyte by optical or electrochemical methods.

Since its discovery almost thirty years ago, the enhance-ment of the Raman signal from molecules adsorbed on nanos-tructured metallic surfaces continues to receive much attention(an excellent review of the early work in the field is found inRef. [186]). While great progress has occurred in the theoreticalunderstanding of the effect, the realization of stable and repro-ducible substrates for surface enhanced Raman scattering hasproven to be an elusive goal. Among the metals that are reportedto exhibit SERS, silver is the one for which the cross section en-hancement is the highest, ceteris paribus. Liu and Green have


developed a fabrication scheme to produce Ag nanostructuresin the shape of rods and tori [89]. The process combines so-called “Island Lithography” and galvanic displacement. Briefly,uniform arrays of holes are etched into a Si substrate througha SiO2 mask. Silver is deposited selectively in the holes froman aqueous solution of AgNO3 containing variable amounts ofHF. The authors noted the uniform nucleation of Ag at low HFconcentration, with growth of solid metallic nanopillars. How-ever, as the concentration of HF was increased, preferential nu-cleation along the Si/SiO2 edge of the etched holes was ob-served, and as a consequence, the resulting Ag nanostructureshad toroidal shapes, resembling a bracelet of Ag beads. Inter-estingly, these toroidal nanostructures were observed to becomeunstable when subjected to prolonged exposure in solutions ofvarious analytes. The main cause of instability was attributedto the tendency of the largest bead of a bracelet to grow at theexpense of the smaller ones. This growth, which is driven bythe size-dependent chemical potential of the metallic beads andcan be slowed down by the application of surfactants, ultimatelyleaves nanopillar-like structures in place of the nanotori [187].Whatever the final shape of the metallic structures, the reported100 million-fold enhancement of the pyridine signal attests tothe suitability of immersion plating for fabrication of SERSsubstrates.

7. Conclusions

The development of metal deposition processes basedon galvanic displacement on semiconductor surfaces haswitnessed a surge in interest among researchers, with manyrecent applications devoted to patterning and nanostructurefabrication. The complexity of semiconductor electrochemistryand surface structures is certainly the main reason whyour knowledge and control of these processes is much lessadvanced than in the relative mature technology of immersionplating on metal base materials. However, it has becomeapparent that this very complexity opens up tremendouspossibilities in the design and development of functionalsemiconductor nanostructures and in their integration withmicroscale probes and devices.

The deposition of metals by galvanic displacement requires atight control of the surface preparation and of the reaction rates.It usually proceeds very fast; hence defects, non-uniformitiesand impurities at the surface will be sources of uncontrolledgrowth of the metallic layers, which in turn leads to aloss of adhesion. In this sense, additives to the electrolyte,such as hydrogen scavengers, surfactants, or complexingagents, and the adjustment of the deposition parameters, suchas temperature or pH, help us to reach a homogeneous,instantaneous and controlled nucleation, which is required forthe subsequent growth of an adherent and uniform metallic film.Adhesion undoubtedly is also promoted by a strong interactionbetween the metal and the semiconductor, and the formationof intermetallic compounds of the semiconductor and noblemetals will generally improve adhesion. However, as for theelectroless and electrolytic depositions, a universal rule doesnot exist.

Acknowledgments

The authors’ work on this subject has benefited greatlyfrom discussions with many colleagues and coworkers over theyears. In particular, we wish to thank Pietro Luigi Cavallotti,Michaela Fritz, Di Gao, Roger Howe, Ilaria Lombardi, andAlvaro San Paulo. Financial support from the National ScienceFoundation and from the Ministero dell’Universita e dellaRicerca Scientifica is gratefully acknowledged.

References

[1] D. Laser, A.J. Bard, J. Electrochem. Soc. 123 (1976) 1828.[2] D. Laser, A.J. Bard, J. Phys. Chem. 80 (1976) 459.[3] A.J. Nozik, Faraday Discuss. Chem. Soc. 70 (1980) 7.[4] G. Nagasubramanian, B.L. Wheeler, A.J. Bard, J. Electrochem. Soc. 130

(1983) 1680.[5] A.J. Bard, et al., J. Phys. Chem. 97 (1993) 7147.[6] J.O’M. Bockris, S.U.M. Khan, Surface Electrochemistry: A Molecular

Level Approach, Plenum Press, New York, 1993.[7] P.C. Searson, in: H. Gerischer, C.W. Tobias (Eds.), Advances

in Electrochemical Science and Engineering, vol. 4, Wiley-VCH,Weinheim, Germany, 1997.

[8] A.J. Nozik, Ann. Rev. Phys. Chem. 52 (2001) 193.[9] V. Lehmann, Electrochemistry of Silicon: Instrumentation, Science,

Materials and Applications, Wiley-VCH, Weinheim, Germany, 2002.[10] M. Schlesinger, M. Paunovic, Modern Electroplating, 4th ed., John

Wiley & Sons, Inc, New York, 2000.[11] M. Paunovic, M. Schlesinger, Fundamentals of Electrochemical

Deposition, Wiley-Interscience, Hoboken, NJ, 2006.[12] N. Kanani, Electroplating: Basic Principles, Processes and Practise,

Elsevier Science, Amsterdam, Holland, 2005.[13] C.G. Zoski, Handbook of Electrochemistry, Elsevier Science, Amster-

dam, Holland, 2007.[14] R.W. Johnson, J. Electrochem. Soc. 108 (1961) 632.[15] J.J. Werbicki, Plating 58 (1971) 763.[16] D.H. Ma, D.J. Levy, J. Electrochem. Soc. 125 (1978) 1741.[17] Z. Kovac, K.-N. Tu, IBM J. Res. Develop. 28 (1984) 726.[18] F.J. Monteiro, M.A. Barbosa, D.R. Gabe, D.H. Ross, Plat. Surf. Finish.

76 (1989) 86.[19] H. Keping, F. Jingli, Trans. Inst. Met. Finishing 74 (1996) 95.[20] E. Stoyanova, D. Stoychev, J. Appl. Electrochem. 27 (1997) 685.[21] Z.-L. Wei, D. Tang, X. Wang, S.-X. You, Jinshu Rechuli/Heat Treat. Met.

30 (2005) 262.[22] P. Meeh, Circuit World 31 (2005) 28.[23] S. Hashimoto, M. Kiso, Y. Oda, H. Otake, G. Milad, D. Gudaczauskas,

Circuit World 32 (2006) 16.[24] L. Yang, B. Luan, J. Electrochem. Soc. 152 (2005) C474–C481.[25] D.A. Brevnov, T.S. Olson, G.P. Lopez, P. Atanassov, J. Phys. Chem. B

108 (2004) 17531–17536.[26] B. Guenther, Trans. IMF 78 (2000) 143.[27] D.-J. Lee, H.S. Lee, Microelectron. Reliab. 46 (2006) 1119.[28] M. Matsumura, S.R. Morrison, J. Electroanal. Chem. 147 (1983) 157.[29] V.A. Burrows, Y.J. Chabal, G.S. Higashi, K. Raghavachari,

S.B. Christman, Appl. Phys. Lett. 53 (1988) 998.[30] Y.J. Chabal, G.S. Higashi, K. Raghavachari, V.A. Burrows, J. Vac. Sci.

Technol. A 7 (1989) 2104.[31] G.S. Higashi, Y.J. Chabal, G.W. Trucks, K. Raghavachari, Appl. Phys.

Lett. 56 (1990) 656.[32] M.J. Eddowes, J. Electroanal. Chem. 280 (1990) 297.[33] G.W. Trucks, K. Raghavachari, G.S. Higashi, Y.J. Chabal, Phys. Rev.

Lett. 65 (1990) 504.[34] L.T. Canham, Appl. Phys. Lett. 57 (1990) 1046.[35] J. Stumper, R. Greef, L.M. Peter, J. Electroanal. Chem. 310 (1991) 445.[36] J.N. Kidder, P.S. Williams, T.P. Pearsall, D.T. Schwartz, B.Z. Nosho,

Appl. Phys. Lett. 61 (1992) 14.


[37] H.H. Hassan, J.-N. Chazalviel, M. Neumann-Spallart, F. Ozanam,M. Etman, J. Electroanal. Chem. 381 (1995) 211.

[38] H.H. Hassan, B. Fotouhi, J.-L. Sculfort, S.S. Abdel-Rehiem, M. Etman,F. Ozanam, J.-N. Chazalviel, Electroanal. Chem. 407 (1996) 105.

[39] V. Bertagna, R. Erre, F. Rouelle, M. Chemla, J. Electrochem. Soc. 146(1999) 83–90.

[40] F. Decker, E. Pantano, D. Dini, S. Cattarin, S. Maffi, G. Razzini,Electrochim. Acta 45 (2000) 4607–4613.

[41] X.H. Xia, C.M.A. Ashruf, P.J. French, J.J. Kelly, Chem. Mater. 12 (2000)1671.

[42] X.H. Xia, J.J. Kelly, Electrochim. Acta 45 (2000) 4645–4653.[43] G. Hasse, J. Carstensen, G. Popkirov, H. Foll, Mat. Sci. Eng. B69–70

(2000) 188.[44] A.G. Munoz, M.M. Lohrengel, J. Solid State Electrochem. 6 (2002) 513.[45] F. Yahyaoui, T. Dittrich, T. Burke, M. Aggour, S. Lust, C. Levy-Clement,

J. Rappich, J. Electrochem. Soc. 149 (2002) E472.[46] S.P. Garcia, H. Bao, M.A. Hines, Surf. Sci. 541 (2003) 252.[47] P.G. Miney, V.J. Cunnane, Electrochim. Acta 48 (2003) 1475.[48] F. Yahyaoui, T. Dittrich, M. Aggour, J.-N. Chazalviel, F. Ozanam,

J. Rappich, J. Electrochem. Soc. 150 (2003) B205.[49] Y.-J. Liu, H.-Z. Yu, J. Electrochem. Soc. 150 (2003) G861.[50] G. Barillaro, A. Diligenti, A. Nannini, G. Pennelli, Sens. Actu. A 107

(2003) 279.[51] D. Resnik, D. Vrtacnik, U. Aljancic, M. Mozek, S. Amon,

Microelectron. J. 34 (2003) 591.[52] F. Bensliman, A. Fukuda, N. Mizuta, M. Matsumura, J. Electrochem.

Soc. 150 (2004) G527.[53] S. Cattarin, M. Musini, Electrochem. Comm. 7 (2005) 762.[54] D.C. Miller, K. Gall, C.R. Stoldt, Electrochem. Solid-State Lett. 8 (2005)

G223.[55] H. Gerischer, in: P. Delahay (Ed.), Advances in Electrochemistry and

Electrochemical Engineering, Vol. 1, Interscience, New York, 1961.[56] R. Memming, Semiconductor Electrochemistry, Wiley-VCH, Weinheim,

Germany, 2001.[57] X.G. Zhang, Electrochemistry of Silicon and its Oxide, Kluwer

Academic/Plenum Publishers, New York, 2001.[58] G. Hodes, Electrochemistry of Nanomaterials, Wiley-VCH, Weinheim,

Germany, 2001.[59] N.L. Dmitruk, O.Y. Borkovskaya1, Z.J. Horvath, I.B. Mamontova,

S.V. Mamykin, Phys. Status Solidi. C 3 (2003) 933.[60] H. Kahn, C. Deeb, I. Chasiotis, A.H. Heuer, J. Microelectromech. Syst.

14 (2005) 914.[61] J.-G. Li, Mat. Chem. Phys. 47 (1997) 126.[62] P. Allongue, V. Kieling, H. Gerischer, Electrochim. Acta 40 (1995)

1353–1360.[63] P. Allongue, C.H. de Villeneuve, S. Morin, R. Boukherroub,

D.D.M. Wayner, Electrochim. Acta 45 (2000) 4591–4598.[64] J.-N. Chazalviel, A. Belaıdi, M. Safi, F. Maroun, B.H. Erne, F. Ozanam,

Electrochim. Acta 45 (2000) 3205.[65] C. Fang, H. Foll, J. Carstensen, J. Electroanal. Chem. 589 (2006) 259.[66] L.A. D’Asaro, S. Nakahara, Y. Okinaka, J. Electrochem. Soc. 127 (1980)

1935.[67] C.H. Ting, M. Paunovic, P.L. Pai, G. Chiu, J. Electrochem. Soc. 136

(1989) 462.[68] L.A. Nagahara, T. Ohmori, K. Hashimoto, A. Fujishima, J. Electroanal.

Chem. 333 (1992) 363.[69] L.A. Nagahara, T. Ohmori, K. Hashimoto, A. Fujishima, J. Vac. Sci,

Technol. A 11 (1993) 763.[70] R.A.W. Dryfe, E.C. Walter, R.M. Penner, Chem. Phys. Chem. 5 (2004)

1879.[71] D.R. Lide, CRC Handbook of Chemistry and Physics, 87th ed., Taylor

and Francis, Boca Raton, FL, 2007.[72] P. Gorostiza, R. Dıaz, F. Sanz, J.R. Morante, J. Electrochem. Soc. 144

(1997) 4119.[73] P. Gorostiza, P. Allongue, R. Diaz, J.R. Morante, F. Sanz, J. Phys. Chem.

B 107 (2003) 6454.[74] O.M.R. Chyan, J.J. Chen, H.Y. Chien, J. Sees, L.J. Hall, Electrochem.

Soc. 143 (1996) 92.

[75] J.S. Jeon, S. Raghavan, H.G. Parks, J.K. Lowell, I. Ali, J. Electrochem.Soc. 143 (1996) 2870.

[76] M.K. Lee, H.D. Wang, J.J. Wang, J. Solid-State Electron. 41 (1997) 695.[77] F.S.G. dos Santos, L.F.O. Martins, P.C.T. D’Ajello, A.A. Pasa,

C.M. Hasenack, Microelectron. Eng. 33 (1997) 59.[78] F.S.G. dos Santos, A.A. Pasa, C.M. Hasenack, Microelectron. Eng. 33

(1997) 149.[79] M.K. Lee, J.J. Wang, H.D. Wang, J. Electrochem. Soc. 144 (1997) 1777.[80] G. Li, E.A. Kneer, B. Vermiere, H.G. Parks, S. Raghavan, J.S. Jeon, J.

Electrochem. Soc. 145 (1998) 241.[81] R. Srinivasan, I.I. Suni, Surf. Sci. 408 (1998) L698.[82] R. Srinivasan, I.I. Suni, J. Electrochem. Soc. 146 (1999) 570.[83] C. Rossiter, I.I. Suni, Surf. Sci. 430 (1999) L553.[84] N.A. Balashova, V.V. Eletskii, V.V. Medyntsev, Elektrokhimiya 1 (1965)

274.[85] I.B. Krikshtopaitis, Z.P. Kudzhmauskaite, Elektrokhimiya 7 (1971)

1579.[86] L. Magagnin, R. Maboudian, C. Carraro, J. Phys. Chem. B 106 (2002)

401.[87] P. Perfetti, A.D. Katnani, T.-X. Zhao, G. Margaritondo, O. Bisi,

C. Calandra, J. Vac. Sci. Technol. 21 (1982) 628.[88] C. Calandra, O. Bisi, G. Ottaviani, Surf. Sci. Rep. 4 (1985) 271.[89] F.-M. Liu, M. Green, J. Mater. Chem. 14 (2004) 1526.[90] K. Peng, J. Zhu, Electrochim. Acta 49 (2004) 2563.[91] M. Aizawa, J.M. Buriak, J. Amer. Chem. Soc. 128 (2006) 5877.[92] J.S.H. Cho, H. Kang, S.S. Wong, Y. Shacham-Diamand, MRS Bull. 18

(1993) 31.[93] S. Dhingra, R. Sharma, P.J. George, Solid-State Electron. 43 (1999)

2231.[94] X. Cheng, G. Li, E.A. Kneer, B. Vermiere, H.G. Parks, S. Raghavan,

J.S. Jeon, J. Electrochem. Soc. 145 (1998) 352.[95] Y.H. Ogata, J. Sasano, T. Itoh, T. Sakka, E. Rayon, E. Pastor,

V. Parkhutik, J. Electrochem. Soc. 152 (2005) C537.[96] G. Oskam, J.G. Long, A. Natarajan, P.C. Searson, J. Phys. D: Appl. Phys.

31 (1998) 1927.[97] L. Magagnin, R. Maboudian, C. Carraro, Electrochem. Solid-State Lett.

4 (2001) C5.[98] J. Xu, R.B. Jordan, Inorg. Chem. 29 (1990) 2933.[99] S. Ye, T. Ichihara, K. Uosaki, J. Electrochem. Soc. 148 (2001) C421.

[100] S.W. Lim, R.T. Mo, P.A. Pianetta, C.E.D. Chidsey, J. Electrochem. Soc.148 (2001) C16.

[101] S. Zhong, Z-G. Yang, J. Cai, J. Electrochem. Soc. 152 (2005) C143.[102] C. Scheck, Y.-K. Liu, P. Evans, R. Schad, A. Bowers, G. Zangari,

J.R. Williams, T.F. Issacs-Smith, J. Vac. Sci. Technol. A 22 (2004) 1842.[103] C. Scheck, Y.-K. Liu, P. Evans, R. Schad, A. Bowers, G. Zangari,

J.R. Williams, T.F. Issacs-Smith, Phys. Rev. B 69 (2004) 035334.[104] P. Gorostiza, R. Di’az, J. Servat, F. Sanz, J. Electrochem. Soc. 144 (1997)

909.[105] L.A. Porter Jr., H.C. Choi, J.M. Schmeltzer, A.E. Ribbe, L.C.C. Elliott,

J.M. Buriak, Nano. Lett. 2 (2002) 1369.[106] X.R. Ye, C.M. Wai, D. Zhang, Y. Kranov, D.N. McIlroy, Y. Lin,

M. Engelhard, Chem. Mater. 15 (2003) 83.[107] X.R. Ye, C.M. Wai, Y. Lin, J.S. Young, M.H. Engelhard, Surf. Coat.

Tech. 190 (2005) 25.[108] S. Karmalkar, J. Banerjee, J. Electrochem Soc. 146 (1999) 580.[109] Y. Zhang, S.S. Ang, A.A.O. Tay, D. Xu, E.T. Kang, K.G. Neoh,

L.P. Chong, A.C.H. Huan, Langmuir 19 (2003) 6802.[110] Y.L. Chang, W.C. Ye, C.L. Ma, C.M. Wang, J. Electrochem. Soc. 153

(2006) C677.[111] N. Takano, N. Hosoda, T. Yamada, T. Osaka, J. Electrochem. Soc. 146

(1999) 1407.[112] D. Niwa, T. Homma, T. Osaka, J. Phys. Chem. B 108 (2004) 9900.[113] D. Niwa, T. Homma, T. Osaka, J. Electrochem. Soc. 152 (2005) C54.[114] P. Gorostiza, M.A. Kulandainathan, R. Dıaz, F. Sanz, P. Allongue,

J.R. Morante, J. Electrochem. Soc. 147 (2000) 1026.[115] L.A. Porter, H.C. Choi, A.E. Ribbe, J.M. Buriak, Mat. Res. Soc. Symp.

Proc., vol. 737, 2003, p. F4.7.1.[116] L.A. Porter, A.E. Ribbe, J.M. Buriak, Nano Letters 3 (2003) 1043.[117] S.-M. Park, M.E. Barber, J. Electroanal. Chem. 99 (1979) 67.


[118] Y.A. Gol’dberg, D.N. Nasledovand, B.V. Tsarenkov, Instrum. Exp. Tech.USSR 14 (1971) 899.

[119] G.P. Donzelli, G. Guarini, F. Vidimari, Thin Solid Films 55 (1978) 25.[120] R. Schlesinger, P. Janietz, K.-H. Heckner, P. Rotsch, J. Phys. Chem. 94

(1990) 8695.[121] M.R. Hormozi Nezhad, M. Aizawa, L.A. Porter Jr., A.E. Ribbe,

J.M. Buriak, Small 1 (2005) 1076.[122] C-H. Yang, W-L. Yang, W. Chang, Electrochem. Solid-State Lett. 8

(2005) C121.[123] C.-H. Yang, W.-L. Yang, J. Electrochem. Soc. 152 (2005) G556.[124] S. Zhong, Z.-G. Yang, J. Cai, H.-J. He, J.-S. Wen, C. Liu, J. Electrochem.

Soc. 152 (2005) C466.[125] V.M. Dubin, Y. Shacham-Diamand, J. Electrochem. Soc. 144 (1997) 898.[126] H.P. Fung, C.C. Wan, in: P.C. Andricacos, P.C. Searson, C. Reidsema-

Simpson, P. Allongue, J.L. Stickney, G.M. Oleszek (Eds.), Electrochem-ical Processing in ULSI Fabrication and Semiconductor/Metal Deposi-tion II, PV 99-9, The Electrochemical Society Proceedings Series, Pen-nington, NJ, 1999, 194.

[127] J. O’Kelly, K. Mongey, Y. Gobil, J. Torres, P. Kelly, G. Crean,Microelectron. Eng. 50 (2000) 473.

[128] Y. Wu, W.C. Chen, H.P. Fong, C.C. Wan, Y.Y. Wang, J. Electrochem.Soc. 149 (2002) G309.

[129] H. Cesiulis, M. Ziomek-Moroz, J. Appl. Electrochem. 30 (2000) 1261.[130] Z. Wang, H. Li, H. Shodiev, I.I. Suni, Electrochem. Solid-State Lett. 7

(2004) C67.[131] N. Ferralis, R. Maboudian, C. Carraro, J. Phys. Chem. C 111 (2007)

7508.[132] L. Magagnin, R. Maboudian, C. Carraro, Thin Sol. Films 434 (2003)

100.[133] M. Chen, J. Gao, Mod. Phys. Lett. B 14 (2000) 103.[134] J.L. He, W.Z. Li, H.D. Li, Appl. Phys. Lett. 69 (1996) 1402.[135] L.S. Johansen, M. Ginnerup, J.T. Ravnkilde, P.T. Tang, B. Lochel, Sens.

Actu. 83 (2000) 156.[136] A. Thies, G. Schanz, E. Walch, J. Konys, Electrochim. Acta 42 (1997)

3033.[137] N. Takano, D. Niwa, T. Yamada, T. Osaka, Electrochim. Acta 45 (2000)

3263.[138] M.V. ten Kortenaar, J.J.M. de Goeij, Z.I. Kolar, G. Frens, P.J. Lusse,

M.R. Zuiddam, E. van der Drift, J. Electrochem. Soc. 148 (2001) C28.[139] H.P. Neves, T.D. Kudrle, J.-M. Chen, S.G. Adams, M. Maharbiz,

S. Lopatin, N.C. MacDonald, Conformal Electroless Copper and NickelDeposition on MEMS Structures, in: Mat. Res. Soc. Symp. Proc., vol.546, 1999, p. 139.

[140] J.L.A. Yeh, H. Jiang, H.P. Neves, N.C. Tien, J. Microelectromech. Syst.9 (2000) 281.

[141] Y. Shacham-Diamand, Y. Sverdlov, Microelectron. Eng. 50 (2000) 525.[142] Y-P. Lee, M.-S. Tsai, T.-C. Hu, B.-T. Dai, M.-S. Feng, Electrochem.

Solid-State Lett. (2001) C47.[143] P.E. Laibinis, G.M. Whitesides, D.L. Allara, Y.-T. Tao, A.N. Parikh,

R.G. Nuzzo, J. Amer. Chem. Soc. 113 (1991) 7152.[144] M.M. Sung, K. Sung, C.G. Kim, S.S. Lee, Y. Kim, J. Phys. Chem. B 104

(2000) 2273.[145] H. Ron, H. Cohen, S. Matlis, M. Rappaport, I. Rubinstein, J. Phys. Chem.

B 102 (1998) 9861.[146] S. Vollmer, P. Fouquet, G. Witte, Ch. Boas, M. Kunat, U. Burghaus, Ch.

Woll, Surf. Sci. 462 (2000) 135.[147] G.K. Jennings, J.C. Munro, T.H. Yong, P.E. Laibinis, Langmuir 14

(1998) 6130.[148] C. Carraro, L. Magagnin, R. Maboudian, Electrochim. Acta 47 (2002)

2583.

[149] C.H. Mastrangelo, C.H. Hsu, Proc. IEEE Solid State Sensor and ActuatorWorkshop, Hilton Head, SC, 1992, p. 208.

[150] W.R. Ashurst, C. Yau, C. Carraro, R. Maboudian, M.T. Dugger, J.Microelectromech. Syst. 10 (2001) 41.

[151] T. Nakagawa, K. Ogawa, T. Kurumizawa, S. Ozaki, Japan J. Appl. Phys.32 (1993) L294.

[152] R.L. Alley, K. Komvopoulos, R.T. Howe, J. Appl. Phys. 76 (1994) 5731.[153] C.D. Frisbie, L.F. Rozsnyai, A. Noy, M.S. Wrighton, C.M. Lieber,

Science 265 (1994) 2071.[154] E.W. van der Vegte, G. Hadziioannou, Langmuir 13 (1997) 4357.[155] A. Noy, D.V. Vezenov, C.M. Lieber, Annu. Rev. Mater. Sci. 27 (1997)

381.[156] L.A. Wenzler, G.L. Moyes, G.N. Raikar, R.L. Hansen, J.M. Harris,

T.P. Beebe Jr., Langmuir 13 (1997) 3761.[157] T. Ito, M. Namba, P. Buhlmann, Y. Umezawa, Langmuir 13 (1997) 4323.[158] V.V. Tsukruk, V.N. Bliznyuk, Langmuir 14 (1998) 446.[159] S.C. Clear, P.F. Nealy, J. Colloid Interface Sci. 213 (1999) 238.[160] M. Fritz, C. Carraro, R. Maboudian, Tribol. Lett. 11 (2001) 171.[161] A. Noy, C.D. Frisbie, L.F. Rozsnyai, M.S. Wrighton, C.M. Lieber, J.

Amer. Chem. Soc. 117 (1995) 7943.[162] S.K. Sinniah, A.B. Steel, C.J. Miller, J.E. Reutt-Robey, J. Amer. Chem.

Soc. 118 (1996) 8925.[163] K.L. Johnson, K. Kendall, A.D. Roberts, Proc. R. Soc. London Ser. A

324 (1971) 301.[164] D. Gao, R. He, C. Carraro, R.T. Howe, P. Yang, R. Maboudian, J. Amer.

Chem. Soc. 127 (2005) 4574.[165] A. San Paulo, N. Arellano, J.A. Plaza, R. He, C. Carraro, R. Maboudian,

R.T. Howe, J. Bokor, P. Yang, Nano Lett. 7 (2007) 1100.[166] L. Magagnin, V. Bertani, P.L. Cavallotti, R. Maboudian, C. Carraro,

Microelectron. Eng. 64 (2002) 479.[167] T. Osaka, N. Takano, S. Komaba, Chem. Lett. 27 (1998) 657.[168] R. Srinivasan, Y. Tian, I.I. Suni, Surf. Sci. 490 (2001) 308.[169] J. Fendler, Chem. Rev. 87 (1987) 877.[170] J.D. Hines, Curr. Opini. Colloid Interface Sci. 6 (2001) 350.[171] V. Arcoleo, V. TurcoLiveri, Chem. Phys. Lett. 258 (1996) 223.[172] R.S. Wagner, W.C. Ellis, Appl. Phys. Lett. 4 (1964) 89.[173] G.A. Bootmsa, H.J. Gassen, J. Cryst. Growth 10 (1971) 223.[174] E.I. Givargizov, J. Cryst. Growth 31 (1975) 20.[175] A.I. Persson, M.W. Larsson, S. Stenstrom, B.J. Ohlsson, L. Samuelson,

L.R. Wallenberg, Nat. Mat. 3 (2004) 677.[176] A. San Paulo, J. Bokor, R.T. Howe, R. He, P. Yang, D. Gao, C. Carraro,

R. Maboudian, Appl. Phys. Lett. 87 (2005) 53111-1-3.[177] M. Saif Islam, S. Sharma, T.I. Kamins, R.S. Williams, Nanotech. Lett.

15 (2004) L5.[178] M. Becker, V. Sivakov, G. Andra, Nano Lett. 7 (2007) 75.[179] K. Peng, Y. Wu, H. Fang, X. Zhong, Y. Xu, J. Zhu, Angew. Chemie 44

(2005) 2737.[180] K. Peng, J. Hu, Y. Yan, Y. Wu, H. Fang, Y. Xu, S.-T. Lee, J. Zhu, Adv.

Funct. Mater. 16 (2006) 387.[181] G.E. Thompson, Thin Solid Films 297 (1997) 192.[182] M. Aizawa, A.M. Cooper, M. Malac, J.M. Buriak, Nano Lett. 5 (2005)

815.[183] Y. Sun, Y. Xia, Sci. 298 (2002) 2176.[184] Y. Sun, Y. Xia, Adv. Mater. 15 (2003) 695.[185] A.A. Yasseri, S. Sharma, T.I. Kamins, Z. Li, R.S. Williams, Appl. Phys.

A 82 (2006) 659.[186] M. Moscovits, Rev. Modern Phys. 57 (1985) 783.[187] M. Green, F.-M. Liu, L. Cohen, P. Kollensperger, T. Cass, Faraday

Discuss. 132 (2006) 269.

metallization and nanostructuring of semiconductor surfaces by galvanic displacement processes

Documents