memories

KARMAVEER BHAURAO PATIL POLYTECHNIC,

SATARA

Rayat Shikshan Sanstha’s

Department Of Electronics And Telecommunication Engineering

Memories

Principles of Digital Techniques

Amit NevaseLecturer,

Department of Electronics & Telecommunication Engineering, Karmaveer Bhaurao Patil Polytechnic, Satara

EJ3G Subject Code: 17320 Second Year Entc

05/02/2023 Amit Nevase 3

Objectives

The student will be able to:

Understand basic digital circuits.

Understand conversion of number systems.

Implement combinational and sequential circuits.

Understand logic families, data converters


Teaching & Examination Scheme

Two tests each of 25 marks to be conducted as per the schedule given by MSBTE.

Total of tests marks for all theory subjects are to be converted out of 50 and to be entered in mark sheet under the head Sessional Work (SW).

Teaching Scheme Examination Scheme

TH TU PR PAPERHRS

TH PR OR TW TOTAL

03 -- 02 03 100 25# --- 25@ 150


Module I – Number System

Introduction to digital signal, Advantages of Digital System over analog systems (8 Marks)Number Systems: Different types of number systems( Binary,

Octal, Hexadecimal ), conversion of number systems,Binary arithmetic: Addition, Subtraction, Multiplication, Division.Subtraction using 1’s complement and 2’s complement

Codes (4 Marks) Codes -BCD, Gray Code, Excess-3, ASCII codeBCD addition, BCD subtraction using 9’s and 10’ complement

(Numericals based on above topic).


Module II – Logic Gates & Introduction to Logic Families

Logic Gates (8 Marks)Basic Gates and Derived GatesNAND and NOR as Universal GatesBoolean Algebra: Fundamentals of Boolean LawsDuality Theorem, De-Morgan’s TheoremNumericals based on above topic

Logic Families (8 Marks) Characteristics of Logic Families & Comparison between different

Logic FamiliesLogic Families such as TTL, CMOS, ECLTTL NAND gate – Totem Pole, Open CollectorCMOS Inverter


Module III – Combinational Logic Circuits

Introduction (8 Marks)Standard representation of canonical forms (SOP & POS),

Maxterm and Minterm , Conversion between SOP and POS formsK-map reduction techniques upto 4 variables (SOP & POS form),

Design of Half Adder, Full Adder, Half Subtractor & Full Subtractor using k-Map

Code Converter using K-map: Gray to Binary Binary to Gray Code Converter (upto 4 bit)

IC 7447 as BCD to 7- Segment decoder driver IC 7483 as Adder & Subtractor, 1 Digit BCD AdderBlock Schematic of ALU IC 74181 IC 74381


Module III – Combinational Logic Circuits

Necessity, Applications and Realization of following (8 Marks) Multiplexers (MUX): MUX TreeDemultiplexers (DEMUX): DEMUX Tree, DEMUX as DecoderStudy of IC 74151, IC 74155Priority Encoder 8:3, Decimal to BCD EncoderTristate Logic, Unidirectional & Bidirectional buffer ICs: IC 74244

and IC 74245


Module IV – Sequential Logic Circuit

Sequential Circuits (12 Marks)Comparison between Combinational & Sequential circuitsOne bit memory cell: RS Latch- using NAND & NOR Triggering Methods: Edge & Level TriggeringFlip Flops: SR Flip Flop, Clocked SR FF with preset & clear,

Drawbacks of SR FFClocked JK FF with preset & clear, Race around condition in JK FF,

Master Slave JK FFD and T Flip FlopsExcitation Tables of Flip FlopsBlock schematic and function table of IC 7474, IC 7475, IC 74373


Module IV – Sequential Logic Circuit

Study of Counters (8 Marks)Counter: Modulus of Counter, Types of Counters: Asynchronous &

Synchronous CountersAsynchronous Counter/Ripple Counter: 4 Bit Up/Down Counter Synchronous Counter: Excitation Tables of FFs, 3 Bit Synchronous

Counter, its truth table & waveformsBlock schematic and waveform of IC 7490 as MOD-N Counter

Shift Registers (4 Marks) Logic diagram, Truth Table and waveforms of 4 bit shift registers:

SISO, SIPO, PIPO, PISO 4 Bit Universial Shift RegistersApplications of Shift Registers (Logic Diagram & waveforms) of

Ring Counter and Twisted Ring Counter


Module V – Data Converters

Introduction and Necessity of Code Converters (8 Marks)DAC Types & Comparison of weighted resistor type (Mathematical

Derivation) and R-2R Ladder Type DAC (Mathematical Derivation upto 3 variable)

ADC Types & Their Comparison (8 Marks) Single Slope ADC. Dual Slope ADC, SAR ADC IC PCF 8591: 8 Bit ADC-DAC


Module VI – Memories

Principle of Operation & Classification of memory (10 Marks)Organization of memoriesRAM (Static & Dynamic), Volatile and Non-volatileROM (PROM, EPROM, EEPROM)Flash MemoryComparison between EEPROM & Flash

Study of Memory ICs Identification of IC number and their function of following ICs: IC

2716, IC 7481 and IC 6116

Module-VIMemories


Specific Objectives

Classify memories.

Apply ICs 2716, 7481, 6116 in practical

applications.


Module VI – Memories Principle of Operation & Classification of memory

(10 Marks)Organization of memoriesRAM (Static & Dynamic), Volatile and Non-volatileROM (PROM, EPROM, EEPROM)Flash MemoryComparison between EEPROM & Flash


2716, IC 7481 and IC 6116


Memory

A memory unit is a device to which binary

information is transferred for storage and from

which information is retrieved when needed for

processing.

A memory unit stores binary information in groups

of bits called words. The internal structure of

memory unit is specified by the number of words it

contains and the number of bits in each word.


Memory

The memory unit is an essential component in any

digital computer since it is needed for storing

programs and data. Not all accumulated

information is needed by the CPU at the same

time.

Therefore, it is more economical to use low-cost

storage devices to serve as a backup for storing

the information that is not currently used by CPU


Memory

Sequential circuits all depend upon the

presence of memory

A flip-flop can store one bit of information

A register can store a single “word”

• typically 8, 16, 32 or 64 bits

Memory stores a large number of words





2716, IC 7481 and IC 6116


Organization of Memory

You can think of memory as being

one big array (list) of data

The address serves as an array index

Each address refers to one word of data

(e.g., 8-bits, 16-bits, etc.)

You can read (or modify) the data at

any given memory address, just like

you can read (or modify) the contents

of an array at any given index

Address Data 00000000 00000001 00000002

.

.

.

.

.

.

.

.

.

. FFFFFFFD FFFFFFFE FFFFFFFF

word

0110101100111101

1011111100100100

1001110011110111

0110101111010000

1100101000110001

0000101100001111


Organization of Memory

Memory signals fall into three groups: Address Bus - selects one of many memory locations Data Bus -

Read (ROM/RAM): the selected location’s stored data is put on the data bus

Write (RAM): The data on the data bus is stored into the selected location

Control Bus - specifies what the memory is to doControl signals are usually active lowMost common signals are:

• CS: Chip Select; must be active to do anything• OE: Output Enable; active to read data• WR: Write; active to write data





2716, IC 7481 and IC 6116


Classification of Memory

Memory

Non Volatile Volatile

Hard-Disk, CD, DVD, Floppy Disk, Magnetic Tape, USB Flash memory, SD Card

ROM

FLASH

PROM

EPROMEEPROM

NOR

NAND

RAM

Static

Dynamic


Computer Memory Hierarchy

Power ONImmediate Term

Power ONVery Short Term

Power OFFShort Term

Power OFFMid Term

Power OFFLong Term

Hard DrivesSlow, Very Cheap

Small Size Small

Capacity

Medium Size Medium

Capacity

Small Size Large

Capacity

Large Size Very Large

Capacity

Large Size Very Large

Capacity

Processor RegistersVery Fast, Very Expensive

Processor CacheVery Fast, Expensive

Random Access Memory Fast, affordable

Flash/USBSlower, Cheap

CDs, DVD’s and Tape BackupVery Slow, Affordable





2716, IC 7481 and IC 6116


Comparison between Volatile & Non-volatile Memory

Volatile Memory

Information stored is lost if

power turns off.

Types – All RAMs, SRAM,

DRAM

Used for temporary storage

Uses mainly Solid state devices

Fast operation

Non-volatile Memory

Information stored is does not

lost if power turns off.

Types - All ROMs, EPROM,

EEPROM

Used for permanent storage

Uses magnetic, optical or sold

state devices

Slow operation





2716, IC 7481 and IC 6116


RAM – Random Access Memory

RAM stands for Random Access Memory. It is also

called "direct access memory".

Random access means that each individual byte in

entire memory can be access directly.

RAM is used to store data and instructions temporarily.

A program must be loaded into RAM before execution.



RAM is volatile memory. It means that its contents are

lost when the power is turned off.

RAM is read/write memory. CPU can read data from

RAM and write data to RAM.

It is used to store data and instruction while it is being

executed.

RAM is also called main memory or primary storage.



RAM plays very important role in the processing speed of a

computer.

A bigger RAM size provides larger amount of space for

processing. So the processing speed is increased.

The amount of data that can be stored in RAM is measured

in bytes.

Most desktop computers typically have 2 GB to 4 GM of

RAM. It also allows the addition of more memory if needed.



General Block Diagram


Types of RAMs

Static RAM (SRAM)

Memory behaves like Latches or Flip-Flops

Data remains stored as long as power applied

Dynamic RAM (DRAM)

Charged or discharged capacitor

Memory lasts only for a few milliseconds

Data must be refreshed periodically by reading and

rewriting


Types of RAMs

Typical Microprocessor Memory Configuration


SRAM

SRAM stands for Static Random Access Memory.

It can store data without any need of frequent recharging.

CPU does not need to wait to access data from SRAM

during processing. That is why it is faster than DRAM.

It utilizes less power than DRAM. SRAM is more expensive

as compared to DRAM.

It is normally used to build a very fast memory known

as cache memory.


SRAM

Static random access memory (SRAM) is a type of volatile

semiconductor memory to store binary logic '1' and '0' bits.

SRAM uses bi-stable latching circuitry made of

Transistors/MOSFETS to store each bit. Compared to Dynamic

RAM (DRAM), SRAM doesn't have a capacitor to store the data,

hence SRAM works without refreshing.

In SRAM the data is lost when the memory is not electrically

powered.


SRAM

SRAM is faster and more reliable than the more common DRAM.

While DRAM supports access times (access time is the time required

to read or write data to/from memory) of about 60 nanoseconds,

SRAM can give access times as low as 10 nanoseconds.

In addition, its cycle time is much shorter than that of DRAM

because it does not need to pause between accesses. Unfortunately,

it is also much more expensive to produce than DRAM. Due to its

high cost, SRAM is often used only as a memory cache.


SRAM Cell

The SRAM cell consists of a bi-stable flip-flop connected to the

internal circuitry by two access transistors.

When the cell is not addressed, the two access transistors are

closed and the data is kept to a stable state, latched within the

flip-flop.

The flip-flop needs the power supply to keep the information.

The data in an SRAM cell is volatile (i.e., the data is lost when the

power is removed).

However, the data does not "leak away" like in a DRAM, so the

SRAM does not require a refresh cycle.


SRAM Cell

Static RAM is fast because the six-transistor configuration (shown in

Fig.) of its flip-flop circuits keeps current flowing in one direction or the

other (0 or 1).

The 0 or 1 state can be written and read instantly without waiting for a

capacitor to fill up or drain (like in DRAM).

However, the six transistors take more space than DRAM cells made of

one transistor and one capacitor.

When opposite voltages are applied to the column wires, the flip-flop is

oriented in one of two directions for a 0 or 1.

At that point, the flip-flop becomes a self-perpetuating storage cell as

long as a constant voltage is applied.


SRAM Cell

A six Transistor CMOS SRAM Cell


SRAM Timing Diagram


Applications of SRAM

SRAM can be found in the cache memory of a computer or as part

of the RAM digital to analog converter on a video card.

Static RAM is also used for high-speed registers, caches and small

memory banks like a frame buffer on a display adapter.

Several scientific and industrial subsystems, modern appliances,

automotive electronics, electronic toys, mobile phones,

synthesizers and digital cameras also use SRAM.

It is also highly recommended for use in PCs, peripheral

equipment, printers, LCD screens, hard disk buffers, router buffers

and buffers in CDROM / CDRW drives.


DRAM

DRAM stands for Dynamic Random Access Memory.

It is used in most of the computers. It is the least expensive kind of

RAM.

It requires an electric current to maintain its electrical state. The

electrical charge of DRAM decreases with time that may result in

loss of DATA.

DRAM is recharged or refreshed again and again to maintain its

data.

The processor cannot access the data of DRAM when it is being

refreshed. That is why it is slow.


DRAM

DRAM memory technology has MOS technology at the heart

of the design, fabrication and operation.

The basic dynamic RAM or DRAM memory cell uses a

capacitor to store each bit of data and a transfer device - a

MOSFET - that acts as a switch.

The level of charge on the memory cell capacitor determines

whether that particular bit is a logical "1" or "0" - the presence

of charge in the capacitor indicates a logic "1" and the

absence of charge indicates a logical "0".


DRAM Cell

The basic dynamic RAM memory cell has the format

that is shown below. It is very simple and as a result it

can be densely packed on a silicon chip and this makes

it very cheap.

1-bit DRAM cell

word line

bit line


DRAM Cell

Two lines are connected to each dynamic RAM cell - the Word

Line (W/L) and the Bit Line (B/L) connect as shown so that the

required cell within a matrix can have data read or written to it.

The basic memory cell shown would be one of many thousands

or millions of such cells in a complete memory chip. Memories

may have capacities of 256 Mbit and more.

To improve the write or read capabilities and speed, the overall

dynamic RAM memory may be split into sub-arrays.


DRAM Cell

The presence of multiple sub-arrays shortens the word

and bit lines and this reduces the time to access the

individual cells. For example a 256 Mbit dynamic RAM,

DRAM may be split into 16 smaller 16Mbit arrays.

The word lines control the gates of the transfer lines,

while the bit bines are connected to the FET channel

and are ultimately connected to the sense amplifiers.


DRAM Array


DRAM Timing

No clock

DRAM operations are initiated and completed on both the

rising and falling edges of RAS_L and CAS_L

The timing for RAS-only refresh cycle is shown on next slide

This cycle is used to refresh a row of memory without

actually reading or writing any data at the external pins of

the DRAM chip

The cycle begins when a row address is applied to the

multiplexed address inputs & RAS_L is asserted


DRAM – Refresh Timing

The DRAM stores the row-address in an internal row-address

register on the falling edge of RAS_L and reads the selected row of

memory array into an on-chip row latch

When RAS_L is negated the contents of the row are written back

from the row latch


DRAM Refreshing

Typical devices require each cell to be refreshed once

every 4 to 64 ms.

During “suspended” operation, notebook computers

use power mainly for DRAM refresh


DRAM Refreshing


DRAM – Read Timing

Begins like a refresh cycle, selected row is read into the row

latch

Next a column address is applied to the multiplexed address

inputs & is stored in an on-chip column address register on the

falling edge of CAS_L

It selects one bit of the just read row which is made available

on the DRAM’s DOUT pin which is enabled as long as CAS_L is

asserted


DRAM – Read Timing


DRAM – Write Timing

Begins like a refresh or read cycle, WE_L must be

asserted before CAS_L is asserted, this disables DOUT

for the rest of the cycle, even though CAS_L will be

asserted subsequently

Once the selected row is read into the row latch, WE_L

forces the input bit on DIN to be merged into the row

latch in the bit position selected by the column address


DRAM – Write Timing


Types of DRAM

Synchronous DRAM (SDRAM)

Double Data Rate SDRAM (DDR SDRAM)

Extended Data Out DRAM (EDO DRAM)

Burst EDO DRAM (BEDO DRAM)

Rambus DRAM (RDRAM)


Applications of DRAM

DRAM memories are high volume memories. Some DRAMs

have high speed interfaces such as DDR and DDRII SDRAM,

and some have speed enhancing internal architectures.

DRAMs with low power internal design techniques are

used in battery operated systems.

Some DRAM memories are also used for graphics

enhancements like high speed point-to-point interfaces as

well as several internal graphics functions.


Applications of DRAM

DRAMs can also be used in networking and battery

operated synchronous and asynchronous applications.

The main memory (the random access memory) in

personal computers is DRAM. DRAM is also the type of

RAM used in workstations and laptop computers as

well as some video game consoles.


Comparison between SRAM & DRAM

SRAM Flip flops using bipolar or MOS

transistors are used as basic

memory cells.

Refreshing is not required.

Access time is less hence

these are faster memories.

More power consumption.

More expensive.

DRAM Flip flops using MOS transistor

& parasitic capacitance are

used.

Refreshing is required as

charge leaks.

Access time is more hence

these are slower memories.

Less power consumption.

Less expensive.


Comparison between SRAM & DRAM

SRAM A SRAM possesses more space in

the chip than DRAM.

Storage Capacity is Less.

More number of components are

required per cell.

Bits stored in the form of voltage.

Applications- Used in cars,

household appliances, handheld

electronic devices.

DRAM A DRAM possesses less space

in the chip than SRAM.

Storage Capacity is More.

Less number of components

are required per cell.

Bits stored in the form of

charge.

Applications- Used computer

memory





2716, IC 7481 and IC 6116


ROM

ROM stands for Read Only Memory. The data and instructions in

ROM are stored by the manufacturer at the time of its

manufacturing.

This data and programs cannot be changed or deleted after wards.

The data or instructions stored in ROM can only be read but new data

or instructions cannot be written into it.

This is the reason why it is called Read Only Memory.

ROM stores data and instructions permanently. When the power is

turned off, the instructions stored in ROM are not lost. That is the

reason ROM is called non-volatile memory.


ROM

ROM is used to store frequently used instructions and

data to control the basic input & output operations of

the computer.

Mostly, frequently used small programs like operating

system routines and data, are stored into the ROM.

When the computer is switched on, instructions in the

ROM are automatically activated. These instructions

help the booting process of computer.


ROM

General Block Diagram


Internal ROM Structure

Typically Implementation

5

active low

data output

Diode means a “1” is stored at this location


Timing Diagram of ROM

tAA access time from address tACS access time from chip select tOE/tOZ output-enable/disable time tOH output-hold time


Types of ROM

Masked ROM

Programmable ROM (PROM)

Erasable Programmable ROM (EPROM)

Electrically Erasable Programmable ROM (EEPROM)


PROM

PROM stands for Programmable Read Only Memory.

This form of ROM is initially blank.

The user or manufacturer can write data/program on it

by using special devices. However, once the program or

data is written in PROM chip, it cannot be changed.

If there is an error in writing instructions or data in

PROM, the error cannot be erased. PROM chip becomes

unusable.


EPROM

EPROM stands for Erasable Programmable Read Only Memory.

This form of ROM is also initially blank.

The user or manufacturer can write program or data on it by

using special devices.

Unlike PROM, the data written in EPROM chip can be erased by

using special devices and ultraviolet rays.

So program or data written in EPROM chip can be changed and

new data can also be added. When EPROM is in use, its

contents can only be read.


Applications of EPROM

The most frequent use for an EPROM memory chip is to store

computer BIOS which is used in order to bootstrap the operating

system of a computer.

EPROMs are also often found in the development of video game

cartridges. Some microcontrollers use an on-chip EPROM in

order to store their program. Examples are some versions of the

Intel 8048 as well as the "C" versions of the PIC microcontroller.

These microcontrollers were built with a window for debugging

and program development purposes. The same chips are also

developed in opaque OTP packages for production purposes.


EEPROM

EEPROM stands for Electrically Erasable Programmable

Read Only Memory.

This kind of ROM can be written or changed with the

help of electrical devices.

So data stored in this type of ROM chip can be easily

modified.


Applications of EEPROM

EEPROM memory is used in computers as well as other electronic devices

in order to store small amounts of data which must be saved when the

power is removed such as in calibration tables or device configuration.

If larger amounts of static data need to be stored, like in USB flash drives, a

flash EEPROM is more economical to use than a traditional EEPROM device.

EEPROM memory can also be found in various other products which are

not strictly memory products, including digital potentiometers, digital

clocks and digital temperature sensors.

These devices can have a small amount of EEPROM in order to store

calibration information or other data which needs to be available in case

there is a loss of power.


Comparison between RAM & ROM

RAM

Operations involved- Read &

Write.

Temporary Storage.

Types- SRAM, DRAM

Applications- Calculators,

Computers

ROM

Operations involved- Read.

Permanent Storage.

Types- PROM, EPROM,

EEPROM.

Applications- Computers,

Microprocessors


Comparison between EPROM & EEPROM

EPROM

Exposure to ultraviolet light

technique used to erase data.

Selective erasing is not

possible. All locations get

erased.

10 to 15 mins. i.e. Long time

required for erasing

Less expensive

EEPROM

A voltage of 20V to 25V is

applied to erase data.

Selective erasing is possible. A

particular locations can be

erased.

10ms. i.e. A very short time

required for erasing

More expensive


Comparison between EPROM & EEPROM

EPROM

It is necessary to remove

EPROM from circuit for erasing

data.

Applications- In computer to

store operating System

EEPROM

It is not necessary to remove

EEPROM from circuit for

erasing data.

Applications- Cell phones,

Digital cameras etc.





2716, IC 7481 and IC 6116


Flash Memory

Flash memory or a flash RAM is a type of nonvolatile

semiconductor memory device where stored data exists even

when memory device is not electrically powered.

It's an improved version of electrically erasable programmable

read-only memory (EEPROM). The difference between Flash

Memory and EEPROM are, EEPROM erases and rewrite its

content one byte at a time or in other words, at byte level.

Where as Flash memory erases or writes its data in entire blocks,

which makes it a very fast memory compared to EEPROM.


Flash Memory

Flash memory can't replace DRAM and SRAM because

the speed at which the DRAM/SRAM can access data

and also their ability to address at byte level can't be

matched by Flash.

The flash memory is also termed as Solid-state Storage

Device (SSD) due to the absence of moving parts in

comparison to traditional computer hard disk drive.


Basic Flash Memory Cell Structure

Flash memory stores data in an array of memory cells. The memory

cells are made from floating-gate MOSFETS (known as FGMOS).

These FG MOSFETs (or FGMOS in short) have the ability to store an

electrical charge for extended periods of time (2 to 10 years) even

without a connecting to a power supply.

The FGMOS is actually fabricated by electrically isolating the gate

of a standard MOS transistor, so that there are no resistive

connections to this gate (floating gate) (see Fig).



A secondary gate (more than one in the case of multiple gate

transistor) known as control gate is then deposited above this

floating gate and is electrically isolated from it using an insulator

like Si02.

There will be only capacitive connection between the new inputs

(control gates) and the floating gate, because the floating gate is

completely surrounded by highly resistive material (SiO2). So, in

terms of its DC operating point, the FG is a floating node.



Three Input FG MOSFET Symbol



Each cell (FGMOS) of a NOR-flash memory resembles a standard

MOSFET, except the FGMOS has two gates instead of one (see

fig).

On top is the control gate, as in ordinary MOS transistors. Below

this control gate, situates the new gate called floating gate, which

is insulated all around by the oxide layer (SiO2).

The floating gate is interposed between the control gate and the

MOSFET channel. Because the floating gate is electrically isolated

by the oxide layer, any electrons placed on it are trapped there

and, under normal conditions, will not discharge for many years.



Flash Memory Cell


Flash Memory Cell Structure – Working Principle

Flash stores the data by removing or putting electrons on its

floating gate (see fig).

Charge on floating gate affects the threshold of the memory

element.

When electrons are present on the floating gate, no current

flows through the transistor, indicating a logic-0.

When electrons are removed from the floating gate, the

transistor starts conducting, indicating a logic-1.

This is achieved by applying voltages between the control gate

and source or drain.


Flash Memory Cell Structure – Working Principle


Flash Memory Cell Structure – Erase Operation

The raw state of flash memory cells (A single-level NOR flash cell)

will be bit 1's, (at default state) because floating gates carry no

negative charges.

Erasing a flash-memory cell (resetting to a logical 1) is achieved by

applying a voltage across the source and control gate (word line).

The voltage can be in the range of -9V to -12V. And also apply

around 6V to the source. The electrons in the floating gate are

pulled off and transferred to the source by quantum tunneling (a

tunnel current). In other words, electrons tunnel from the floating

gate to the source and substrate.


Flash Memory Cell Structure – Write Operation

A NOR flash cell can be programmed, or set to a binary "0" value, by the

following procedure: While writing a high voltage of around 12V is applied

to the control gate (word line).

If high voltage around 7V is applied to Bit Line (Drain terminal), bit 0 is

stored in the cell.

The channel is now turned on, so electrons can flow from the source to

the drain. Through the thin oxide layer electrons move to the floating gate.

The source-drain current is sufficiently high to cause some high-energy

electrons to jump through the insulating layer onto the floating gate, via a

process called hot-electron injection.


Flash Memory Cell Structure – Write Operation

Due to applied voltage at floating-gate the excited electrons are

forced through and trapped on other side of the thin oxide layer,

giving it a negative charge on the floating gate. These negatively

charged electrons act as a barrier between the control gate and

the floating gate.

If low voltage is applied to the drain via the bit line, the amount of

electrons on the floating gate remains the same, and logic state

doesn't change, storing the bit 1. Since floating gate is insulated by

oxide, the charge accumulated on the floating gate will not leak

out, even if the power is turned off.


Flash Memory Cell Structure – Read Operation

Apply a voltage around 5V to the control gate and around 1V

to the drain. The state of the memory cell is distinguished by

the current flowing between the drain and the source.

To read the data, a voltage is applied to the control gate, and

the MOSFET channel will be either conducting or remain

insulating, based on the threshold voltage of the cell, which

is in turn controlled by charge on the floating gate. The

current flow through the MOSFET channel is sensed and

forms a binary code, reproducing the stored data.


Types of Flash Memory

The two main types of flash memory are the NOR Flash

& NAND Flash.

Intel is the first company to introduce commercial (NOR

type) flash chip in 1988 and Toshiba released world's

first NAND-flash in 1989.


Types of Flash Memory

The names, NOR-flash & NAND-flash came from the structure used

for the interconnections between memory cells.

Cells in NOR-flash are connected in parallel to the bit lines so that

each cell can be read/write/erase individually. This parallel

connection of cells closely resembles to the parallel connection of

transistors in a CMOS NOR gate, that's how it derives the name as

NOR flash.

In NAND-flash, cells are connected in series resembling a NAND

gate, and so the name. The series connection prevents the cells from

being programmed individually. These cells must be read in series.


NOR Flash Memory

NOR-flash is slower in erase-operation and write-

operation compared to NAND-flash. That means the

NAND-flash has faster erase and write times.

More over NAND has smaller erase units. So fewer

erases are needed. NOR-flash can read data slightly

faster than NAND.


NOR Flash Memory

NOR offers complete address and data buses to randomly

access any of its memory location (addressable to every byte).

This makes it a suitable replacement for older ROM

BIOS/firmware chips, which rarely needs to be updated. Its

endurance is 10,000 to 1,000,000 erase cycles.

NOR is highly suitable for storing code in embedded systems.

Most of the today's microcontrollers comes with built in flash

memory.


NOR Flash Memory


NAND Flash Memory

NAND-flash occupies smaller chip area per cell. This maker

NAND available in greater storage densities and at lower costs

per bit than NOR-flash.

It also has up to ten times the endurance of NOR-flash. NAND

is more fit as storage media for large files including video and

audio.

The USB thumb drives, SD cards and MMC cards are of NAND

type.


NAND Flash Memory

NAND-flash does not provide a random-access external address

bus so the data must be read on a block-wise basis (also known

as page access), where each block holds hundreds to thousands

of bits, resembling to a kind of sequential data access.

This is one of the main reasons why the NAND-flash is unsuitable

to replace the ROM, because most of the microprocessors and

microcontrollers require byte-level random access.


NAND Flash Memory


Flash Array A typical flash-array has a grid of columns and rows of FGMOS-

transistor cells as shown in the Fig.

The word line WL is the horizontal line and bit line BL is the vertical

line (shown in Fig).

The Control gates of the FGMOS cells are connected to the word-

line WL. The decoded address is actually applied to this word-line.

The bit line BL connects drains of the FGMOS cells together and

represent data bus.

The Source-line SL connects sources of the FGMOS to common

ground. The voltage combinations applied to WL and BL define an

operation, whether it is read, erase or program.


Flash Array

Typical Flash Array

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Comparison between NOR & NAND Flash Memory

NOR Flash Memory

For a NOR-flash erase operation, it

is mandatory that all bytes in the

target block should be written with

zeros before they can be erased.

The size of an erase-block in NOR-

flash ranges from 64 to 128 Kbytes.

Here a write/erase operation can

take up to 5 s.

NAND Flash Memory

For a NAND-flash erase

operation, it is not mandatory

that all bytes in the target block

should be written with zeros

before they can be erased.

The size of an erase-block in

NAND-flash ranges from 8 to 32

Kbytes. Here a write/erase

operation can take less time.

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Comparison between NOR & NAND Flash Memory

NOR Flash Memory

NOR-flash interface resembles

closely to a SRAM memory

interface, which has enough

address pins to map its entire

media, allowing for easy

access to every byte contained

in it.

NAND Flash Memory

The NAND-flash go for serially

accessed complicated I/O

mapped interface. Here the

same pins are used for control,

address & data.

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Applications of Flash Memory

Flash memory can be found in portable electronics like

smart phones, digital music devices, digital cameras and

removable storage devices.

Flash technology is also often present in computer

BIOS, PCMCIA cards, video game cards and modems.

Another application is as a replacement for hard disks

and is attractive when speed, noise, power

consumption and/or reliability are an issue.

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Applications of Flash Memory

Serial flash is a small and low power memory which

uses a serial interface for sequential data access.

Serial flash memory, when incorporated into an

embedded system, requires, on the PCB, fewer wires

than parallel flash memories. This allows a reduction in

power consumption as well as board space, and

therefore a reduction of total system cost.

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Examples of Flash Memory

PEN DRIVES

MEMORY CARDS

SOLID STATE DRIVE

APPLE FLASH MEMORY

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Advantages of Flash Memory

Large and increasing capacity

High transferring speed

Small size, portability

Low power consumption

Work more quietly than physical hard drive

Flash memory is very durable and portable devices

which we use every where easily.

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Limitations of Flash Memory

Both NAND/NOR memory has limited number of

programming/erasure cycles

About 100,000 cycles is a typical number, even though

cells with higher cycle numbers can be designed

Virus can easily transfer in flash memory.

When flash memory is crash then data is lost.

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2716, IC 7481 and IC 6116

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Comparison between EPROM & Flash Memory

EPROM

Data can be erased only byte

by byte by giving electrical

pulses.

Byte programmable.

Cost is more.

Less speed than flash memory.

Life time is greater than flash

memory.

Flash Memory

Data can be erased only block

by block.

Block programmable.

Cost is less.

More speed than EPROM.

Life time is less than EPROM

memory.

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2716, IC 7481 and IC 6116

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IC 2716

The IC 2716 is a high speed 16K UV erasable and

electrically reprogrammable (EPROM) ideally suited for

applications where fast turn around and pattern

experimentation are important requirements.

The IC 2716 is packaged in a 24 pin DIP Package with

transparent lid. Transparent lid allows the user to

expose the chip to ultravoilet light to erase the bit

pattern .

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IC 2716

A new pattern can then be written into the device by

following the programming procedure.

This EPROM is fabricated with the reliable, high

volume, time proven, N-channel silicon gate

technology.

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IC 2716

Features:

2048X8 Organization

550mW max active power, 137.5mW max standby power

Low power during programming

Access Time – 450ns

Single 5V power Supply

Static – no clocks are required

Inputs and outputs – TTL compatible during both read and write modes

TRISTATE Output

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IC 2716

Pin Configuration:

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Study of Memory ICs Identification of IC number and their function of following ICs: IC 2716, IC 7481 and IC 6116

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IC 6116

The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using IDT's high-performance, high-reliability CMOS technology.

Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode.

When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH.

This capability provides significant system level power and cooling savings.

The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery.

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IC 6116

Features: High Speed Access & chip select lines Low power consumption Battery Backup operation Produced with advanced CMOS high performance

technology Input and output directly TTL compatible Static operation: no clocks or refresh required CMOS process virtually eliminates alpha particle soft

error rates

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IC 6116

Features:

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IC 6116

Pin Description:

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IC 6116

Truth Table:

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References

Digital Principles by Malvino

Leach

Modern Digital Electronics by

R.P. Jain

Digital Electronics, Principles

and Integrated Circuits by Anil K.

Maini

Digital Techniques by A. Anand

Kumar

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Online Tutorials

http://

www.eeherald.com/section/desig

n-guide/esmod15.html

http://

www.eeherald.com/section/desig

n-guide/esmod16.html

www.downloads.reactivemicro.co

m/Public

/.../ROM/2716%20EPROM%20-%

201.pdf

web.mit.edu/6.115/www/

document/6116.pdf

http://www.eeherald.com/section/design-guide/esmod15.html







http://www.downloads.reactivemicro.com/Public/.../ROM/2716%20EPROM%20-%201.pdf






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Thank You

Amit Nevase