me gtu curriculum

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M.E (VLSI &Embedded Systems Design)

2011 COURSE STRUCTURE AND SYLLABUS ...................................................................................... 2

VLES 5001 : Semiconductor Device Modeling............................................................................................ 4

VLES 5002 : Digital VLSI Design I - Frontend ........................................................................................... 6

VLES 5003 : Embedded Systems Software Design ..................................................................................... 9

VLES 5011 : Advanced Computer Programming ...................................................................................... 11

VLES 5012 : Advanced Computer Architecture ........................................................................................ 13

VLES 5013 : Designing with FPGA’s ........................................................................................................ 15

VLES 5004 : Digital VLSI Design II - Backend ........................................................................................ 17

VLES 5005 : Embedded Systems Hardware Design .................................................................................. 19

VLES 5006 : Analog and Mixed Signal IC Design .................................................................................... 22

VLES 5014 : Protocols and Interfaces ........................................................................................................ 24

VLES 5015 : Design For Testability........................................................................................................... 26

VLES 5016 : Standard Cell Library and Memory Design .......................................................................... 28

VLES 5017 : RTOS, Kernels and Device Drivers ...................................................................................... 30

VLES 5018 : Wireless Technology for Embedded Systems ...................................................................... 32

VLES 5019 : Crosstalk and Noise .............................................................................................................. 34

VLES 5020 : Mobile Applications Development ....................................................................................... 36

VLES 5021 : Digital Signal Processing ...................................................................................................... 38

VLES 5022 : Image Processing .................................................................................................................. 41

VLES 5023 : Low Power Design-SOCs and Systems ................................................................................ 43

VLES 5024 : Technical Writing, Presentation and IP ................................................................................ 46

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GUJARAT TECHNOLOGICAL UNIVERSITY

AHMEDABAD

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SEER AKADEMI PVT. LTD.

M.E (VLSI & EMBEDDED SYSTEMS DESIGN)

2011 COURSE STRUCTURE AND SYLLABUS

I Semester (Duration 20 weeks)

Code Group Subject L P Credits

VLES5001 Core Semiconductor Device Modeling 3 3 3+2

VLES5002 Core Digital VLSI Design I – Frontend 3 3 3+2

VLES5003 Core Embedded Systems Software Design 3 3 3+2

VLES5011/

VLES5012/

VLES5013

Elective Advanced Computer Programming

Advanced Computer Architecture

Designing with FPGA’s 3 3 3+2

Total Credits (4 Theory + 4 Labs) 12 12 20

II Semester (Duration 20 weeks)


VLES5004 Core Digital VLSI Design II - Backend 3 3 3+2

VLES5005 Core Embedded Systems Hardware Design 3 3 3+2

VLES5006 Core Analog and Mixed Signal IC Design 3 3 3+2

VLES5014/

VLES5015/

VLES5016/

Elective Protocols and Interfaces

Design For Testability

Standard Cell Library and Memory Design 3 3 3+2


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Summer Semester (Duration 16 weeks)


VLES5017/

VLES5018/

VLES5019

Elective RTOS, Kernels and Device Drivers

Wireless Technology for Embedded Systems

Crosstalk & Noise 3 3 3+2

VLES5020/

VLES5021/

VLES5022/

Elective Mobile Applications Development

Digital Signal Processing

Image Processing 3 3 3+2

VLES5023 Low Power Design - SOC's and Systems - 3 2

VLES5024 Technical Writing, Presentation Skills and IP - 3 2


III Semester (Duration 20 weeks)

Code Subject L P Credits

VLES6000 Project – Phase I - - 14

VLES6001 Seminar - 3 2

Total Credits

4 16

IV Semester (Duration 20 weeks)

Code Subject L P Credits

VLES6000 Project-Phase II - - 14

VLES6002 Seminar - 3 2

Total Credits

16

Distribution of Credits

Subject L P Credits

1st Semester 12 8 20

2nd Semester 12 8 20

Summer Programme 6 6 14

3rd Semester 0 16 16

4th Semester 0 16 16

G. Total 30 56 86

Each Lecture (L) is 60 minutes in duration.

Each Practical (P) is 60 minutes in duration.

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VLES 5001 : Semiconductor Device Modeling

Objective :

The main objectives of this course are to study the basics of semiconductor devices and their

modeling. Understand technology and process flows for bipolar and MOS integrated circuits,

operation principles, characteristics and computer models of the different types of semiconductor

devices used in VLSI. In the process of the laboratory work, technological methods and process

flows of devices and IC will be studied using appropriate software.

Lectures :

Unit I – Review of Semiconductor Fundamentals

Semiconductor materials. Energy bands of semiconductors, electrons and holes, doping,

carrier densities and transport (mobility, diffusion, drift, and currents). Recombination

and generation. Continuity equation.

Unit II – Devices based on PN Junctions

P-N junction structure and principle of operation. Energy band diagram. Thermal

equilibrium. The built-in potential. Forward and reverse bias. Voltage-current

characteristics. Diffusion and barrier capacitances. The parameters and I-V characteristics

of real P-N diode. General breakdown characteristics. Tunnel, avalanche, and thermal

breakdown. Schottky diode. Review of BJT operation.

Unit III - Metal-oxide-semiconductor field effect transistors

Structure and principles of operation. MOSFET analysis. Accumulation, depletion and

inversion modes. Parameters and characteristics. Threshold voltage calculation, the

substrate bias effect. Performance limitations. Advanced MOSFET issues - channel

length modulation. Short channel effects, sub-threshold current, field dependent mobility,

punch-through, velocity saturation, bipolar action, oxide injection etc. SPICE models of

MOS transistors .

Unit IV – Device Modeling

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Introduction to Device modeling, numerical methods and meshing (fixed and adaptive).

Numerical solutions, common methods – Newton, Gummel. IV characteristics and

Parametric extraction. Gate currents.

Unit V - Integrated Circuits Technology Overview

A historical review of integrated circuits (IC). Moore’s Law. Performance metrics for

ICs (density, speed, power consumption, cost, reliability, and yield). Basic structures of

MOS IC (P-MOS, N-MOS). CMOS technology and device structure. Silicon on insulator

structures (SOI). Basic Processes of IC Fabrication – Diffusion, Ion Implantation,

Oxidation, Photolithography, Etching, Chemical Vapor Deposition. Introduction to

process simulation.

Lab:

Tool used during laboratory works: HSPICE.

Study of one-dimensional ion implantation profiles

Study of thermally grown and deposited oxide layers

Course Project:

A project of suitable complexity, comprising of IC fabrication processes must be completed by

the student.

Course Material:

The field of VLSI and Embedded Systems is getting updated constantly and to keep up to date

with the latest research, technology and industry trends, Instructor for this course will decide and

provide the course material. This could be a combination of slides or research material or text

book references or any other relevant documentation depending on a) the nature of the

curriculum and b) relevant skills to be imparted as outcome of the course.

References:

S.M.Sze, Semiconductor Devices : Physics and Technology, John Wiley & Sons, Inc.

Solid State Electronics Devices, Ben G. Streetman, ISBN 0-13-025538-6, Prentice Hall,

New Jersey (2000).

Silicon VLSI Technology - Fundamentals, Practice and Modeling" by James D Plummer

et al. Pearson Education 2001.

VLSI Fabrication Principles, Sorab K. Ghandhi, ISBN 0471-58005-8, John Wiley and

Sons, New York (1994).

Silicon Processing for the VLSI Era, S. Wolf, and R.N. Tauber, ISBN0-9616721-6-1,

Lattice Press, Sunset Beach (2000).

Introduction to Microelectronic Fabrication, R. C. Jaeger, ISBN 0-201-44494-1

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VLES 5002 : Digital VLSI Design I - Frontend

Objective:

The study of IC design basics, levels, strategies, options, methods, styles, challenges, economics

and trends especially front-end. In the process of the laboratory work it is necessary to study the

main front-end IC design tools and to implement in the basic digital electronic circuits design.

Lecture:

UNIT I - Introduction - Levels of IC design – Digital circuit fundamentals

Concept of IC. IC structure, components, applications. History and evolution of the IC

industry. Moore’s Law. Design economics - Nonrecurring engineering costs (NRE) &

Recurring costs, Yield & Technology scaling.

System level Design. Top down design. Bottom up design. Back end design. Design

abstraction levels. Behavior Level. Register-Transfer Level (RTL). Logic Level. Circuit

Level. Component level. Examples of Domains and its Abstraction Levels.

CMOS logic gates, Combinational circuits, Sequential circuits, FSM

UNIT II - Design Flow

Design flow: Frontend – Marketing Requirements, Design specification, Verification

plan, RTL description, Functional verification, Synthesis. Backend – Partitioning, Floor

planning, Placement, CTS, Routing & layout generation, layout verification, Tapeout.

Foundry - Fabrication

Introduction to Testing – Need for testing, manufacturing test, design for test, chip-level

test, system-level test, test generation & fault models

Introduction to System on chip (Soc) design - Soft cores, Firm cores, Hard cores. Study

of AMBA AXI4 protocol.

UNIT III - IC Design techniques & options, CAD design, Design challenges

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Structured design techniques: hierarchy, regularity, modularity, locality.

Design options: Programmable logic Design, sea of gates and gate array design, standard

cell design, full-custom design. Study of FPGA tools.

Using of CAD tools: Behavioral synthesis tool, RTL synthesis tool , logic optimization

tool, structural to layout synthesis tool, layout synthesis tool, design capture tools, design

verification tools, circuit extractor, design rule checker (DRC), electrical rule checker

(ERC), layout vs. schematic.

Design challenges –

Microscopic issues: ultra-high speeds, power dissipation, supply rail drop, importance of

inter connect, noise, crosstalk, reliability, manufacturability, clock distribution.

Macroscopic issues: time to market, design complexity, high levels of abstractions, reuse,

IP, portability, tool interoperability.

Sub-nm technologies: technology scaling, switching power reduction, leakage power

control, process variations, die to die frequency variation, temperature variation.

UNIT IV- Digital Design and Synthesis

Verilog HDL. Concepts of Design planning, RTL design for Sequential & combinational

circuits, State machines design & encoding. Simulation , waveform generation, coverage

reports.

Synthesis concepts, Technology libraries, Constraints, Netlist generation & optimization.

UNIT IV – Design verification using System Verilog & VMM

System Verilog – Verification guidelines, Data types, Interfaces, Assertions,

Randomization, Coverage

Concepts of verification, verification plan, test cases & testbench generation

VMM – Layered test bench architecture: Signal, Command, Functional, Scenario & Test

layers

Lab:

Tools used during laboratory works: VCS & Design Compiler

Study and implementation using VCS and Design Compiler

Course Project:

A project of suitable complexity, comprising of RTL design, Testbench formation and coverage

must be completed by the student.

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Course Material:






References:

Synopsys recommended course material and lectures.

N. Weste, K. Eshragyan. Principles of CMOS VLSI Design. Adisson Wesley, 1993

J.F. Wakerly. Digital Design - Principles & Practices, Prentice Hall, 2001

Digital logic design by Morris Mano

Verilog HDL: A guide to digital design & synthesis, 2e by Samir Palnitkar

System Verilog for verification, 2e by Chris Spear – Springer

IEEE Std 1364™-2005 - Verilog LRM

System Verilog LRM

System Verilog Golden reference guide

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VLES 5003 : Embedded Systems Software Design

Objective:

The study of embedded systems software, programming and relevant applications. In the process

of the laboratory work it is necessary to use and study standard and emerging development kit

platforms for application development. The focus of the course is not on lecture, but a study of a

real system and application development using its resources.

Lectures:

UNIT I :

Introduction to Embedded Systems, Growth of Embedded Systems, Embedded System

Architecture and components including sensors, ADC, DAC, control and status units,

communication interfaces, Types of embedded systems, Design constraints, Concept of

compilers and debuggers, Need for prototyping, Prototyping using FPGA platforms.

UNIT II :

Introduction to Embedded C, Need for Embedded C, Difference between C and

Embedded C, Embedded C fundamentals – data types, functions, pointers, structures.

UNIT III :

Introduction to Keil C and Keil compiler, Simulating embedded applications,

configuration settings, build, compile, link, debug, run commands, Interfacing input and

output devices.

UNIT IV:

Microcontroller architecture and assembly language programming, Instruction set, types

of instructions, branch, call, interrupt service routine, Programming using different types

of MCUs.

UNIT V:

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Applications of embedded systems – communication systems, automotives, home appliances,

security systems, aviation.

Lab:

Tools used during laboratory works: Keil, Cypress PSoC, relevant FPGA or MCU kits.

Study and implementation of compilers and debuggers.

Study and implementation of applications on various platforms.

Course Project:

A project of suitable complexity, comprising of program design, coding, compilation and debug

must be completed.

Course Material:






References:

Product documentation from ARM (KEIL), Cypress, other FPGA/MCU vendors.

William Hohl. ARM Assembly Language - Fundamentals and Techniques, CRC Press,

Taylor and Francis Group 2009

Michael Barr and Anthony Massa. Programming Embedded Systems with C and GNU

development Tools, O’Reilly 2007

Instructors may recommend additional textbooks or reference material – the subject

content is rapidly changing and an up to date text book at the time of the class may be

recommended.

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VLES 5011 : Advanced Computer Programming

Objective:

The study of data structures, algorithms, programming languages, compilers and operating

systems.In the process of the laboratory work it is necessary to use and study standard

programming, compilation and debugging tools.

Lectures:

Topic 1 - Introduction

Basic concepts of programming, data structures, algorithms, compilers, operating

systems. Basics of Linux operating system usage and scripts in shell/perl languages.

Topic 2 - C language re-cap

Recap of C language programming and commonly used constructs.

Use of gcc and gdb.

Topic 3 - Data structures and Algorithms

Data types, records/structures, arrays, linked lists, trees and graphs. Databases, Sort,

search and traversal algorithms. Computing efficiency. P and NP computational

problems.

Topic 4 - Programming languages and compilers

Regular expressions, LR(k) grammars, BNF grammars. Lex and Yacc. Compiler

internals.

Topic 5 - Operating Systems

Basics of Operating systems and h/w-s/w interface. Study of Linux, Windows, Symbian.

Device drivers. Scheduling and resource management.

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Labs:

Tools used during laboratory works: Linux, Perl, Gcc,Gdb.

Study and implementation of Linux and Perl

Study and implementation of Gcc and Gdb

Study and implementation of data structures

Study and implementation of algorithms

Study and implementation of compilers

Study and implementation of operating systems

Course Project:


must be completed.

Course Material:






References:

C Programming Language (2nd Edition) by Brian W. Kernighan and Dennis M. Ritchie

Alfred V. Aho, John Hopcroft, Jeffrey D. Ullman: Data Structures and Algorithms.

Addison-Wesley 1986,

Alfred V. Aho, Ravi Sethi, Jeffrey D. Ullman: Compilers: Princiles, Techniques, and

Tools. Addison-Wesley 1986

Modern Operating Systems (3rd Edition) by Andrew S. Tanenbaum

http://www.amazon.com/Programming-Language-Second-2nd/dp/0131103628/ref=sr_1_1/180-2989004-7254107?ie=UTF8&s=books&qid=1276329186&sr=1-1

http://www.amazon.com/Brian-W.-Kernighan/e/B000AQ1TNQ/ref=sr_ntt_srch_lnk_1/180-2989004-7254107?_encoding=UTF8&qid=1276329186&sr=1-1

http://www.amazon.com/Dennis-M.-Ritchie/e/B000AQ6LVG/ref=sr_ntt_srch_lnk_1/180-2989004-7254107?_encoding=UTF8&qid=1276329186&sr=1-1

http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/a/Aho:Alfred_V=.html

http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/s/Sethi:Ravi.html

http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/u/Ullman:Jeffrey_D=.html

http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/a/Aho:Alfred_V=.html

http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/s/Sethi:Ravi.html

http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/u/Ullman:Jeffrey_D=.html

http://www.amazon.com/Modern-Operating-Systems-Andrew-Tanenbaum/dp/0136006639/ref=sr_1_3/178-4750151-3037758?ie=UTF8&s=books&qid=1276329246&sr=1-3

http://www.amazon.com/Andrew-S.-Tanenbaum/e/B000AQ1UBW/ref=sr_ntt_srch_lnk_2/178-4750151-3037758?_encoding=UTF8&qid=1276329246&sr=1-3

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VLES 5012 : Advanced Computer Architecture

Objective:

The main objectives of the course are

To study the modern computer organization by following the examples of Pentium 4,

Itanium 2, OpenSPARC T1 and T2, PowerPC and ARM processors

To study the virtual memory (paged and segmented) and multilevel cache memory

organization.

To study the organization of instruction pipelining.

To study the methods of input/output organization

Lecture:

UNIT I - Introduction & Performance measurement in computer architecture

Basic concepts of computer organization. The stored program model. Classes of computer

architecture. Processor vs. System architecture. Elements of computer systems – processors,

memories, I/Os, disks, buses etc.

Goals of computer architecture – performance, throughput, latency, power, cost. Processor

performance vs. system performance. Comparison of various platforms in terms of

performance and efficiency.

UNIT II- Processor Architecture

Internal elements and architecture of processors. Instruction execution. Instruction set

architectures, CISC vs. RISC architectures. Bus architecture. Multi Processor architecture.

Memories and Caches. Cache coherency. Pipelining and data path elements.

UNIT III - System and System on Chip architecture

System architecture elements. H/W component selection and datasheet analysis. Bill of

Materials. IP selection and System on Chip integration. Standard interfaces and I/Os. Analog

and Mixed signal element integration. Reset and clocking elements. Multi processor system.

UNIT IV - Special processor/system architecutes

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Application specific processors. Packet processing. Microcontrollers. Network controllers.

DSP and Multimedia processors. GPU elements.

UNIT V - Current Architectural survey

An overview of the latest Intel, ARM, TI, SPARC and Power PC architectures as modern

SOC architectural elements.

Lab :

Tools used during laboratory works: Linux, Perl, Gcc,Gdb.

Study and implementation of processor performance using opencores.

Study and implementation of performance of openSPARC and ARM / ARC processors.

Study and implementation of SOC architectures

Course Project:


must be completed.

Course Material:






References:

V.C. Hamacher, Z.G. Vranesic, S.G. Zaky. “Computer Organization”. 5th Edition.

“Peter”, 2003. 832p.

David A. Patterson and John L. Hennessy. Computer Organization and Design, Revised

Printing, Third Edition, Third Edition: The Hardware/Software Interface (The Morgan

Kaufmann Series in Computer. Series in Computer Architecture and Design). Morgan

Kaufmann; 3rd Edition. 2007. 741p.

Andrew S. Tanenbaum. Structured Computer Organization Prentice Hall; 5th Edition.

2005. 800p.

W. Stallings. “Computer Organization and Architecture. Designing and Performance”.

7th Edition. Prentice Hall. 2005. 792p.

J.L. Hennessy, D.A. Patterson. “Computer architecture: A Quantitative Approach”, 4th

Edition. Morgan Kaufmann, 2006. 704p.

UltraSPARC T1™ Supplement to the UltraSPARC Architecture 2005. Sun Microsystems.

2006

OpenSPARC™ T2 Core Microarchitecture Specification. Sun Microsystems. 2008

http://www.amazon.com/Computer-Organization-Design-Revised-Printing/dp/0123706068/ref=pd_bbs_sr_2/105-6914328-6638025?ie=UTF8&s=books&qid=1185183796&sr=8-2



http://www.amazon.com/Structured-Computer-Organization-Andrew-Tanenbaum/dp/0131485210/ref=pd_bbs_sr_4/105-6914328-6638025?ie=UTF8&s=books&qid=1185183796&sr=8-4

http://www.amazon.com/Structured-Computer-Organization-Andrew-Tanenbaum/dp/0131485210/ref=pd_bbs_sr_4/105-6914328-6638025?ie=UTF8&s=books&qid=1185183796&sr=8-4

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VLES 5013 : Designing with FPGA’s

Objective :

The main objective of the course is to introduce digital design techniques using field

programmable gate arrays (FPGAs). This will be followed by discussing FPGA architecture,

digital design flow using FPGAs, and other technologies associated with field programmable

gate arrays. The course study will involve lab projects to give students hands-on experience on

designing digital systems on FPGA platforms.

Lecture :

UNIT I :

Introduction to ASICs and FPGAs, Difference between ASICs, FPGAs and other

programmable logic devices, Fundamentals in digital IC design, FPGA Programming

Technologies, FPGA Logic Cell Structures, Basic FPGA technology (antifuse, RAM

based etc)

UNIT II :

Basic FPGA Design Flow – Design Entry : VHDL, Time model (Elmore delay), Area

model, Energy model, Synthesis, Clustering, Placement, Routing

UNIT III :

Optimization for FPGAs : Architecting Speed, Architecting Area, Architecting Power,

Clock Domains, Synthesis, Optimization, Optimizing Physical Design, PCB issues

UNIT IV :

FPGA Programmable Interconnect and I/O Ports, FPGA Implementation of

Combinational Circuits, FPGA Sequential Circuits, Timing Issues in FPGA Synchronous

Circuits, Introduction to Verilog HDL and FPGA Design flow with using Verilog HDL,

FPGA Arithmetic Circuits

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UNIT V :

FPGAs in DSP Applications, FPGA High-level Design Techniques, Programming

FPGAs in Electronic Systems, Latest Trends in Programmable ASIC and System Design

Lab :

The lab work will focus on relevant FPGA tools and will require students to use FPGA

technology to implement arithmetic circuits and for DSP applications.

Course Project:


must be completed.

Course Material:






References :

Wayne Wolf, "FPGA-Based System Design," Prentice Hall, 2004

Steve Kilts, “Advanced FPGA Design,” Wiley Inter-Science,

Xilinx User Manuals and Application Notes

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VLES 5004 : Digital VLSI Design II - Backend

Objective:

The study of IC design basics, levels, strategies, options, implementation methods, styles,

challenges, and trends especially back-end.

In the process of the laboratory work it is necessary to study the main IC design tools and to

implement the basic digital electronic circuits’ design flow.

Lecture:

UNIT I – Recap of Front-end flow and Logic Synthesis.

Recap Units II and IV of Course Digital VLSI Design I – Front-end.

UNIT II – Physical Design Setup and Floorplanning

VLSI Design Cycle, Methodology of Physical Design, Simplified Cycle of Physical IC

Design, Partitioning, Floorplanning, Placement, Routing, Compaction, Verification.

Logical libraries, Physical Libraries, Timing Constraints, Database format, Logical data

setup, Physical data setup, Technology Files, Interconnect delay models, tcl scripting for

automation.

Hierarchical Design Planning Flow, Pad Creation and Order Assignments, Core Area,

Initializing the Floorplan, Timing Driven Placement, Placement with Hierarchical

Gravity, Analyze placement and Color Modules, Post-initialization Macro placement

controls, Large Macro Handling, Power Network Synthesis (PNS), Power Network

Analysis (PNA).

UNIT III - Placement

Placement Methodology, Fast Iteration with Coarse Placement, Understanding the

Congestion Calculation, Textual Congestion Report, Analyzing the Congestion Map,

Global Route (GR) for Congestion Map, Strategies for Fixing Congestion Problems,

Congestion-Driven Placement Options, Adjusting Cell Density, Timing and Power

Optimization for Best QoR, Congestion-Driven Placement, Incremental Congestion

Refinement, Refinement Flow, Incremental mode, Area Recovery, Timing Analysis.

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UNIT IV – Clock Tree Synthesis

Design Status, Start of CTS Phase, Clock Tree Synthesis, CTS Goals, Define Clock Root

Attributes, Stop, Float and Exclude Pins, Generated and Gated Clocks , User-defined or

Explicit Stop Pins, Defining an Explicit Float Pin, Preserving Pre-Existing Clock Trees,

Impact of Preexisting Clock Cells, Logical Design Rule Constraints, Non-Default Clock

Routing, Specifying Non-Default Rules, Nondefault Rule Options, Effects of Clock Tree

Synthesis, Incremental Placement / Optimization, Analysis using the CTS GUI , Clock

Tree Optimization, Inter-Clock Delay Balancing, Post Route CTO.

UNIT V – Routing and Post Tapeout flow

Design Status, Start of Routing Phase, Grid-Based Routing System, Routing over

Macros, Pre-Route Checks, Routing Operations, Core Routing Strategy, Fixing DRC

Violations, Crosstalk-Induced Noise, Crosstalk-Induced Delay, Crosstalk Prevention,

Crosstalk Correction, Wire Sizing.

Labs :

Tools used during laboratory works: Design Compiler and IC Compiler.

Course Project:

A project of suitable complexity, comprising of RTL coding, Synthesis and complete netlist to

GDSII flow must be completed.

Course Material:






References:

Synopsys recommended course material and lectures.

J.P. Uyenmura. Introduction to VLSI Circuits and Systems, J.Wiley & Sons, 2002.

J.M. Rabaey, A. Chandrakasan, B. Nikolic. Digital Integrated Circuits - A Design

Perspective, Prentice Hall, 2003.

J.P. Uyenmura. Modern VLSI Design – System-on-Chip Design, Prentice-Hall, 2002.

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VLES 5005 : Embedded Systems Hardware Design

Objective:

The main objective of this course is to study and understand the concepts of embedded systems

and its hardware.

In the process of the laboratory work it is necessary, using schematic simulator tool to simulate

and check the circuits designed with respect to the laboratory task assignment, to draw and

analyze steady-state characteristics and transient processes, analyze the impact of process and

environment parameter variations on the circuit performance.

Lecture:

UNIT I: Introduction to Embedded Systems

Definition and Classification – Overview of Processors and hardware units in an

embedded system – Software embedded into the system – Complex System Design

Embedded Systems on a Chip (SoC) and the use of VLSI designed circuits

UNIT II: Microcontrollers and Processor Architecture

8051 architecture, Input / Output ports and circuits, External memory, Counter and

Timers, PIC Controllers, Interfacing Processor (8051, PIC), Memory Interfacing, I/O

devices, Memory Controller and Memory Arbitration schemes

UNIT III: Introduction to PCB Fabrication

The importance of interconnects. The basics. History and evolution. Component

selection. Bill of materials.

Specification and classification of PCBs. Techniques of layout design. Artwork

generation methods - manual and CAD. General design factor for digital and analog

circuits. Layout and artwork making for SS, DS and ML Boards. Design for

manufacturability. A review of specification design standards.

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Introduction to PCB technology. Anatomy of laminates, resins, reinforcing materials.

Phototool generation including screen preparation. Imaging techniques. PCB Fabrication

techniques-single, double sided and multilayers. Drilling operation-manual and CNC.

Etching: chemical principles and mechanisms. Plating operations manual and automated.

Post operations-stripping, black oxide coating and solder masking. PCB component

assembly processes. Environmental concerns in PCB industry.

UNIT IV: PCB Layout

Embedded Hardware & Firmware Design and Development Analog &Digital Electronic

components, VLSI & Integrated circuit design, Electronic Design Automation tools ,

PCB layout Design and its fabrication .Embedded firmware design approaches , Board

design theory and application, multi-layer PCB boards, signal integrity and noise

handling, auto-routing, manufacturing.

UNIT V: Hardware/Software Co-design

Co-design Methodologies; Code Generation for Rapid Prototyping; Power Consumption

Issues; Applications

Lab

Tools used during laboratory works: Encore or any other related tool.

Study of creating package symbols (schematic and layout).

Study of LVDS, SSTL PCB Layout guidelines.

Selective system design

Course Project:


must be completed.

Course Material:






References:

Rajkamal, Embedded Systems Architecture, Programming and Design, TATA McGraw-

Hill, First reprint Oct. 2003

Steve Heath, Embedded Systems Design, Second Edition-2003, Newnes,

David E.Simon, An Embedded Software Primer, Pearson Education Asia, First Indian

Reprint 2000.

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Wayne Wolf, Computers as Components; Principles of Embedded Computing System

Design – Harcourt India, Morgan Kaufman Publishers, First Indian Reprint 2001 Frank Vahid and Tony Givargis, Embedded Systems Design – A unified Hardware

/Software Introduction, John Wiley, 2002.

http://www.indiastudychannel.com/resources/35374-IT-EMBEDDED-SYSTEMS-Syllabus-Anna-University.aspx

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VLES 5006 : Analog and Mixed Signal IC Design

Objective :

The main objective of the course is to study analog integrated circuits features, design and

analysis methods of analog and mixed signal circuits.

.

Lecture:

UNIT I – Review of transistor operation, Single stage amplifiers, Differential amplifier

MOS I/V characteristics. Transistor second order effects. Small signal analysis. Small

signal model.Gain of common-source stage amplifier using small signal analysis.

Common-source stage with resistive load, diode-connected load, current-source load,

triode load, source degeneration. Source follower stage. Common-gate stage. Cascode

stages.Single-ended and differential operation. Basic differential pair.Common-mode

response. Differential pair with MOS loads. Gilbert Cell.

UNIT II - Current Mirrors, Response of Amplifiers, Noise characteristics

Basic and cascode current mirrors. Using active current mirrors as loads.

The Miller theorem. Frequency response of source follower, common-gate amplifier,

cascode stage, differential pair.Noise characteristics. Noise types: thermal noise, flicker

noise. Representation of noise in circuits. Properties of feedback circuits. Feedback

Configurations. Effect of loading in feedback.

UNIT III - Operational amplifiers

Operational amplifier’s performance parameters. One-Stage Op Amps. Two-Stage Op

Amp. Op Amps Gain Boosting. Op Amps Common-Mode Feedback. Op Amps Input

Range Limitation: unity-gain buffer, extension of input CM range, variation of equivalent

transconductance with the input CM level. Op Amps Slew Rate. Noise in Op Amps and

Power Supply Rejection.Stability and Frequency compensation.

UNIT IV - Bandgap References, Switched-capacitor circuits, Nonlinearity

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Supply-independent biasing. Temperature- independent references: negative-TC voltage,

positive-TC voltage, bandgap reference. PTAT current generation. Speed and noise

issues. Continuous-time feedback amplifier using resistors, capacitors, switched-capacitor

amplifier in sampling mode, amplification mode, transfer of capacitor’s charges.

Sampling switches. Switched-capacitor amplifiers. Switched-capacitor integrator.

Nonlinearity. Mismatch. Ring oscillators. LC oscillators. Voltage-controlled oscillators.

Mathematical models of VCOs.

UNIT V- Phase-locked loops, Data converters, charge-coupled devices (CCD)

Simple PLL.Charge-pump PLLs.Non ideal effects in PLLs: PFD/CP non idealities, jitter

in PLLs.Delay-locked loops.PLL applications. Analog versus discrete time signals.

Sample and hold characteristics.ADC and DAC specifications.DAC architectures.ADC

architectures. Sampling and aliasing, Quantization noise & Data converter SNR. CCD

imaging and architecture.

Labs:

Tools used during laboratory exercises are Custom Designer, WaveView and HSpice.

Course Project:

A project of suitable complexity including Analog design of a circuit, simulation and analysis

must be completed.

Course Material:






References:

1. R.J. Baker, H.W. Li, D.E. Boyce. CMOS. Circuit design, Layout, and Simulation (2nd

Edition), 2005. 1038p.

2. P. Horowitz, W. Hill, Electronic Circuit Design: Art and Practice, 2001. 192p.

3. B. Razavi, Design of Analog CMOS Integrated Circuits, 2000. 684p.

4. R.J. Baker, CMOS Mixed-Signal Circuit Design, 2002. 502p

5. B. Razavi. Principles of Data Conversion System Design. 1994. 272P

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VLES 5014 : Protocols and Interfaces

Objective:

The study of architectural elements, performance metrics and system architecture of computer

systems with a focus on interfaces and protocols.

In the process of the laboratory work it is necessary to use and study standard and emerging

architectures.

Lecture:

UNIT I - Introduction (Recap)

Basic concepts of computer organization. The stored program model. Classes of

computer architecture. Processor vs. System architecture. Elements of computer systems

– processors, memories, I/Os, disks, buses etc.

UNIT II - Data Processing in Microcontrollers

Programs based on data transfer, arithmetical, logical, branching, bit (Boolean) operation

instructions.

UNIT III - Organization communications of Microcontroller with the object of control

Data Transfers between On-chip hardware Microcontroller and peripheral Units. Signal

processing and conditioning. Timing Function conditioning. Software conversion of

codes. Software support of A/D and D/A Converters.

UNIT IV - Interfacing with Microprocessor Systems

Organization communications of Operator with Microcontroller. Keyboard and Display

interfacing. Input/ output enhancement mode

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UNIT V- Protocols

Types of memory interfaces – SRAM, DRAM, Flash, EPROM/ROM and corresponding

protocols.

Types of Disk protocols – SATA, IDE, SCSI

Special memories – Video RAMs, RDRAM, CAM

Interrupt controllers, priorities and arbitration. ISRs and context saving architectures.

Programmable interrupt controller

PCI, USB, 1394, Ethernet, 802.11x, PCI Express, ACPI

Bridge functions

Storage area networks and protocols

Labs :

Tools used during laboratory works: Linux, Perl, Gcc,Gdb, VCS

Study and implementation of interfacing exercises.

Study and implementation of performance of memory systems and their impact on

system performance

Study and implementation of Standard interfaces

Course Project:


must be completed.

Course Material:






References:

Computer Architecture, A Quantitative approach by D.Patterson and J. Hennessy

Computer Organization by D. Patterson and J.Hennessy

Bus Specifications – PCI, PCIe, SCSI, IDE, USB, 802.11x, SATA

http://www.amazon.com/Programming-Language-Second-2nd/dp/0131103628/ref=sr_1_1/180-2989004-7254107?ie=UTF8&s=books&qid=1276329186&sr=1-1

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VLES 5015 : Design For Testability

Objective:

The main objectives of the course are to study the basics of VLSI design with embedded test

circuits and to study the principles of design, analysis and simulation of self-testable digital IC.

Lecture:

UNIT I - Introduction

The need for testing, Fabrication, Assembly and Test Process Flows.

UNIT II – Scan Testing

Using additional primary inputs and outputs to improve controllability and observability,

Scan-based testing. Design rules, Ways to overcome rule violations. Automated Test

Pattern Generation for scan testing. Scan test protocol, Full-scan and partial scan,

Automated scan design systems, Scan design flow, Scan design overhead: area, timing,

power considerations.

UNIT III - Built-in self testing (BIST)

BIST architecture, Test compression methods, Random and weighted random pattern

testability, BIST Pattern generator and response analyzer, Theory of Linear feedback

shift registers (LFSR), Generating test vectors and Signature analysis, Scan-based BIST

architecture, Built-in Logic Block Observation (BILBO), Test point insertion for

improving random testability, Memory IC BIST and Built-In self repair.

UNIT IV - Boundary Scan Testing

Boundary scan technique. JTAG standard (IEEE 1149.1), Application of Boundary scan

for PCB testing, Boundary scan instructions, Boundary Scan Description Language

(BCDL), Boundary scan Test access port (TAP), TAP controller, Boundary scan

instructions, Instruction register, Test data register. Boundary scan register, TAP

controller state diagram, Testable design flow, Using Boundary scan TAP for IC internal

circuit testing.

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UNIT V : Boundary Scan Testing II

Boundary scan instructions, Instruction Register, Test Data register. Boundary scan

register, TAP, controller state diagram, Testable design flow, Using Boundary scan TAP

for IC internal circuit testing

Labs:

The labs will include:

Introduction to Design Vision

Study of scan testing in DFT Compiler environment

Test pattern generation in TetraMax ATPG

Tools used during laboratory exercises are VCS, Design Vision, TetraMax and DFT Compiler.

Course Project:


must be completed.

Course Material:






References:

B. Friedman. Digital Systems Testing and Testable Design. Jaico Publishing House. 2005.

670p.

M. L. Bushnell and V. D. Agrawal. Essentials of Electronic Testing, Kluwer Academic

Publishers, 2000, 709p.

M. Abramovici, M.A. Breuer, A.D. Friedman. Digital Systems Testing and Testable

Designs. 1998.

Neil H.E. Weste, K. Eshraghian. Principles of CMOS VLSI Design. Addison Wesley; 2

edition, 1994. 735p.

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VLES 5016 : Standard Cell Library and Memory Design

Objective:

The study of IC standard cell elements, memory types, memory failures, memory and cell

characterization and testing.

In the process of the laboratory work it is necessary to study the main IC design tools and to

implement electronic circuits in the form of standard cells and memories. .

Lecture:

UNIT I– Introduction

IC design flows. Use of standard cell elements vs. custom design and Gate array paradigms.

Introduction to memory types and construction of memory elements.

UNIT II - Standard cell library composition and usage

Types of standard cell elements. Logical and functional elements, primitives and complex

macros. Sequential elements and register files. (Flip flop and latch design). Data path elements.

Library size vs. usage in standard flows. Drive strength and cell families. Layout of library

elements – single height, double height cells. Power Management cells.

UNIT III - Standard cell characterization

Usage of standard cells by various tools. Information needed at each stage of design flow.

Characterization parameters, setup and runs across PVT corners. Library representation formats.

(Gate level simulation, synthesis, timing, layout, timing, LVS, DRC)

UNIT IV - Memory elements and array design.

Volatile and Non-volatile RAM, ROM,EPROM, Flash (EEPROM), OTP elements and cell

design. State retention volatile memories. Array design – architecture, bitline/wordline

optimization, sense-amps and mux/demux architecture. Memory banking, refresh cycle

management. Multi-port memories. Cache memories. Special memories such as CAMs.

UNIT V– Memory defects, failures and testing, layout and characterization

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Memory defects and repair. Temporal failures, Soft errors. Membist and other test techniques for

memories.

Memory layout and its impact on performance. Characterization of memories – timing, area,

power parameters. Layout views – hard macro representation, keep outs and congestion impact.

Lab :

Tools used during laboratory works: EDA tools using Synopsys EDK 90nm library.

Study and implementation of standard cell library element

Study and implementation of small register file from standard cell

Study and implementation of memory element (SRAM 6 T cell)

Study and implementation of memory array (SRAM)

Course Project:


must be completed.

Course Material:






References:

Synopsys, ARM, TSMC standard cell and memory library documentation

Synopsys 90nm EDK library

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VLES 5017 : RTOS, Kernels and Device Drivers

Objective:

The study of embedded systems architecture, hardware-software abstraction, resource allocation,

software stacks, Real time Systems and operating systems internals.


development kit platforms for OS development.

Lecture:

UNIT I– Introduction

Embedded System Architecture fundamentals. Hardware and Software abstraction

models. Operating Systems fundamentals. Real time OS overview.

UNIT II- RTOS Fundamentals

Study of Real time OS principles and requirements. Application specific requirements.

Throughput and latency requirements. Schedulers, tasks and processes. Memory

management. Code and footprint optimization. Study of current and emerging RTOS.

UNIT III - OS internals and Kernels

Internal components of Operating systems. Study, compare and contrast of various OS

platforms. Unix/Linux kernel fundamentals. I/O devices, file systems and peripheral

devices.

UNIT IV - Device drivers

Fundamentals of device drivers, device enumeration and configuration. Data transfer and

management mechanisms.

UNIT V-- Device drivers II

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Wired and wireless connectivity of devices. Power Management and its impact on device

management. Compliance to protocols.

Lab

Tools used during laboratory works: Keil, Cypress PSoC, Windows Mobile, Linux, VxWorks,

Symbian platforms.

Study and implementation of RTOS

Study and implementation of kernel modification

Study and implementation of device driver development

Course Project:


must be completed.

Course Material:






References:

Product documentation from ARM (KEIL), Cypress, Windows Mobile, VxWorks,

Symbian.

Bus Specifications – Bluetooth, USB, 802.11x

Standards specifications – JPEG, MPEG etc. as required


content is rapidly changing and an up to date text book at the time of the class may

be recommended.

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VLES 5018 : Wireless Technology for Embedded Systems

Objective :

The main objective of the course is to enable students to understand the computing principles in

emerging technologies and applications for embedded systems with special focus on wireless

technologies and Wireless Sensor Networks (WSN). The course addresses tradeoff

considerations of bandwidth, cost and power among the three wireless technologies - Bluetooth,

WiFi and ZigBee.

Lectures :

UNIT I :

Review of C Programming, Data Structures , Introduction to UML , Software Life Cycle

Models , Embedded Systems Design, Implementation and Testing , Overview of

Networking and Packet Switching Concepts, OSI Reference Model and TCP/IP Protocol

Suite, LAN Protocol Suite

UNIT II :

Evolution of Wireless Communication - Radio architectures: TRF, single conversion, and

dual conversion, and IQ; Modulation - AM, FM, SSB, TDMA, CDMA, OFDM, QPSK;

PLL – phase lock loops, Wireless Standards – IS136, IS95, 802.11(a-g), GSM, 3G,

WiMax, Antennas and Propagation with an introduction to the Smith Chart

UNIT III :

Embedded Systems – Hardware, Software, Internet Access; Development and Debugging

Tools - Simulators, ICE, C Compiler; RTOS – System Services, Interrupt Handling, Real

Time, Scheduling; Socket Programming – Internet Architecture, UDP, TCP,

client/server; Internet Application Protocols – HTTP, FTP, SNMP, Audio/Video

Applications

UNIT IV :

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Embedded systems hardware and software interfaces; Protocol Debugging & Testing

Tools – PING, Sniffers, Load Generators; Development tools – SDK, simulators,

debuggers; TCP/IP – architecture, socket programming and debugging

UNIT V :

Wireless Technologies and Mobile Programming - Wireless LAN : 802.11 & WiMAX,

RFID & Bluetooth, GSM & GPRS, Mobile Development Platforms (Android, Symbian,

OpenMoko, J2ME), Bluetooth – architecture, protocols, implementation, and

programming API; WiFi – architecture, protocols, implementation, and API; ZigBee –

architecture, protocols, implementation, and API

Course project :

A project of reasonable complexity that is relevant to Embedded Systems Design must be

completed

Course Material:






References :

Embedded Systems and Wireless Technology: Theory and practical applications by

Dr. Raúl Aquino santos, MSc. Arthur Edwards Block (University of Colima, Mexico)

Fundamentals of Mobile and Pervasive Computing by Frank Adelstein, Sandeep K.S.

Gupta, Golden G. Richard III, and Loren Schwiebert, Publisher: McGraw-Hill Education,

2005, ISBN-10:0071412379, ISBN-13: 978-0071412377.

Context-Aware Pervasive Systems: Architectures for a New Breed of Applications by

Seng Loke, Publisher: AUERBACH, 1st edition (December 7, 2006), ISBN-10:

0849372550, ISBN-13: 978-0849372551

Cooperating Embedded Systems and Wireless Sensor Networks by Michel Banatre

(Editor), Pedro Jose Marron (Editor), Anibal Ollero (Editor), Adam Wolisz (Editor)

http://www.wiley.com/WileyCDA/WileyTitle/productCd-1848210000.html

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VLES 5019 : Crosstalk and Noise

Objective:

The main objectives of the course are to study the transmission line theory and to study crosstalk

and noise basics

Lecture:


High speed design. Signal representation. Rise time and circuit length. Conductive Path. The

interconnect budget.

UNIT II - Transmission line theory

Ideal transmission line. Wave propagation. Transmission line parameters . Cross section of a

micro strip transmission line. RLCG model. Characteristic impedance. Available two-

dimensional electromagnetic field solvers. Propagation Velocity, Time, and Distance. Nonideal

line losses. Transmission line losses. Skin Effect. Serpentine Traces. Simultaneous switching

noise.

UNIT III -- Reflections

Impedance and Reflections. Multiple Reflections. Lattice Diagram Analysis. Effect of Rise Time

on Reflection. Multiple line impedances. Reflections from a Reactive Loads. Reflections from a

Reactive Loads.

UNIT IV - Crosstalk and noise

Crosstalk configuration. Mutual Inductance and Mutual capacitance. Crosstalk-Induced Noise.

Simulating Crosstalk . Crosstalk-Induced Flight Time and Signal Integrity Variations. Effect of

Switching Patterns on Transmission Line Performance. Odd Mode. Even mode . Crosstalk

Trends. Minimization of crosstalk.

UNIT V - Clock Distribution Networks

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Clock Distribution. Clock Skew. Clock Power. Clock Area. Technology Trends

Labs:


Lattice diagram analysis of transmission line system with multiple line impedance

Dependence of crosstalk glitch from the number of segments in distributed RC line

Dependence of settling time from the input signal slope

Course Project:


must be completed.

Course Material:






References:

R.Singh. Signal Integrity Effects in Custom IC and ASIC Designs. J. Wiley, 2001.

B. Young. Digital Signal Integrity. Prentice Hall, 2001.

F. Moll, M. Roca. Interconnection Noise in VLSI Circuits. Kluwer, 2004.

A. V. Mezhiba, E. G. Friedman. Power Distribution Networks in High Speed Integrated

Circuits Kluwer, 2004.

M. Celik, L. Pileggi, A. Odabasioglu. IC Interconnect Analysis Kluwer, 2002.

C-K. Cheng, J. Lillis, S. Lin, N. H. Chang. Interconnect Analysis and Synthesis J. Wiley,

2000.

J. A. Davis, J. D. Meindl. Interconnect Technology and Design for Gigascale Integration

Kluwer, 2003.

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VLES 5020 : Mobile Applications Development

Objective:

The study of embedded systems architecture, mobile system constraints and application

development.


development kits or developer suites for mobile platforms for OS development.

Lecture:

UNIT 1 – Introduction

Survey of prominent mobile platforms – smart phones, camera/camcorder devices, Tablet

devices, automotive.

UNIT II

Energy/Power Management in mobile systems. Mobile OS and developer packages

overview.

UNIT III – Developer environments

Study of iPhone, iPad, Windows Mobile (HTC), Android (Google, Motorola) platforms.

UNIT IV

Study of Automotive platforms.

UNIT V – Actual Application Development

This course is focused on getting the students to actually develop an application on a

target mobile device. The students must download the environment, develop and

demonstrate an actual application on a mobile device.

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Course Project:


must be completed.

Course Material:






References:

iPhone/iPad developer manuals

Android developer manual

Standards specifications – JPEG, MPEG etc. as required


content is rapidly changing and an up to date text book at the time of the class may be

recommended.

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VLES 5021 : Digital Signal Processing

Objective:

The goal of the course is to teach graduate students the concepts of digital signal processing,

frequency domain representations of discrete-time signals using discrete-time Fourier transform,

the discrete Fourier transform, fast Fourier transform and z-transform in a very practical manner

The main objectives of the course are:

To study digital filter design methods.

To learn and use the Matlab program system for investigating and designing digital filters

as a part of laboratory exercise.

Lecture:

UNIT I - Signals and Signal processing

Classification of signals; Examples of typical signals; Signal applications; Causality, Stability.

Discrete time signals; The sampling process; Characterization of linear time-invariant systems;

Convolution and its properties; Difference equations.

UNIT II - The Discrete Fourier Transform

The discrete-time Fourier transform; Discrete Fourier transform and its properties; Linear

convolution; Fast Fourier transform; z-transform and inverse z-transform.

UNIT III - Linear Time-Invariant Discrete Systems in the Transform Domain

Finite dimensional discrete systems; Transfer function; Simple digital filters; Inverse systems;

Linear phase filters; Chebyshev’s theorem, Remez algorithm.

UNIT IV - Digital Processing of Continuous-Time Signals

Sampling of continuous-time signals; Paley-Wiener theorem; Nyquist frequency; Kotelnikov-

Shenon’s theorem; Analog low pass filter design; Design of analog high pass; Band pass and

band shop filters; Analog - to - digital converter; Digital- to-Analog converter.

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UNIT V - Digital Filter Structures

Block diagram representation; Basic finite and infinite impulse response (FIR & IIR); Digital

filter structures; All pass filters; IIR tapped cascaded lattice structure; FIR cascaded lattice

structure; Digital sine-cosine generator.

Preliminary considerations; Bilinear transformation method of IIR filter design; Design of low

pass; High pass; Band pass; Band shop IIR digital filters; Spectral transformations of IIR digital

filters; FIR filter design based on Windowed Fourier series; Design of FIR digital filters with

least-mean-square error; Digital IIR filters design; Analog filters - Bessel, Butterworth,

Chebyshev, elliptic filters.

Labs:

Matlab/Octave/Python package tools are used and applied during laboratory exercises.

Units include:

Discrete-time IIR filter design

Analog filter design (Butterwoth, Chebyshev, Elliptic Lowpass Filters)

Analog-to-digital lowpass transformations

Frequency-band transformations

Discrete-time FIR filter design

Window design technique

Optimal equiripple design technique for linear-phase FIR filters

Course Project:


must be completed.

Course Material:






Ver 1.0 40

References:

Sanjit K. Mitra. Digital Signal Processing. 2nd edition. McGraw Hill. 2001.

M.H. Hayes. Digital Signal Processing, Shaum’s Outlines. McGraw Hill. 1999.

V.K. Ingle. J.G. Proakis. Digital Signal Processing using Matlab. Brooks/Cole. Thomson-

Engineering; 2nd edition. 2006.

L. R. Rabiner, B. Gold. Theory and Application of Digital Signal Processing. Prentice-

Hall, New Jersey, 1975

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VLES 5022 : Image Processing

Objective:

The study of Image processing principles and implementation in an IC or System. In the process

of the laboratory work it is necessary to study the main Image processing standards, platforms

and to implement algorithms either in an IC design or embedded system design.

Lecture:

UNIT I – Fundamentals of Image Processing and Image Transforms

Basic steps of Image Processing System Sampling and Quantization of an image – Basic

relationship between pixels Image Transforms: 2 D- Discrete Fourier Transform, Discrete

Cosine Transform Wavelet Transforms: Continuous Wavelet Transform, Discrete

Wavelet Transforms.

UNIT II – Image Processing and Image Compression Techniques

Image Enhancement. Spatial domain methods: Histogram processing, Fundamentals of

Spatial filtering, Smoothing spatial filters, Sharpening spatial filters. Frequency domain

methods: Basics of filtering in frequency domain, image smoothing, image

sharpening, Selective filtering. Image Segmentation Segmentation concepts, Point, Line

and Edge Detection, Thresholding, Region Based segmentation.

Image compression fundamentals - Coding Redundancy, Spatial and Temporal

redundancy, Compression models: Lossy & Lossless, Huffman coding, Arithmetic

coding, LZW coding, Run length coding, Bit plane coding, Transform coding, Predictive

coding, Wavelet coding JPEG Standards.

UNIT III – Basic steps of Video Processing

Analog Video, Digital Video. Time-Varying Image Formation models: Three-

Dimensional Motion Models, Geometric Image Formation, Photometric Image

Formation, Sampling of Video signals, Filtering operations.

UNIT IV – 2-D Motion Estimation

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Optical flow, General Methodologies, Pixel Based Motion Esimation, Block- Matching

Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based

Motion Estimation, Multi resolution motion estimation, Waveform based coding, Block

based ransform coding, Predictive coding, Application of motion estimation in Video

coding.

UNIT V – Commercial image acquisition and projection systems

Study of OMAP, DLP, CCD and other devices in the market. 3-D TV and other

emerging applications.

Lab :

Tools used during laboratory works: VCS, Design Compiler, ICC, Primetime, PrimePower,

Matlab,TI or other Laboratory kits, gcc, gdb.

Study and implementation of various algorithms and transforms.

(The implementation may be done either in VLSI domain or embedded systems domain. Student

must choose a platform on which standard algorithms and transforms can be executed.)

Course Project:


must be completed.

Course Material:






References:

TI documentation on DSP/OMAP platforms.

Documentation manuals on DLP, 3-D TV and other projection systems

Digital Image Processing – Gonzaleze and Woods, 3rd ed., Pearson.

Video processing and communication – Yao Wang, Joem Ostermann and Ya–quin

Zhang. 1st Ed., PH Int.

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VLES 5023 : Low Power Design-SOCs and Systems

Objective:

The main objectives of the course are to study CMOS low power IC designs, modeling and

optimization basics and to understand the approach to power consumption estimation and to

study different methods of reducing switching and leakage power.

Lecture:


The transistor revolution. Advances in IC technologies. Electronic technology today.

Moore’s law. Die size scaling. Frequency scaling. Design challenges in deep submicron

MOS.Power dissipation. Power density. Supply voltage scaling. Scaling impact on supply

current. Supply voltage scaling impact on delay. Power consumption and battery capacity

trends.

Components of power: switching power, short circuit power, leakage power and static

power.Switching power. Charging of a capacitor. Total energy per charging transition

from power supply. Short-circuit energy per transition. Short circuit power versus

capacitance. Rise time and capacitance. Technology scaling impact on short circuit

current.The signs of crisis. Leakage definition. Leakage components. Pn junction reverse-

bias current. Band-to-band tunneling current. Gate leakage. Subthreshold leakage

UNIT II - Batteries to Low Power Design

Low power circuit design importance. Application areas for low-power electronics.

Power sources for low-power devices. Classes of batteries. Non-rechargeable batteries.

Rechargeable batteries. Energy density of common fuels. Battery types classification of

application. Classification of battery types by application. Non-idealities of batteries.

Typical battery energies. Other power sources for low-power systems. Advantages of

low-power design.

UNIT III - Dynamic Power Reduction Techniques

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Dynamic power reduction techniques: transition probability minimization, glitch

reduction, supply voltage reduction, clock gating, multi-supply design, dynamic voltage

and frequency scaling. Transition probability minimization: transition probabilities for

some basic gates, inter-signal correlations, logic restructuring, input ordering.Glitching in

static CMOS networks. Balanced delay paths to reduce glitching. Supply voltage

reduction, power versus voltage, delay versus voltage. Clock gating. Multi-supply design:

multiple VDD considerations, optimum numbers of supplies, dual-supply inside a logic

block, level shifters, distributing multiple supply voltage: conventional and shared-well.

Dynamic power management vs. Dynamic voltage and frequency scaling. Choosing a

frequency in DVFS. Total system energy variation in DVFS.

UNIT IV - Leakage Power Reduction Techniques

Leakage power reduction techniques: multiple threshold, transistor stacking, input vector

control, sleep transistor, variable threshold technique.Multiple threshold technique, dual

threshold CMOS, using multiple thresholds.Transistor stacking, self-reverse biasing,

leakage control stacking.Input vector control: influence on subthreshold, gate, BTBT and

total leakage.Sleep transistor technique: multi-threshold CMOS (MTCMOS), boosted-

gate MOS (BGMOS), sizing of the sleep transistor, super cut-off CMOS (SCCMOS),

zigzag super cut-off CMOS (ZSCCMOS).Variable threshold technique: variable

threshold CMOS (VTCMOS), VTCMOS versus MTCMOS, dynamic Vth scaling

(DVTS), dynamic threshold CMOS (DTMOS), double gate dynamic threshold (DGDT)

SOI CMOS.

UNIT V - Low Power Logic Styles

Advantages and disadvantages of static CMOS.Low-power logic styles: Pass-Transistor

Logic (PTL), Complementary Pass-Transistor Logic (CPL), Pseudo-NMOS Logic,

Dynamic Logic, Domino Logic, Adiabatic Logic.Pass-Transistor Logic. Ways to reduce

leakage in PTL. Level restoration.CPL: Complementary Pass-Transistor Logic.Pseudo-

NMOS Logic. Negative aspects of pseudo-NMOS.Dynamic logic. Characteristics of

dynamic CMOS. Logic activity. Charge leakage. Problems with dynamic CMOS.Domino

Logic. Selecting a logic style.Adiabatic Logic. Power saving and energy recovery.

Charging with constant current, charge in N steps. Adiabatic dynamic CMOS inverter

Quasi-Adiabatic Logic. Technology distribution. Power and area analysis

Labs:


Study of how to build necessary files for a digital cell.

Study and research of various modern power reduction techniques

Tools used during laboratory exercises are Hspice, CosmosSE, CScope, CGuid

Ver 1.0 45

Course Project:


must be completed.

Course Material:






References:

Chandrakasan, R. Brodersen. Low Power Digital CMOS Design. Springer; 1 edition.

2006. 428p.

C. Piguet. Low-Power CMOS Circuits: Technology, Logic Design and CAD Tools. CRC.

2005. 440p.

A. Bellaouar, M. Elmasry. Low-Power Digital VLSI Design: Circuits and Systems.

Springer; 1 edition. 2006. 556 p.

K.S. Yeo, S.S. Rofail, W.L. Goh. CMOS/BiCMOS VLSI: Low Voltage, Low

Power. -Prentice Hall, 2002. 624p.

K. Roy. Low-Power CMOS VLSI Circuit Design. - John Wiley & Sons Inc, 2003. 320p.

Low Power Methodology Manual, D. Flynn et al, Synopsys

Verification Methodology Manual for Low Power, S. Jadcherla, et al. Synopsys

http://www.amazon.com/exec/obidos/search-handle-url/103-5798952-7513405?%5Fencoding=UTF8&search-type=ss&index=books&field-author=Anantha%2C%20P.%20Chandrakasan

http://www.amazon.com/exec/obidos/search-handle-url/103-5798952-7513405?%5Fencoding=UTF8&search-type=ss&index=books&field-author=R.%2C%20W.%20Brodersen

http://www.amazon.com/exec/obidos/search-handle-url/103-5798952-7513405?%5Fencoding=UTF8&search-type=ss&index=books&field-author=Christian%20Piguet

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VLES 5024 : Technical Writing, Presentation and IP

Objective:

The main objective of the course is to teach technical and business writing, including skills for

IC design documentation creation

Lecture:


Fundamentals of clear and concise writing. Analysis of technical documents, manuals etc.

Overview of intellectual property.

UNIT II - Comprehension and writing

Book reports – structure, protagonist, antagonist, plot, rising action and climax.

Business writing – grants, proposals, letters.

Technical documentation – definition of terms, indexing, structure and clarity elements.

UNIT III - Presentation Skills

Making concise and clear presentations.

Speaking skill, grammar and pronunciation.

Tone and eye contact.

Handling friendly and hostile audience members.

UNIT IV - Intellectual Property

Patents, copyrights and trademarks.

Process and Method patents.

IP litigation case studies.

Protecting a new venture’s intellectual property and ethical handling of intellectual

property.

UNIT V-Technical Reading

Ver 1.0 47

Study of Data sheets,Technical Manuals,Product/Architecture Plan

Labs:

Study and implementation of book reports

Study and implementation of presentations

Study and implementation of technical manuals

Study and implementation of patents

Tool used during laboratory exercises : OpenOffice.org or MS-Office.

Course Project:


must be completed.

Course Material:

To keep up to date with the latest research, technology and industry trends, Instructor for this

course will decide and provide the course material. This could be a combination of slides or

research material or text book references or any other relevant documentation depending on a)

the nature of the curriculum and b) relevant skills to be imparted as outcome of the course.

References:

H. Solveig, J. Floyd. OpenOffice.org Resource Kit. Prentice-Hall PTR. 2003. 1040p.

L. Gurdy, E. Finkelstein, M. Leete. OpenOffice.org for Dummies. Wiley Publishing.

2004. 361p.

R. Whittle. Book design with OpenOffice. 2002.

http://www.amazon.com/exec/obidos/search-handle-url/index=books&field-author=Gurdy%20%20Leete/103-3192413-6482205

http://www.amazon.com/exec/obidos/search-handle-url/index=books&field-author=Ellen%20%20Finkelstein/103-3192413-6482205

http://www.amazon.com/exec/obidos/search-handle-url/index=books&field-author=Mary%20%20Leete/103-3192413-6482205

me gtu curriculum

Documents

recommend

seer akademi

variable threshold

input vector

relevant documentation

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fast fourier

seminar total