lt spice experiments

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VLSI LAB ASSIGNMENT QUESTIONS 1. Extract the Vt of NMOS and PMOS transistor from Vgs Vs Id characteristics and estimate the variation in Vt with variation in Vbs. The variation is between +Vdd and –Vdd and establish a relation between Vbs and Vt. Solution: Vt of NMOS CIRCUIT DIAGRAM STEPS (1) Choose nMOS and right click and pick New MOSFET tab and select IRLML6346. (2) Select voltage sources for Vgs and Vdd. (3) Set DC value of 5V to Vdd. (4) From simulate tab, select edit simulation Cmd .

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some ltspice exps

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VLSI LAB ASSIGNMENT QUESTIONS

1. Extract the Vt of NMOS and PMOS transistor from Vgs Vs Id

characteristics and estimate the variation in Vt with variation in Vbs. The

variation is between +Vdd and –Vdd and establish a relation between Vbs

and Vt.

Solution:

Vt of NMOS

CIRCUIT DIAGRAM

STEPS

(1) Choose nMOS and right click and pick New MOSFET tab and select

IRLML6346.

(2) Select voltage sources for Vgs and Vdd.

(3) Set DC value of 5V to Vdd.

(4) From simulate tab, select edit simulation Cmd .

(5) On DC sweep tab select 1st source as V2 with start value :0, stop value :5

and increment 0.1.

(6) Run the file.

OUTPUT

(1) Right click on plot and select Id from add trace.

(2) Place the cursor on the plot at the point where Id starts to increase from zero.

RESULT:

Vt of NMOS obtained is 1.053V

Vt of PMOS

The same procedure can be repeated for finding Vt of PMOS

CIRCUIT DIAGRAM

RESULT :

Vt of PMOS obtained is -0.905V .

Relation between Vt and Vbs of NMOS

(1) Choose nMOS4.

(2) Select voltage sources for Vgs, Vbs and Vdd.

(3) Set DC value of 3V to Vdd.

(4) From simulate tab, select edit simulation Cmd .

(5) On DC sweep tab select 1st source to sweep as V2 with start value :-3, stop

value :5 and increment 0.1. Select 2nd source to sweep as V1 with start value

:-3, stop value :3 and increment 1.

(6) Run the file.

CIRCUIT DIAGRAM

OUTPUT

(1) Right click on plot and select Id from add trace.

(2) Place the cursor on the plot at the point where Id starts to increase from zero.

RESULT:

Vt varies as -2.7, -1.7, -0.7, 0.25, 1.25, 2.25 V as Vbs is varied from -3 to 3

in steps of 1V.

Relation between Vt and Vbs of PMOS

(1) Choose pMOS4.

(2) Select voltage sources for Vgs, Vbs and Vdd.

(3) Set DC value of -3V to Vdd.

(4) From simulate tab, select edit simulation Cmd .

(5) On DC sweep tab select 1st source to sweep as V1 with start value :-3, stop

value :5 and increment 0.01. Select 2nd source to sweep as V2 with start

value :-3, stop value :3 and increment 1.

(6) Run the file.

CIRCUIT DIAGRAM

OUTPUT

(1) Right click on plot and select Id from add trace.

(2) Place the cursor on the plot at the point where Id starts to increase from zero.

RESULT:

Vt varies as -2.2, -1.2, -0.2, 0.6, 1.6, 2.6 V as Vbs is varied from -3 to 3 in

steps of 1V.

2. Estimate and plot transconductance of nmos and pmos transistors for Vds

and Vgs variations.

Solution:

Transconductance of nmos

Circuit Diagram

Steps:

(1) Choose nmos-IRLML6346.

(2) Connect two voltage sources for gate and drain respectively.

(3) Set Vds=3V and vary Vgs from 0 to 1.3V.

(4) Obtain the plot-Id vs Vgs.

(5) Plot transconductance using the same plot by using the formula

�� =�(��)

�(���)

(6) Now set Vgs=1.3V and vary Vds.

(7) Plot Id vs Vds graph and obtain transconductance.

Output:

gm_Vgs

gm_Vds

Transconductance of pmos

Circuit Diagram

Steps:

(1) Choose pmos-IRF7404.

(2) Connect two voltage sources for gate and drain respectively.

(3) Set Vds=-20V and vary Vgs from -5 to 0V.

(4) Obtain the plot-Id vs Vgs.

(5) Plot transconductance using the same plot by using the formula

�� =�(��)

�(���)

(6) Now set Vgs=-2.5V and vary Vds.

Plot Id vs Vds graph and obtain transconductance.

Outputs:

gm_Vds

gm_Vgs

(3) Design a CMOS inverter and simulate the circuit.

Solution :

CIRCUIT DIAGRAM

STEPS

(1) Choose nmos , pmos, voltage sources for Vin and Vdd and wire them as

shown in the circuit diagram.

(2) Set DC value of 5V to Vdd.

(3) From simulate tab, select edit simulation Cmd.

(4) On DC sweep tab select 1st source as V1 with start value :0, stop value :5

and increment 0.01.

(5) Run the file to obtain transfer characteristics of the inverter.

(6) Transfer characteristics can be obtained by placing the probe on the output

node.

(7) To obtain the transient response, from simulate tab, select edit simulation

Cmd.

(8) On transient tab give stop time 10, time to start saving data 0 and maximum

time step 1.

(9) Give a pulse input to V1 by right clicking on V1,selecting advanced options

and selecting pulse input. Give Von as 5, Ton as 0.5, Tperiod as 1 and

Ncycles as 7.

(10) Run the file. Add traces of V[n002] and V[n004] to observe transient

characteristics.

TRANSFER CHARACTERISTICS

TRANSIENT RESPONSE

RESULT :

A CMOS inverter circuit has been designed and simulated and the transfer

characteristics and transient response are observed.

4. Change the βn/ βp ratio from 1,2…10 and study the CMOS characteristics

(Vout/Vin).

Solution :

CIRCUIT DIAGRAM

STEPS

(1) Choose nmos4 , pmos4, voltage sources for Vin and Vdd and wire them as

shown in the circuit diagram.

(2) Set DC value of 5V to Vdd.

(3) From simulate tab, select edit simulation Cmd.

(4) On DC sweep tab select 1st source as V1 with start value :0, stop value :5

and increment 0.01.

(5) Right click on nmos4 and set length to 1μ and width as {X}.

(6) Right click on pmos4 and set length to 1μ and width to 1μ.

(7) In the spice directive type .step PARAM X 1u 10u 1u to swipe the width of

nmos4 from 1μ to 10μ thereby changing the βn/ βp ratio from 1,2…10.

(8) Run the file to obtain the transfer characteristics for various values of βn/ βp.

RESULT:

The transfer characteristics of inverter for values of βn/ βp ranging from

1,2….10 has been plotted and the switching threshold of the inverter which

was approx. 2.5V is found to reduce as βn/ βp is increased from 1 to 10.