LOWER TECHNOLOGY PROBLEMS IN COPPER

INTRODUCTION• The wire linking transistors together is called

interconnect.

TYPES OF INTERCONNECTS• Local interconnects – used for very short

interconnects at the device level. They usually connect gates, sources and drains in MOS technology, and emitters, bases, and collectors in bipolar technology.

• Semi global interconnects – Used to connect devices within a block.

• Global interconnects – Used to connect long interconnects between the blocks, including power, ground and clocks.

Wire Geometry• Pitch = w + s• Aspect ratio: AR = t/w– Old processes had AR << 1– Modern processes have AR 2

l

w s

t

h

ρ= resistivity (m)

R = sheet resistance ( /)

l lR R

t w w

MATERIALS USED FOR INTERCONNECTS• Aluminum and copper are the two conductive materials

currently used for on chip interconnections.• Al was the metal of choice for chip interconnects up until

the late 90s. There are still many chipmakers that are using Al for their interconnect metal, but as feature sizes shrink, more fabs are making the switch to Cu.

PROPERTIES Al Cu W

Melting Pt (°C) 660 1,083 3,410

Oxidation in Air Rapid; Self-Sealing

Slow; Not Self-Sealing Inert

Resistivity (mW-cm)

Crystalline 2.82 1.77 5.6

Coefficient of Thermal Expansion (Unit/°C) 24·10-6 17·10-6 4.3·10-6

Resistivity Melting Point­Thermal Expansion­ Electromigration

Al Resistivity Melting Point¯Thermal Expansion ¯ Electromigration

Cu

Interconnect Metal Properties•Cu offers several benefits over Al. Electromigration is the movement of metal atoms with e- flow. Over time electromigration will lead to breaks in the line causing shorts in the metal interconnect. Al is very prone to electromigration. Also Al has a high resistivity, which leads to decreased performance from RC delay in the circuit. •The main limitations of the aluminum-based process is its higher resistivity, compared to copper.•The manufacturing difficulties related to Cu interconnections make it a more expensive than Al based interconnections, but this extra cost can be compensated by better performance.

CHOICE OF METALS

• Until 180 nm generation, most wires were aluminum• Modern processes often use copper– Cu atoms diffuse into silicon and damage FETs– Must be surrounded by a diffusion barrier

•Because of these characteristics, Cu was the natural choice to replace Al. Cu has a low Resistivity and strong resistance to electromigration, as well as a higher melting point and decreased thermal expansion when compared to Al. These characteristics make Cu a higher performance and more reliable for interconnect metal.

WHY DIFFUSION BARRIER LAYER• Aluminium is not a noble metal; it readily reacts with oxygen to

form a dense oxide (Al2O3) surface layer (self-passivation) to prevent aluminium from corrosion and from diffusion through the SiO2 dielectric. Copper is more noble than aluminium; it does not possess the self-passivation characteristics to form a dense and stable oxide surface layer. Copper can readily diffuse through SiO2 to cause device degradation, and is prone to corrosion. Therefore, a diffusion barrier layer is required between the copper and the dielectric. The Al2O3 layer enables good adhesion between the aluminium interconnect and dielectric layers. For copper, good adhesion is achieved through the appropriate selection of diffusion barriers. The electrically conductive barriers covering the bottom and sidewalls of the copper line are often referred to as liners, and the non electrically conductive barriers covering the top surface of the copper line are generally referred to as cap layers.

SCALING OF COPPER INTERCONNECTS• With aggressive scaling , dimension-dependent effects

begin dramatically influencing interconnect resistivity. Among the dimensional effects, two that have the most impact in increasing effective resistivity are the effects of current-carrying electrons getting scattered from interfaces and grain boundaries and the fractional reduction in the copper cross-section area owing to a non negligible area consumed by the highly resistive diffusion barrier.

• Aforementioned effects are heavily controlled by certain technology and reliability dictated parameters, specifically, 1) the interconnect operation temperature, 2) the interface quality between the barrier and copper, 3) minimum barrier thickness requirement, and 4) the cross sectional barrier profile in the interconnect.

• Interconnect temperature will be determined by the advances in the low thermal resistance packaging technology and the ability to technologically engineer a low dielectric constant material with good heat conduction properties.• Interface quality could be determined by technological factors such as pre-deposition surface treatments as well as deposition process conditions which may dictate the the surface roughness at the interface.•The minimum barrier thickness will depend on the effectiveness of the barrier to stop copper diffusion.•Barrier profile is influenced by the choice of deposition technology. The various possibilities include atomic layer deposition (ALD), collimated physical vapour deposition (cPVD), and ionized physical vapour deposition (IPVD).

• The barrier and the surface scattering effects would become increasingly dominant in the future. The barrier does not scale as rapidly as the interconnect dimensions because of reliability constraint. This will lead to a progressively larger fraction of the cross section area being occupied by the high resistivity barrier, thus, an increase in effective resistivity of the interconnect stack. On the other hand, with dimensional shrinkage, the bulk mean free path of electrons will become comparable to the wire dimensions, leading to a non negligible scattering rate from the interface.

ELECTRON SURFACE SCATTERING• The increase in resistivity with dimensional shrinking because of

electron surface scattering effect depends on the interconnect operation temperature and on the copper–barrier interface quality.

• Operational temperature impacts resistivity by increasing the electron collision probability with surface .

• Interface quality determines resistivity by dictating the extent of elastic collisions suffered by electrons at the interface. Elastically scattered electrons do not contribute to increase in resistivity since, upon collision, they conserve momentum in the direction of the current flow. The fraction of electrons, which suffer elastic collisions at the interface resulting in specular scattering, is modelled by an empirical parameter, P, which varies between 0 and 1. A P value of 1 does not change copper resistivity, whereas P value of 0, signifying complete diffuse scattering, has the most detrimental on resistivity.

• Electron surface scattering: resistivity increases in future• Reduced electron mobility as dimensions decrease

• Copper/barrier interface quality further reduces the mobility

Diffuse scattering Elastic scattering Lower Mobility No Change in Mobility

• Surface electron scattering increases resistivity.

• Most metals today exhibit P ≈ 0.5

• Real chips operate at higher temperatures

• With scaling the wire cross section is decreasing. As

a result the surface scattering is becoming more

serious.

CONCLUSION• From the graphs, it is seen that global wire resistivity rises

most slowly with years. This occurs because the larger dimensions of global wire results in both a lesser fraction of cross sectional area consumption by the barrier and in lesser electron surface scattering.

• It is also observed that the effective resistivity depicts least variation with the ALD deposition technology in the future due to its conformal properties.

• A very low temperature (77 K) Cu effective resistivity trend for different barrier deposition technologies is also shown.The resistivity is found to be much higher for lower value of P and higher temperature..

• Al resistivity rises slower than Cu . This may lead to a higher copper effective resistivity than that of aluminium in the future. The cross over, where copper effective resistivity is higher occurs faster for local and semi global interconnects. For instance, with 1 for aluminium and 0.5 for Cu, local interconnects with a 10 nm minimum thickness barrier, will exhibit a cross over in 2009 with ALD barrier. With less conformal barrier depositiontechnologies, this cross over can occur as early as year 2004.

•It is also found out that a barrierless technology has much lower resistivity than a barrier with barrier thickness of 10nm and P value of 1.