LogicDesign–CombinationalCircuits

DigitalComputerDesign

Topics•  CombinationalLogic•  KarnaughMaps•  CombinationalBuildingBlocks•  Timing

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LogicCircuit

Alogiccircuitiscomposedof:•  Inputs•  Outputs•  Functionalspecification•  Timingspecification

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inputs outputsfunctional spec

timing spec

Example

•  Nodes– Inputs:A,B,C– Outputs:Y,Z– Internal:n1

•  Circuitelements– E1,E2,E3– Eachacircuit

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A E1

E2

E3B

C

n1

Y

Z

TypesofLogicCircuits•  CombinationalLogic– Memoryless– Outputsdeterminedbycurrentvaluesofinputs

•  SequentialLogic– Hasmemory– Outputsdeterminedbypreviousandcurrentvaluesofinputs

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inputs outputsfunctional spec

timing spec

RulesofCombinationalComposition•  Everyelementiscombinational•  Everynodeiseitheraninputorconnectstoexactlyoneoutput•  Thecircuitcontainsnocyclicpaths•  Example:

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BooleanEquations•  Functionalspecificationofoutputsintermsofinputs•  Example:S=F(A,B,Cin) Cout=F(A,B,Cin)

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A S

S = A ⊕ B ⊕ CinCout = AB + ACin + BCin

BCin

CL Cout

SomeDefinitions•  Complement:variablewithabaroveritA,B,C•  Literal:variableoritscomplementA,A,B,B,C,C•  Implicant:productofliteralsABC,AC,BC• Minterm:productthatincludesallinputvariablesABC,ABC,ABC• Maxterm:sumthatincludesallinputvariables(A+B+C),(A+B+C),(A+B+C)

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Exercise

•  SimplifyeachofthefollowingBooleanequations.

– Y=BC+A‘B’C’+BC’– Y=(A+A’B+A‘B’)’+(A+B’)’

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Sum-of-Products(SOP)Form•  AllequationscanbewritteninSOPform•  Eachrowhasaminterm•  Amintermisaproduct(AND)ofliterals•  EachmintermisTRUEforthatrow(andonlythatrow)•  FormfunctionbyORingmintermswhereoutputis1•  Thus,asum(OR)ofproducts(ANDterms)

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Y = F(A, B) = AB + AB = Σm(1, 3)

A B Y0 00 11 01 1

0101

minterm

A BA BA B

A B

mintermnamem0m1m2m3

Product-of-Sums(POS)Form•  AllBooleanequationscanbewritteninPOSform•  Eachrowhasamaxterm•  Amaxtermisasum(OR)ofliterals•  EachmaxtermisFALSEforthatrow(andonlythatrow)•  FormfunctionbyANDingmaxtermswhereoutputis0•  Thus,aproduct(AND)ofsums(ORterms)

11Y = F(A, B) = (A + B)(A + B) = ΠM(0, 2)

A + BA B Y0 00 11 01 1

0101

maxterm

A + BA + BA + B

maxtermnameM0M1M2M3

Exercise

•  Q1:WriteaBooleanequationinsum-of-productsandproduct-of-sumscanonicalformfor– (a)

– (b)F(X,Y,Z)=XY’+YZ+XYZ

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FromMintermstoGates(Two-LevelLogic)•  Two-levellogic:ANDsfollowedbyORs•  Example(InSOPForm):Y=A’B’C’+AB’C’+AB’C•  Circuitwithoutsimplification:

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BA C

Y

minterm: ABC

minterm: ABC

minterm: ABC

A B C

MultilevelCombinationalLogic•  Somelogicfunctionsrequireanenormousamountofhardwarewhenbuiltusingtwo-levellogic.– Multi-levelcombinationalcircuitsmayuselesshardwarethantheirtwo-levelcounterparts.

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(b)Multilevelimplementation8-inputXOR.Itwouldbereallycomplexwith2-levelimplementation

(a)3-inputXORanditstwo-levelimplementation

DeMorgan’sTheorem

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Thecomplementoftheproductisthesumofthecomplements.

Dual:Thecomplementofthesumistheproductofthecomplements.

Theorem DualB0•B1•B2…=B0+B1+B2… B0+B1+B2…=B0•B1•B2…

Y=AB=A+B

Y=A+B=AB

AB Y

AB Y

AB Y

AB Y

BubblePushingUsingDeMorgan’sTheorem•  Backward:– Bodychanges– Addsbubblestoinputs

•  Forward:– Bodychanges– Addsbubbletooutput

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AB Y A

B Y

AB YA

B Y

BubblePushing–MultilevelCircuitAnalysis

•  Bubblepushingisespeciallyhelpfulinanalyzinganddesigningmultilevelcircuits.

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AB

C YD

Drawgatesinaformsobubblescancel!

BubblePushingExample

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AB

C YD

no outputbubble

BubblePushingExample

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bubble oninput and outputA

B

C

DY

AB

C YD

no outputbubble

BubblePushingExample

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AB

C

DY

bubble oninput and outputA

B

C

DY

AB

C YD

Y = ABC + D

no outputbubble

no bubble oninput and output

Exercise

•  UsingDeMorganequivalentgatesandbubblepushingmethods,redrawthecircuitandwritetheBooleanequation.

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Multiple-OutputCircuitsDesign•  Example:PriorityCircuitOutputassertedcorrespondingtomostsignificantTRUEinput

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0

A1 A00 00 11 01 1

0

00

Y 3 Y 2 Y 1 Y 00000

0011

0100

A3 A20 00 00 00 0

0 0 0 1 0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

0001

1110

0000

0000

1 0 0 01111

0000

0000

0000

1 0 0 01 0 0 0

A0

A1

PR IOR ITYC iIR C UIT

A2

A3

Y 0

Y 1

Y 2

Y 3

TruthTable

PriorityCircuitHardware(FromTruthTable)

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A1 A00 00 11 01 1

0000

Y 3 Y 2 Y 1 Y 00000

0011

0100

A3 A20 00 00 00 0

0 0 0 1 0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

0001

1110

0000

0000

1 0 0 01111

0000

0000

0000

1 0 0 01 0 0 0

A3A2A1A0Y3Y2

Y1

Y0

•  Givenaclearspecification,simplyturnthewordsintoequationsandtheequationsintogates.

TruthTable

Don’tCares•  WeusethesymbolXtodescribeinputsthattheoutputdoesn’tcareabout.

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A1 A00 00 11 01 1

0000

Y 3 Y 2 Y 1 Y 00000

0011

0100

A3 A20 00 00 00 0

0 0 0 1 0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

0001

1110

0000

0000

1 0 0 01111

0000

0000

0000

1 0 0 01 0 0 0

A1 A00 00 11 XX X

0000

Y 3 Y 2 Y 1 Y 00001

0010

0100

A3 A20 00 00 00 1

X X 1 0 0 01 X

TruthTableWithDon’tCares

Exercise

•  Designaneight-inputpriorityencoderwithinputsA7:0andoutputsY2.0andNONE.– Forexample,iftheinputis00100000,theoutputYshouldbe101andNONEshouldbe0.

•  GiveasimplifiedBooleanequationforeachoutputandsketchaschematic.

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Apriorityencoderhas2Ninputs.ItproducesanN-bitbinaryoutputindicatingthemostsignificantbitoftheinputthatisTRUE,or0ifnoneoftheinputsareTRUE.ItalsoproducesanoutputNONEthatisTRUEifnoneoftheinputsareTRUE.

Exercise

•  FindaminimalBooleanequationforthefollowingfunction:

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KarnaughMaps(K-Maps)•  Booleanexpressionscanbeminimizedbycombiningterms– Reducinganequationtothefewestnumberofimplicants,whereeachimplicanthasthefewestliterals

•  K-mapsminimizeequationsgraphically.

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C 00 01

0

1

Y

11 10AB

1

1

0

0

0

0

0

0

C 00 01

0

1

Y

11 10AB

ABC

ABC

ABC

ABC

ABC

ABC

ABC

ABC

B C0 00 11 01 1

A0000

0 00 11 01 1

1111

11000000

Y

Example:4-InputK-Map

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01 11

1

0

0

1

0

0

1

101

1

1

1

1

0

0

0

1

11

10

00

00

10AB

CD

Y

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

Example:4-InputK-Map

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01 11

1

0

0

1

0

0

1

101

1

1

1

1

0

0

0

1

11

10

00

00

10AB

CD

Y

Y = AC + ABD + ABC + BD

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

Example:K-MapswithDon’tCares

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0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

1

0

0

X

X

X

1

101

1

1

1

1

X

X

X

X

11

10

00

00

10AB

CD

Y

Example:K-MapswithDon’tCares

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0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

1

0

0

X

X

X

1

101

1

1

1

1

X

X

X

X

11

10

00

00

10AB

CD

Y

Y = A + BD + C

Exercise

•  GivesimplifiedBooleanequationsforeachoutputusingK-mapsandsketchacircuit.

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Acircuithasfourinputsandtwooutputs.TheinputsΑ3:0representanumberfrom0to15.OutputPshouldbeTRUEifthenumberisprime(0and1arenotprime,but2,3,5,andsoon,areprime).OutputDshouldbeTRUEifthenumberisdivisibleby3.

Contention:X•  Contention:circuittriestodriveoutputto1and0– Actualvaluesomewhereinbetween– Couldbe0,1,orinforbiddenzone– Mightchangewithvoltage,temperature,time,noise– Oftencausesexcessivepowerdissipation

•  Warnings:– Contentionusuallyindicatesabug.

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A = 1

Y = X

B = 0ThesymbolXindicatesthatthecircuitnodehas

anunknownorillegalvalue.

Floating:Z•  Floating,highimpedance,open,highZ•  Floatingoutputmightbe0,1,orsomewhereinbetween

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E A Y0 0 Z0 1 Z1 0 01 1 1

A

E

Y

TristateBufferWhentheenableisTRUE,thetristatebufferactsasasimplebuffer,transferringtheinputvaluetotheoutput.WhentheenableisFALSE,theoutputisallowedtofloat(Z).

TristateBusses•  Tristatebuffersarecommonlyusedonbussesthatconnectmultiplechips.– Manydifferentdrivers– Exactlyoneisactiveatonce

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en1

to busfrom bus

en2

to busfrom bus

en3

to busfrom bus

en4

to busfrom bus

shared busprocessor

video

Ethernet

memory

Multiplexer(Mux)•  SelectsbetweenoneofNinputstoconnecttooutput•  log2N-bitselectinput–controlinput•  Example:2:1Mux

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Y0 00 11 01 1

0101

0000

0 00 11 01 1

1111

0011

0

1

S

D0Y

D1

D1 D0S Y01 D1

D0

S

D1

Y

D0

S

S 00 01

0

1

Y

11 10D0 D1

0

0

0

1

1

1

1

0

Y = D0S + D1S

LogicusingMultiplexers•  Usingmuxasalookuptable

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A B Y0 0 00 1 01 0 01 1 1

Y = AB

00

Y011011

A B

LogicusingMultiplexers•  Reducingthesizeofthemux

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A B Y0 0 00 1 01 0 01 1 1

Y = AB

A Y

0

1

0 0

1

A

BY

B

Exercise

• WriteaminimizedBooleanequationforthefunctionperformedbythefollowingcircuit.

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Decoders

•  Ninputs,2Noutputs•  Eachoutputisaminterm

•  One-hotoutputs:onlyoneoutputHIGHatonce

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2:4Decoder

A1A0

Y3Y2Y1Y000

011011

0 00 11 01 1

0001

Y3 Y2 Y1 Y0A0A10010

0100

1000

Y3

Y2

Y1

Y0

A0A1

LogicUsingDecoders•  ORminterms

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2:4Decoder

AB

00011011

Y = AB + AB

Y

ABABABAB

Minterm

= A ⊕ B

Reading

• Chapter2ofyourbook– From2.1to2.8

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