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LINEAR TECHNOLOGYLINEAR TECHNOLOGYLINEAR TECHNOLLINEAR TECHNOLOGOGYIN THIS ISSUE…COVER ARTICLEThird-Generation DC/DC ControllerReduces Size and Cost .................. 1Randy G. Flatness

Issue Highlights ............................ 2LTC® in the News ........................... 2DESIGN FEATURESNew Universal Continuous-Time Filterwith Extended Frequency Range ... 7Max W. Hauser

SOT-23 Switching RegulatorsDeliver Low Noise Outputsin a Small Footprint ................... 11Steve Pietkiewicz

Versatile New Switching RegulatorFits in SO-8 ................................. 14Craig Varga

16-Bit Parallel DAC Has 1LSBLinearity, Ultralow Glitch andAccurate 4-Quadrant Resistors ... 18Patrick Copley

Fast Rate Li-Ion Battery Charger................................................... 24

Goran Perica

DESIGN IDEASNo RSENSE Controller Delivers 12V and100W at 97% Efficiency .............. 26Christopher B. Umminger

Generating Low Cost, Low Noise,Dual-Voltage Supplies ................. 27Ajmal Godil

Switched Capacitor Voltage RegulatorProvides Current Gain ................. 28Jeff Witt

High Current Step-Down Conversionfrom Low Input Voltages ............. 30Dave Dwelley

How to Design High Order Filters withStopband Notches Using the LTC1562Operational Filter (Part 2) ........... 31Nello Sevastopoulos

DESIGN INFORMATIONThe LTC1658 and LTC1655: SmallestRail-to-Rail 14-Bit and 16-Bit DACs................................................... 36

Hassan Malik

New Device Cameos ..................... 37Design Tools ................................ 39Sales Offices ............................... 40

FEBRUARY 1999 VOLUME IX NUMBER 1

, LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power, Burst Mode, C-Load,FilterCAD, Hot Swap, Linear View, Micropower SwitcherCAD, No RSENSE, Operational Filter, OPTI-LOOP, PolyPhase,SwitcherCAD and UltraFast are trademarks of Linear Technology Corporation. Other product names may be trademarksof the companies that manufacture the products.

Third-Generation DC/DCControllers ReduceSize and CostIntroductionThe LTC1735 and LTC1736 are thenewest members of Linear Tech-nology’s third generation of DC/DCcontrollers. These controllers use thesame constant frequency, currentmode architecture and Burst Mode™operation as the previous generationLTC1435–LTC1437 controllers butwith improved features. WithOPTI-LOOP™ compensation, newprotection circuitry, tighter load regu-lation and strong MOSFET drivers,these controllers are ideal for thecurrent and future generations of CPUpower applications.

The LTC1735 is pin compatible withthe previous generation LTC1435/LTC1435A controllers with only mi-nor external component changes.

Protection features include internalfoldback current limiting, output ov-ervoltage crowbar and optionalshort-circuit shutdown. The 0.8V ±1%reference allows the low output volt-ages and 1% accuracy that will bedemanded by future microprocessors.The operating frequency (synchroniz-able up to 500kHz) is set by an externalcapacitor, allowing maximum flexibil-ity in optimizing efficiency.

The LTC1736 has all of the fea-tures of the LTC1735, plus voltageprogramming for CPU power, in a 24-lead SSOP package. The output voltagein LTC1736 applications is pro-grammed by a 5-bit digital-to-analogconverter (DAC) that adjusts the out-

continued on page 3

Figure 1. LTC1736 evaluation circuit: a complete 5V–24V to 0.9V–2V/12A converterin 2.15in2 of PC board space

by Randy G. Flatness

Linear Technology Magazine • February 19992

EDITOR’S PAGE

Issue HighlightsHappy New Year and welcome to

the ninth volume of Linear Technol-ogy magazine.

This issue is heavy on power prod-ucts: our cover article introduces theLTC1735 and LTC1736, the newestmembers of Linear Technology’s thirdgeneration of DC/DC controllers.These controllers use the same cur-rent mode architecture with constantfrequency and Burst Mode operationas the LTC1435–LTC1437 controllersbut with improved features. WithOPTI-LOOP compensation, newprotection circuitry, tighter load regu-lation and strong MOSFET drivers,these controllers are ideal for the cur-rent and future generations of CPUpower applications.

This issue debuts the LTC1530, asynchronous buck regulator control-ler in the SO-8 package. The LTC1530is a small, versatile controller that isusable in numerous topologies andover a wide range of power levels. Inbasic buck applications, the LTC1530permits the designer to realize verysimple, low parts count designs thatrequire minimal real estate. With alittle ingenuity, it is possible to de-velop circuits different than those thatthe part’s designers intended, butwhich give excellent performancenonetheless.

The LT®1505 is a constant-cur-rent, constant-voltage, current modeswitching battery charger using thesynchronous buck topology. Its out-put voltage is preset for 3–4 Li-Ioncells, but can be programmed from 1Vto 21V. It features a 0.5% voltagereference, low dropout operation, pro-grammable wall adapter currentlimiting and efficiencies to 94%.

Rounding out our selection ofswitchers are the LT1611 and LT1613.These current mode, constant fre-quency devices contain internal 36Vswitches capable of generating out-put power in the range of 400mW to2W, in a 5-lead SOT-23 package. TheLT1613 has a standard positive feed-back pin and is designed to regulatepositive voltages. The LT1611 has a

novel feedback scheme designed todirectly regulate negative output volt-ages without the use of level-shiftingcircuitry.

In the filter arena, we premier theLTC1562-2, an extended-frequencyversion of the LTC1562 quadruple2nd order, universal, continuous-timefilter, described in the February 1998issue. The LTC1562 introducedOperational Filter™ building blocks,which sat is fy d iverse fi l terrequirements and appl icat ionscompactly. The LTC1562-2 has thesame block diagram, pinout and pack-aging as the original LTC1562, but isoptimized for higher filter frequen-cies: 20kHz to 300kHz. Besidescovering a full octave of frequencies(150kHz–300kHz) above the range ofthe LTC1562, the LTC1562-2 alsooverlaps the LTC1562’s utility in therange 20kHz to 150kHz. In thisfrequency range, the LTC1562-2 typi-cally shows reduced large-signaldistortion at a cost of slightly morenoise than with the LTC1562.

We also introduce a new data con-verter: the LTC1597 16-bit parallel,current output, low glitch, multiplyingDAC. The LTC1597 has outstanding1LSB linearity over temperature,ultralow glitch impulse, on-chip 4-quadrant feedback resistors, low powerconsumption, asynchronous clear anda versatile parallel interface. For 14-bit systems, its pin compatiblecounterpart, the LTC1591, is an idealsolution. Combined with the LT1468op amp (introduced in the November1998 issue), the LTC1597 provides thebest in its class, 1.7µs settling time to0.0015%, while maintaining superbDC linearity specifications. Two rail-to-rail, voltage output DACs can befound in the Design Information sec-tion: the 14-bit LTC1658 and the 16-bitLTC1655; these DACs have a flexible3-wire serial interface that is SPI/QSPI and MICROWIRE™ compatible.They provide a convenient upgradepath for users of LTC’s 12-bit voltageoutput DAC family.

This issue features a rich selectionof Design Ideas, including four dif-ferent power conversion circuits andthe second in a series of articles ondesigning high order filters with stop-band notches using the LTC1562filter ICs.

The issue concludes with six NewDevice Cameos.

LTC in the News…On January 12, 1999, Linear Tech-nology announced its financialresults for the second quarter of FY1999, reporting increased sales andprofits compared to the secondquarter of the previous year. Netsales and net income for the quar-ter ended December 27, 1998, were$120,020,000 and $45,904,000,respectively.

Reporting the results, LinearTechnology President and CEO Rob-ert H. Swanson said, “This quarterproved to be stronger than weinitially expected, as the generalworldwide economic climateimproved. We grew sales and prof-its 3% sequentially from theprevious quarter and added $35.6million to our cash balance. Ourreturn on sales is an industryleading 38.2%.”

Prior to the announcement, Lin-ear Technology was named a topstock pick for 1999 in a December17, 1998 article in USA Today. JimCraig, manager of the $21 billionJanus fund and one of severalfinancial analysts surveyed inter-viewed by USA Today, listed LinearTechnology among his top picks forthe coming year.

The December 28 issue of EETimes named Linear TechnologyStaff Scientist Jim Williams one ofnineteen “Times People 98.” Theissue included a full-page profile onJim, emphasizing the changes hehas seen in analog design over thepast two decades.

The December 7 issues of bothElectronic News and ElectronicBuyers’ News reported LinearTechnology’s December announce-ment of the addition of WyleElectronics as an authorizeddistributor.

MICROWIRE is a trademark of National Semiconductor Corp.

Linear Technology Magazine • February 1999 3

DESIGN FEATURES

put voltage from 0.925V to 2.00V,according to Intel mobile VIDspecifications.

DetailsThe LTC1735 and LTC1736 are syn-chronous step-down switchingregulator controllers that drive exter-nal N-Channel power MOSFETs usinga programmable fixed frequency OPTI-LOOP architecture. OPTI-LOOPcompensation effectively removes theconstraints placed on COUT by othercontrollers for proper operation (suchas limits on low ESRs). A maximumduty cycle limit of 99% provides lowdropout operation, which extendsoperating time in battery operatedsystems. A forced-continuous con-trol pin reduces noise and RFinterference and can assist second-ary winding regulation by disablingBurst Mode when the main output islightly loaded. Soft-start is providedby an external capacitor that can beused to properly sequence supplies.The operating current level is user-programmable via an external currentsense resistor. A wide input-supplyrange allows operation from 3.5V to30V (36V maximum).

ProtectionNew internal protection features inthe LTC1735 and LTC1736 control-lers include foldback current limiting,short circuit detection, short-circuitlatch-off and overvoltage protection.These features protect the PC board,the MOSFETs and the load itself (theCPU) against faults.

Fault Protection:Overcurrent Latch-OffThe RUN/SS pin, in addition to pro-viding soft-start capability, alsoprovides the ability to shut off thecontroller and latch off when an over-current condition is detected. TheRUN/SS capacitor, CSS, (refer to Fig-ure 5) is used initially to turn on andlimit the inrush current of the con-troller. After the controller has beenstarted and given adequate time tocharge the output capacitor and pro-vide full load current, CSS is used asa short-circuit timer. If the outputvoltage falls to less than 70% of itsnominal output voltage after CSSreaches 4.2V, it is assumed that theoutput is in a severe overcurrentand/or short-circuit condition andCSS begins discharging. If the condi-tion lasts for a long enough period, asdetermined by the size of CSS, thecontroller will be shut down until theRUN/SS pin voltage is recycled.

This built-in latch-off can be over-ridden by providing >5µA at acompliance of 4V to the RUN/SS pin(refer to the LTC1735/LTC1736 DataSheet for details). This external cur-rent shortens the soft-start periodbut also prevents net discharge of theRUN/SS capacitor during a severeovercurrent and/or short-circuitcondition.

Why should you defeat overcur-rent latch-off? During the prototypingstage of a design, there may be aproblem with noise pickup or poorlayout causing the protection circuit

to latch off. Defeating this feature willallow easy troubleshooting of the cir-cuit and PC layout. The internalshort-circuit detection and foldbackcurrent limiting still remain active,thereby protecting the power supplysystem from failure. After the designis complete, you can decide whetherto enable the latch-off feature.

Fault Protection: Current Limitand Current FoldbackThe LTC1735/LTC1736 current com-parator has a maximum sense voltageof 75mV, resulting in a maximumMOSFET current of 75mV/RSENSE.The LTC1735/LTC1736 includes cur-rent foldback to help further limitload current when the output isshorted to ground. If the output fallsby more than one-half, the maximumsense voltage is progressively loweredfrom 75mV to 30mV. Under short-circuit conditions with very low dutycycle, the LTC1735/LTC1736 willbegin cycle skipping in order to limitthe short-circuit current. In this situ-ation, the bottom MOSFET will be onmost of the time, conducting the cur-rent. The average short-circuit currentwill be approximately 30mV/ RSENSE.Note that this function is always activeand is independent of the short cir-cuit latch-off.

Fault Protection: OutputOvervoltage Protection (OVP)An output overvoltage crowbar turnson the synchronous MOSFET to blowa system fuse in the input lead when

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stneisnarTtsaF toohsrevOslortnoC ffOsehctaL

V5otdetrohStuptuO PVOtadepmalCtuptuO ffOsehctaL

esaerceDegatloVDIV egatloVweNsetalugeR ffOsehctaL

esioN tuptuOslortnoC ffOsehctaL

TEFSOMpoTdetrohS sdaolrevOTEFSOMmottoB sdaolrevOTEFSOMmottoB

naCegatloVtuptuOesreveR oN seY

devomeRsidaolrevOnehW noitarepOlamroNsemuseR ffOdehctaLsniameR

stluaFgnitoohselbuorT stnemerusaeMCDysaE eriuqeRyaM;tluciffiDsepocsollicsOlatigiD

Table 1. Overvoltage protection comparison

OPERATING FREQUENCY (kHz)0 100 200 300 400 500 600

C OSC

VAL

UE (p

F)

100.0

87.5

75.0

62.5

50.0

37.5

25.0

12.5

0

LTC1735/LTC1736

LTC1435/LTC1436

Figure 2. COSC value vs frequency for theLTC1435/36 and the LTC1735/36

LTC1735/LTC1736, continued from page 1


DESIGN FEATURES

the output of the regulator rises muchhigher than nominal levels. The crow-bar can cause huge currents to flow,greater than in normal operation. Thisfeature is designed to protect againsta shorted top MOSFET or short cir-cuits to higher supply rails; it doesnot protect against a failure of thecontroller itself.

Previous latching crowbar schemesfor overvoltage protection have a num-ber of problems (see Table 1). One ofthe most obvious, not to mentionmost annoying, is nuisance tripscaused by noise or transientsmomentarily exceeding the OVPthreshold. Each time that this occurswith latching OVP, a manual reset isrequired to restart the regulator. Farmore subtle is the resulting outputvoltage reversal. When the synchro-nous MOSFET latches on, a largereverse current is loaded into theinductor while the output capacitor isdischarging. When the output voltagereaches zero, it does not stop there,but rather continues to go negativeuntil the reverse inductor current is

depleted. This requires a sizableSchottky diode across the output toprevent excessive negative voltage onthe output capacitor and load.

A further problem on the horizonfor latching OVP circuits is theirincompatibility with on-the-fly CPUcore voltage changes. If an outputvoltage is reprogrammed from a highervoltage to a lower voltage, the OVPwill temporarily indicate a fault, sincethe output capacitor will momentarilyhold the previous, higher output volt-age. With latching OVP, the result willbe another latch-off, with a manualreset required to attain the new out-put voltage. To prevent this problem,the OVP threshold must be set abovethe maximum programmable outputvoltage, which would do little goodwhen the output voltage was pro-grammed near the bottom of its range.

In order to avoid these problemswith traditional latching OVP circuits,the LTC1735 and LTC1736 use a new“soft latch” OVP circuit. Regardless ofoperating mode, the synchronousMOSFET is forced on whenever theoutput voltage exceeds the regulationpoint by more than 7.5%. However, ifthe voltage then returns to a safelevel, normal operation is allowed toresume, thereby preventing latch-offcaused by noise or voltage repro-gramming. Only in the case of a truefault, such as a shorted top MOSFET,will the synchronous MOSFET remain

latched on until the input voltagecollapses or the system fuse blows.

The new soft latch OVP also pro-vides protection and easy diagnosisof other overvoltage faults, such as alower supply rail shorted to a highervoltage. In this scenario, the outputvoltage of the higher regulator is pulleddown to the OVP voltage of thesoft-latched regulator, allowing theproblem to be easily diagnosed withDC measurements. On the otherhand, latching OVP provides only amillisecond glimpse of the fault as itlatches off, forcing the use of expensivedigital oscilloscopes for trouble-shooting.

Three Operating Modes/OnePin: Sync, Burst Disable andSecondary RegulationThe FCB pin is a multifunction pinthat controls the operation of thesynchronous MOSFET and is an inputfor external clock synchronization.When the FCB pin drops below its0.8V threshold, continuous modeoperation is forced. In this case, thetop and bottom MOSFETs continueto be driven synchronously regard-less of the load on the main output.Burst Mode operation is disabled andcurrent reversal is allowed in theinductor.

In addition to providing a logicinput to force continuous syn-chronous operation and external

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srotsiseRkcabdeeF agnitalugeRgnidniWyradnoceS

V( CNYSBCF )V5.1>edoMtsruBoN,delbasiD

lasreveRtnerruC

Table 2. FCB possible states

retemaraP 6371/5371CTL LLP-A6341/A5341CTL

ecnerefeR V8.0 V91.1

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elbazinorhcnyS seY ylnOLLP-A6341CTL

VtnI CC egatloV )xaMV7(V2.5 )xaMV01(V5

tuptuOdooGrewoP ylnO6371CTL ylnOLLP-6A3/6A341CTL

kcabdloFtnerruC lanretnI lanretxE

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ffO-hctaLIOtuptuO lanoitpO oN

segakcaP 42G/61NG,61OS 42NG/61G,61OS

srevirDTEFSOM 3× 1×

Table 3. Comparison of LTC1735/36 controllers with LTC1435A/36A-PLL controllers

BURST

SYNC

CONTINUOUS

100%

90%

80%

70%

60%

50%

40%

30%

20%0.001 0.01 0.1 1.0 10.0

LOAD CURRENT (A)

EFFI

CIEN

CY (%

)

Figure 3. Efficiency vs load current for threemodes of operation


DESIGN FEATURES

synchronization, the FCB pin pro-vides a means to regulate a flybackwinding output. It can force continu-ous synchronous operation whenneeded by the flyback winding,regardless of the primary output load.In order to prevent erratic operation if

Table 4. VID output voltage programming

4B 3B 2B 1B 0B V TUO )V(

0 0 0 0 0 V000.2

0 0 0 0 1 V059.1

0 0 0 1 0 V009.1

0 0 0 1 1 V058.1

0 0 1 0 0 V008.1

0 0 1 0 1 V057.1

0 0 1 1 0 V007.1

0 0 1 1 1 V056.1

0 1 0 0 0 V006.1

0 1 0 0 1 V055.1

0 1 0 1 0 V005.1

0 1 0 1 1 V054.1

0 1 1 0 0 V004.1

0 1 1 0 1 V053.1

0 1 1 1 0 V003.1

0 1 1 1 1 *

1 0 0 0 0 V572.1

1 0 0 0 1 V052.1

1 0 0 1 0 V522.1

1 0 0 1 1 V002.1

1 0 1 0 0 V571.1

1 0 1 0 1 V051.1

1 0 1 1 0 V521.1

1 0 1 1 1 V001.1

1 1 0 0 0 V570.1

1 1 0 0 1 V050.1

1 1 0 1 0 V520.1

1 1 0 1 1 V000.1

1 1 1 0 0 V579.0

1 1 1 0 1 V059.0

1 1 1 1 0 V529.0

1 1 1 1 1 **denifedatuohtiwsedoctneserpe r**,*:etoN

.snoitacificepsletnInideificepssaegatlovtuptuodilavasasedocesehtsterpretni6371CTLehT:swollofsaegatlovtuptuosecudorpdnastupni

.V009.0=]11111[,V052.1=]11110[

no external connections are made,the FCB pin is pulled high by a 0.25µAinternal current source.

The LTC1735 internal oscillatorcan be synchronized to an externaloscillator by applying a clock signal ofat least 1.5VP-P to the FCB pin. Whensynchronized to an external fre-quency, Burst Mode operation isdisabled but cycle skipping occurs atlow load currents since currentreversal is inhibited. The bottom gatewill come on every 10 clock cycles toensure that the bootstrap cap is keptrefreshed and to keep the frequencyabove the audio range. The risingedge of an external clock applied tothe FCB pin starts a new cycle.

The range of synchronization isfrom 0.9 × fO to 1.3 × fO, with fO set byCOSC. Attempting to synchronize to ahigher frequency than 1.3 × fO canresult in inadequate slope compensa-tion and cause loop instability withhigh duty cycles. If loop instability isobserved while synchronized, addi-tional slope compensation can beobtained by simply decreasing COSC.A plot of operating frequency versusCOSC value is shown in Figure 2.

Table 2 summarizes the possiblestates available on the FCB pin.

Figure 3 gives a comparison of effi-ciencies in a regulator for the threeoperating modes: forced continuousoperation, pulse skipping mode (syn-chronized at f = fO) and Burst Modeoperation.

Converting to the LTC1735The LTC1735 is pin compatible withthe LTC1435/LTC1435A, with minorcomponent changes. Table 3 showsthe differences between the two con-trollers. The important items to noteare:

1. The LTC1735 has a 0.8V refer-ence (versus 1.19V for theLTC1435) that allows loweroutput voltage operation (down to0.8V). Thus, the output feedbackdivider will have to be recalcu-lated for the same output voltage.

2. The LTC1735’s maximumcurrent sense voltage is half thatof the LTC1435. This reduces thepower lost in the sense resistorby half. Hence, for the samemaximum output current, thecurrent sense resistor must becut in half.

0.005Ω

M2FDS6680A0.22µF

C24.7µF

2µH

MBRS340T3

22µF30V

VOUT1.6V/9A

+VIN

CIN1

RCS1

CO3*

820µF4V

CO1180µF4V

FDS6680A

+

+

M1

R3

R710k1%

10k1%

L1†

BOOST

PGND

BG

INT VCC

SW

TG

RUN/SS

COSC

SGND

SENSE+

VIN

EXT VCC

ITH

FCB

VOSENSE

SENSE–

LTC17351

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

COSC147pF

CC1

C147pF

CC2 100pF

CS1, 1000pF

CSS 0.1µFRC1 33k

330pF D1CMDSH-3

CB1

R5 10Ω

R2 10Ω

C347pF

EXT VCC

RF14.7Ω

CF10.1µF

JP2LATCH-OFF(DISABLED)

R6, 1M

INT VCC

ON

JP1BURST MODE FCB/SYNC

RUN

RS110Ω

22µF30V

CIN3++

D2

GND

VO

C41µF

PANASONIC ETQP6F2R0HFA (201) 348-7522SANYO OSCON 4SP820M (619) 661-6835

†*

OFF

30

25

20

15

10

5

0100 200 300 400 500 600

FREQUENCY (kHz)

GATE

-CHA

RGE

CURR

ENT

(mA)

TOP AND BOTTOM MOSFETS= FAIRCHILD NDS6680A

Figure 4. MOSFET gate-charge current vsfrequency

Figure 5. High efficiency 1.6V/9A CPU power supply


DESIGN FEATURES

3. The gate drivers of the LTC1735are 3× the strength of those inthe LTC1435. This equates tofaster rise and fall times fordriving the same MOSFETs plusthe capability to drive largerMOSFETs with less efficiencyloss due to transition losses.

SpeedThe LTC1735/LTC1736 are designedto be used in higher current applica-tions than the LTC1435 family.Stronger gate drives allow parallelingmultiple MOSFETs or higher operat-ing frequencies. The LTC1735 hasbeen optimized for low output voltageoperation by reducing the minimumon-time to less than 200ns. Remem-ber, though, that transition lossescan still impose significant efficiencypenalties at high input voltages andhigh frequencies. Just because theLTC1735 can operate at frequenciesabove 300kHz doesn’t mean it should.Figure 4 shows a plot of MOSFETcharge current versus frequency.

Linear CurrentComparator OperationSince the trend in the marketplacehas forced output voltages to lowerand lower values, the current senseinputs have been optimized for lowvoltage operation. The current sensecomparator has a linear responsecharacteristic, without discon-tinuities, from 0V to 6V outputvoltages. In the LTC1435/LTC1435A,two input stages are used to coverthis range, so an overlap existstogether with a transition region. TheLTC1735/LTC1736 uses only oneinput stage and includes slope com-pensation that operates over the fulloutput voltage range. This allows theLTC1735/LTC1736 to be operated ingrounded RSENSE applications as well.

LTC1736 Additional FeaturesThe LTC1736 includes all the fea-tures of the LTC1735, plus 5-bitmobile VID control and a power-goodcomparator in a 24-lead SSOP pack-age. The window comparator monitorsthe output voltage and its open-drainoutput is pulled low when the divided

voltage is not within ±7.5% of the 0.8Vreference voltage.

The output voltage is digitally setto levels between 0.925V and 2.00Vusing the voltage identification (VID)inputs B0–B4. The internal 5-bit DACconfigured as a precision resistivevoltage divider sets the output volt-age in 50mV or 25mV incrementsaccording to Table 4. The VID codes(00000–11110) are compatible withthe Intel mobile Pentium® II proces-sor. The LSB (B0) represents 50mVincrements in the upper voltage range(2.00V–1.30V) and 25mV incrementsin the lower voltage range (1.275V–0.925V). The MSB is B4. When all bitsare low or grounded, the output volt-age is 2.00V.

The LTC1736 also has remote sensecapability. The top of the internalresistive divider is connected toVOSENSE and is referenced to the SGNDpin. This allows a Kelvin connectionfor remotely sensing the output voltagedirectly across the load, eliminatingany PC board trace resistance errors.

ApplicationsFigure 5 shows a 1.6V/9A applica-tion using the LTC1735. The inputvoltage can range from 6V to 26V.Figure 6 shows a VID applicationusing the LTC1736 optimized for out-put voltages of 1.6V to 1.3V with a 5Vto 24V input voltage range.

0.004Ω

CB1 0.22µF

C24.7µF

D2 MBRS- 340T3

VOUT0.9V–2.0V /12A

+VIN

CIN122µF30V

RCS1

CO3*820µF4V

+

+

M2FDS6680A

M1, M3FDS6680A×2

L1†

1.2µH

BOOST

PGND

BG

INT VCC

SW

TG

RUN/SS

COSC

SGND

SENSE+

VIN

EXT VCC

ITH

FCB

VOSENSE

SENSE–

LTC17361

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

COSC147pF

CC1330pF

C147pF

CC2

CS1, 1000pF

RC1 33k

100pFD1

CMDSH-3

R5 10Ω

R2 10Ω

EXT VCC

RF14.7Ω

CF10.1µF

JP2LATCH-OFF(DISABLED)

R6, 680k

INT VCC

ON

OFF

JP1BURST MODE FCB/SYNC

RUN

RS110Ω

CIN322µF30V

++

VO

PGOOD

B0

B1 B2

B3

B4

VID VCCVFB

C347pF

R1100k

INT VCC

PGOODC41µF

JP4ABCDE

LSB MSB

9

10

11

12

16

15

14

13

PANASONIC ETQP6F2R0HFA (201) 348-7522PANASONIC EEFVEOG181R

†*

Figure 6. High efficiency, VID programmable, 0.9V–2.0V/12A CPU power supply

Authors can be contactedat (408) 432-1900

Pentium is a registered trademark of Intel Corp.

continued on page 35


DESIGN FEATURES

New Universal Continuous-Time Filterwith Extended Frequency Range

by Max W. HauserIntroductionThe original LTC1562, described inthe February 1998 issue of this maga-zine, is a compact, quadruple 2ndorder, universal, continuous-time fil-ter that is DC accurate and userprogrammable for the 10kHz–150kHzfrequency range. The LTC1562 intro-duced Operational Filter buildingblocks, whose virtual-ground input,rail-to-rail outputs and precisioninternal R and C components satisfydiverse filter requirements and appli-cations compactly.1, 2, 3

The design of the LTC1562 entailedchoices in the internal R and C valuesand internal amplifiers, and theseelements were optimized to minimizewideband noise. The LTC1562-2 is anew product with the same blockdiagram, pinout and packaging, butoptimized for higher filter frequen-cies: 20kHz to 300kHz. The internalprecision R and C components andamplifiers are dif ferent in theLTC1562-2. Besides covering a fulloctave of frequencies (150kHz–300kHz) above the range of theLTC1562, the LTC1562-2 also over-laps the LTC1562’s utility in the range

20kHz to 150kHz. In this frequencyrange, the LTC1562-2 typically showsreduced large-signal distortion at acost of slightly more noise than withthe LTC1562. For example, a 100kHzdual 4th order Butterworth lowpassfilter with a ±5V supply, built with theLTC1562-2 and lightly loaded, exhib-ited 2nd-harmonic distortion of–103dB and 3rd-harmonic distortionof –112dB at 20kHz with an output of1VRMS (2.8VP-P), and maintained lowdistortion even with output swingsapproaching the full supply voltage(–83dB total harmonic distortion, orTHD, at 9.7VP-P output).

The LTC1562-2 is, therefore, theproduct of choice for applicationsabove 150kHz as well as for applica-tions in the 20kHz–150kHz range thatare especially distortion sensitive.Both the LTC1562 and the LTC1562-2can replace LC filters or filters builtfrom high performance op amps andprecision capacitors and resistors,with a total surface mount board areaof 155mm2 (0.24in2)—smaller than adime (the smallest US coin).

Comparison to the LTC1562The LTC1562-2 both resembles anddiffers from the LTC1562 as follows: The parts have identical pin

configurations and blockdiagrams (four independentlyprogrammable 2nd orderOperational Filter blocks withvirtual-ground inputs and rail-to-rail outputs).

In both products, the user canprogram the filter’s center-frequency parameter (f0) over awide range, using resistor valuesthat vary as the desired f0changes up or down from adesign-center value. In theLTC1562, this design-center f0 is100kHz; for the LTC1562-2, thevalue is 200kHz.

The LTC1562 is optimized forlower noise, the LTC1562-2 forhigher frequencies. Thus, asingle LTC1562 section candeliver 103dB SNR in 200kHzbandwidth (Q = 1), whereas asingle LTC1562-2 sectionsupports 99dB SNR in 400kHz.

V+

V–

SHDN

1562 F02

2ND ORDER SECTIONS

A

INV V1 V2

B

D C

INV V1 V2

INV V1 V2 INV V1 V2

SHUTDOWNSWITCH

SHUTDOWNSWITCH

AGND

V+

V–

–

+

+–

R2 RQ

VIN

V2 INV V1

1562 F01

C

1sR1C*

*R1 AND C ARE PRECISION INTERNAL COMPONENTS

ZIN

Figure 1. LTC1562-2 block diagram

Figure 2. Single 2nd order Operational Filter section (insidedashed line) with external components added: resistor forZIN gives lowpass at V2, bandpass at V1; capacitor for ZINgives bandpass at V2, highpass at V1.


DESIGN FEATURES

Each chip contains precision Rand C components equivalent toeight 0.25% tolerance capacitorsand four 0.5% toleranceresistors, as well as twelve opamps with rail-to-rail outputsand excellent high frequencylinearity.

Both circuits operate fromnominal 5V to 10V total supplies(single or split). Single-supplyapplications can use a half-supply, ground-reference voltagegenerated on the chip.

Both chips feature a power-downmode that drops the powersupply current to zero, except forreverse junction leakages (on theorder of 1µA total).

What the LTC1562-2 Can DoFigure 1 is an overall diagram andFigure 2 a per-section diagram for theLTC1562-2. These are identical to thediagrams for the LTC1562, except forthe values of the internal precisioncomponents in Figure 2. In theLTC1562-2, R1 is 7958Ω and C is100pF. External resistors can be com-bined with an LTC1562-2 section, asshown in Figure 2, to define a secondorder filter response with standard-ized parameters f0, Q and gain. Designequations and procedures appear inthe LTC1562-2 data sheet. Forexample, in Figure 2, R2 sets f0; RQ, amultiple of R2, sets Q; and ZIN setsboth the gain and the block’s func-tion. The 3-terminal blocks minimizethe number of external parts neces-sary for complete 2nd order sectionswith programmable f0, Q and gain.

A resistor for ZIN in Figure 2 givessimultaneous lowpass (at V3) andbandpass (at V1) responses. The datasheet describes other ways to exploitthe virtual ground INV input. Forexample, because the V1 output inFigure 2 shows a phase shift of 180°at the user-set center frequency, f0,summing a V1 output with a feedfor-ward path from the signal sourceyields a notch response,2 or with dif-ferent weighting, allpass (phaseequalization), as used in Figure 5

later in this article. Using capacitorstogether with the INV input’s sum-ming capability provides furtherpowerful techniques for zero andnotch responses (which, in turn,enable elliptic highpass and lowpassfiltering). For example, the two out-puts of each 2nd order section have a90° phase difference, so summing V1through a capacitor and V2 through aresistor, into another section’s vir-tual-ground input, gives the samenotch or allpass option mentionedabove but without devoting an addi-tional section for phase shift.4 Figures5 and 9, described later, use this RCnotch method. Moreover, a capacitorfor ZIN in Figure 2 yields simulta-neous highpass and bandpassresponses; the capacitor sets voltagegain, not critical frequencies, with arelationship of the form Gain = CIN/100pF in the LTC1562-2. Low levelsignals can exploit the built-in gaincapability, which raises filter SNRwith low input voltage amplitudes.Such abilities to tailor the use of eachblock and its built-in time constantsare reminiscent of an operationalamplifier—whence the term “opera-tional filter.”

DC performance includes a typicallowpass input-to-output offset of 3mVand outputs that swing (under load)to within approximately 100mV ofeach supply rail. An internal half-supply reference point (the AGND pin)generates a reference voltage for theinputs and outputs in single-supply

applications. The shutdown (SHDN)pin accepts CMOS logic levels and in20µs puts the LTC1562-2 into a“sleep” mode, in which the chip con-sumes approximately 1µA (the partwill default to this state if the pin isleft open). The 16-pin dies is pack-aged in a 20-pin SSOP (the extra pinsin the SSOP are substrate connec-tions, to be returned to the negativesupply for best performance).

The following application examplesare tailored for specific corner fre-quencies, which can be modified byproperly scaling the external com-ponents, as described in the datasheet and in LTC1562 applicationarticles.2, 3 Expert application assis-tance can be obtained by calling us at408-954-8400, x3761. Pin numbersin the figures that follow are for the20-pin SSOP package, where pins 4,7, 14 and 17 (not shown) are alwaystied to the negative power supply rail.As with other filters, achieving lownoise and distortion levels requireselectrically clean construction (as wellas equipment that can measure suchperformance).

Dual 4th Order 200kHzButterworth Lowpass FilterEach half of the circuit in Figure 3provides a classic 4th order lowpassgain roll-off (24dB per octave) with amaximally flat passband. This schematicincludes power supply connections for asplit ±5V supply, one of the optionsavai lable for any LTC1562-2

20

19

18

16

15

13

12

11

1

2

3

5

6

8

9

10

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

RIN2 7.87k

RQ2 10.2k

R22 7.87k

R24 7.87k

RQ4 10.2k

RIN4 7.87k

RQ3 4.22k

R23 7.87k

RIN3 7.87k

RQ1 4.22k

R21 7.87k

RIN1 7.87k

VIN2

VIN1

5V0.1µF 0.1µF

–5V*

VOUT1

VOUT2

*V– ALSO AT PINS 4, 7, 14 & 17ALL RESISTORS 1% METAL FILM

LTC1562-220-PINSSOP

Figure 3. Dual 4th order 200kHz Butterworth lowpass filter


DESIGN FEATURES

application (Figure 5, in a differentapplication, illustrates connectionsfor a single 5V supply). The circuit ofFigure 3 is a higher frequency varia-tion of a 100kHz dual 4th orderButterworth lowpass filter using theLTC1562, which appeared in theFebruary 1998 Linear Technologymagazine,1 as well as in the LTC1562data sheet. Figure 4 shows the mea-sured frequency response for one ofthe two filters in Figure 3. This ±5Vcircuit supports rail-to-rail inputs andoutputs, with output noise ofapproximately 60µVRMS, for a maxi-mum SNR of 95dB (compared to100dB with the LTC1562 equivalentat half as much bandwidth). THD in a1VRMS output (2.8VP-P) was measuredas –87dB at 50kHz and –72dB at100kHz.

256kHz Phase-Linearized6th Order Lowpass FilterData communication and some sig-nal antialiasing and reconstructionapplications demand filters with con-trolled phase (or time-domain)

responses. The circuit in Figure 5realizes a root-raised-cosine lowpassgain response (Figure 6). For datacommunications, this filter’s time-domain pulse response (Figure 7)approximates, in continuous time, theideal Nyquist-type property of cross-ing zero at a time interval that isequal to 1/(2fC). When used as apulse-shaping filter, this response hasthe special property of producing mini-mal intersymbol interference (ISI)among successive data pulses at adata rate of 2fC (512 kbits/second orksymbols/second for Figure 5) whilesimultaneously limiting the trans-mitted spectrum to a bandwidthapproaching the theoretical mini-mum, which is fC.5 Also, data or signalacquisition (before A/D conversion)or reconstruction (after D/A conver-sion) can benefit from the linear-phase(that is, constant-group-delay)response (typically ±300ns group

delay variation over the passband from0 to fC, evident in Figure 8).

The filter in Figure 5 achieves theseproperties by preceding a 6th orderlowpass section (the C, A, and D quar-ters of the LTC1562-2 chip, in thatsequence) with a 2nd order allpassresponse to linearize the phase. Thiscombination illustrates two practicaluses of the virtual-ground inputs inthe LTC1562-2. Combining two feed-forward paths (RFF1 from the inputand RB1 from a bandpass section inthe “B” quarter of the LTC1562-2)yields the allpass equalization. Sub-sequently, RIN4 and CIN4 sum togethertwo signals with 90° phase differencefrom the two outputs of the “A” quar-ter, with an additional 90° phasedifference caused by the capacitor, toachieve a stopband notch at a desiredfrequency.4 Figure 5 operates from asingle supply voltage from 5V to 10V(the AGND pin furnishes a built-in

GAIN

(dB)

10

0

–10

–20

–30

–40

–50

–60

–70

–80

50k 1.5MFREQUENCY (Hz)

100k

20

19

18

16*

15

13

12

11

1

2

3

5

6

8

9

10

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

LTC1562-220-PINSSOP

RB1 1.54k

RFF1 6.19k

RQ2 4.12k

R22 6.19k

R24 4.12k

RQ4 7.32k

RIN4 4.12k

RQ3 7.32k

R23 4.12k

RIN34.12k

RIN1 7.5k

RQ1 3.24k

R21 6.81k

VIN

5V0.1µF 1µF

VOUT


CIN422pF 5%

GAIN

(dB)

10

0

–10

–20

–30

–40

–50

–60

–70

–80

10k 1MFREQUENCY (Hz)

100k

INPUT1V/DIV

OUTPUT(INVERTED)200mV/DIV

1.953µs/DIV (= 1/512kHz)

DELA

Y (µ

s)

8

7

6

5

4

3

2

1

0

FREQUENCY (kHz)

50 100 150 200 250 300 350 400

Figure 4. Frequency response of one of thetwo filters in Figure 3

Figure 5. 256kHz linear-phase 6th order lowpass filter

Figure 6. Gain response of Figure 5’s circuit Figure 7. Time-domain response of Figure 5’scircuit

Figure 8. Group delay response of Figure 5’scircuit


DESIGN FEATURES

half-supply ground reference) andexhibits –80dB THD at 50kHz for a500mVRMS output with a 5V supply.

175kHz 8th OrderElliptic Highpass FilterIn Figure 9, three response notchesbelow the cutoff frequency suppressthe stopband and permit a narrowtransition band in a 175kHz high-pass filter, whose measured frequencyresponse appears in Figure 10. Eachnotch is produced by summing two180°-different currents into a virtual-ground “INV” summing input, onecurrent passing through an RIN andthe other (from a voltage 90° different

from the first) through a CIN.4 Thiscircuit exhibits only 44µVRMS of out-put noise over a 1MHz bandwidth andTHD of –70dB with a 200kHz signal,0.5VP-P output, operating from a 5Vtotal supply.

400kHz Dual6th Order Lowpass FilterAlthough it is outside the 300kHz f0limit recommended for best accuracy,this dual 6th order 400kHz Butter-worth lowpass filter (Figure 11)illustrates an extreme of bandwidthavailable from the LTC1562-2 withsome compromises. The high f0requires unusually small resistor val-

ues, resulting in heavier loading andan increase in distortion from theLTC1562-2; it was also necessary toadjust the RQ resistors in Figure 11downwards to correct for Q enhance-ment encountered when the designedf0 is very high.

The circuit of Figure 11 supple-ments the eight poles of filtering inthe LTC1562-2 by driving all four ofthe virtual-ground INV inputs fromR-C-R “T” networks (in place of resis-tors) and thus obtaining additionalreal poles (a method described in theoriginal LTC1562 application article1

and data sheet). Two such real polesreplace the Q = 0.518 pole pair of aconventional 6th order Butterworthpole configuration, to good accuracy.The measured frequency response ofone 6th order section appears in Fig-ure 12. With ±5V power, this circuitpermits rail-to-rail inputs and out-puts and exhibits THD, at 1VRMS(2.8VP-P) output, of –92dB at 50kHzand –79dB at 100kHz. Output noise

20

19

18

16

15

13

12

11

1

2

3

5

6

8

9

10

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

RIN2 20.5k

RQ2 26.7k

R22 10k

R24 4.02k

RQ4 3.24k

RIN4 40.2k

RQ3 59k

R23 11.3k

RQ1 9.09k

R21 7.15k

VIN

5V0.1µF 0.1µF

–5V*

VOUT

*V– ALSO AT PINS 4, 7, 14 AND 17ALL RESISTORS 1% METAL FILMALL CAPACITORS 5% STANDARD VALUES

LTC1562-220-PINSSOP

CIN1 220pF

CIN2 82pF

CIN3 47pF

RIN3 45.3k

CIN4 100pF

GAIN

(dB)

10

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

50k 900kFREQUENCY (Hz)

200k

20

19

18

16

15

13

12

11

1

2

3

5

6

8

9

10

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

LTC1562-220-PINSSOP

RIN2A1.43k

RIN2B576Ω

RQ2 2.26k

R22 2k

R24 2k

RQ4 2.26k

RIN4A1.43k

RIN4B576Ω

RQ3 6.19k

R23 2k

RIN3B576Ω

RIN1B 576Ω

RIN3A1.43k

RIN1A 1.43k

RQ1 6.19k

R21 2k

VIN2

VIN1

5V0.1µF 0.1µF

–5V*

VOUT1

VOUT2


C11000pF

5%C21000pF5%

C31000pF5% C4

1000pF5%

Figure 9. 175kHz 8th order elliptic highpass filter

Figure 10. Frequency response of Figure 9’scircuit

Figure 11. 400kHz dual 6th order Butterworth lowpass filter

GAIN

(dB)

10

0

–10

–20

–30

–40

–50

–60

1MFREQUENCY (Hz)

100k

Figure 12. Frequency response ofFigure 11’s circuit



DESIGN FEATURES

SOT-23 Switching Regulators DeliverLow Noise Outputs in a Small Footprint

by Steve PietkiewiczIntroductionAs portable electronics designers con-tinue to press for reduction incomponent sizes, Linear Technologyintroduces the LT1611 and LT1613SOT-23 switching regulators. Thesecurrent mode, constant frequencydevices contain internal 36V switchescapable of generating output powerin the range of 400mW to 2W, in a 5-lead SOT-23 package. The LT1613has a standard positive feedback pinand is designed to regulate positivevoltages. The LT1611 has a novelfeedback scheme designed to directlyregulate negative output voltageswithout the use of level-shifting cir-cuitry. Boost, single-ended primaryinductance converters (SEPIC) andinverting configurations are possiblewith the LT1613 and LT1611. Thehigh voltage switch allows hard-to-do, yet popular DC/DC converterfunctions like four cells to 5V, 5V to–5V, 5V to –15V or 5V to 15V to beeasily realized.

Both devices switch at a frequencyof 1.4MHz, allowing the use of tinyinductors and capacitors. Many ofthe components specified for use withthe LT1613 and LT1611 are 2mm orless in height, providing a low profilesolution. The input voltage range is1V to 10V, with 2mA quiescentcurrent. In shutdown mode, the qui-escent current drops to 0.5µA. The

constant frequency switching pro-duces low amplitude output ripplethat is easy to filter, unlike the lowfrequency ripple typical of pulse-skipping or PFM type converters.Internally compensated current modecontrol provides good transientresponse.

LT1613 Boost ConverterProvides a 5V OutputFigure 1’s circuit details a boost con-verter that delivers 5V at 200mA froma 3.3V input. The input can rangefrom 1.5V to 4.5V, making the circuitusable from a variety of input sources,such as a 2- or 3-cell battery, singleLi-Ion cell or 3.3V supply. Efficiency,shown in Figure 2, reaches 88% froma 4.2V input. Start-up waveforms froma 3.3V input into a 47Ω load are

pictured in Figure 3; the converterreaches regulation in approximately250µs. The device requires some bulkcapacitance due to the internal com-pensation network used. A 10µFceramic output capacitor can be usedwith the addition of a phase-leadcapacitor paralleled with R1; thiscapacitor is typically in the 10pF–100pF range.

LT1613 5V to 15VBoost ConverterBy changing the value of the resistivedivider, a 15V supply can be gener-ated in a similar manner to the 5Vconverter shown in Figure 1. Figure 4depicts the converter. L1’s value hasbeen changed to 10µH to provide thesame di/dt slope with a higher inputvoltage. The converter delivers 15V at60mA from a 5V input, at efficienciesup to 85%, as shown in the efficiencygraph of Figure 5.

LT1613 4-Cell to 5V SEPICA 4-cell battery presents a uniquechallenge to the DC/DC converterdesigner. A fresh battery measuresabout 6.5V, above the 5V output,while at end of life the battery voltagewill measure 3.5V, below the 5V out-put. Simple switching regulatortopologies like boost or buck can onlyincrease or decrease an input voltage,

VIN

VIN3.3V

VOUT5V/200mA

1613 • TA01

SW

L14.7µH D1

GND

LT1613

L1: MURATA LQH3C4R7M24 (814) 237-1431OR SUMIDA CD43-4R7 (847) 956-0666C1, C2: AVX TAJA156M010R (803) 946-0362D1: MOTOROLA MBR0520 (800) 441-2447

C115µF

C215µF

R2121k

R1374k

FBSHDN SHDN

+ +

LOAD CURRENT (mA)0 50 100 150 200 250 300 350 400

EFFI

CIEN

CY (%

)

1613 TA01a

100

90

80

70

60

50

VIN = 4.2V

VIN = 3.5V

VIN = 2.8V

VIN = 1.5V

VOUT1V/DIV

IL1500mA/DIV

SHDN5V/DIV

100µs/DIVFigure 1. This boost converter steps up a 1.5V to 4.2V input to 5V.It can deliver 250mA from a 3.3V input.

Figure 2. Efficiency of Figure 1’s boostconverter

Figure 3. Boost converter start-up with 3.3V input into a 50Ω load


DESIGN FEATURES

which will not do the trick in thissituation. The solution is a SEPIC. Adual-winding inductor or two sepa-rate inductors are required to makethis converter. Figure 6 details thecircuit. A Sumida CLS62-150 15µHdual inductor is specified in the appli-cation, although two 15µH units canbe used instead. Up to 125mA can begenerated from a 3.6V input. Figure7’s graph shows converter efficiency,which peaks at 77%. Transientresponse with a 5mA to 105mA loadstep is pictured in Figure 8. The con-verter settles to final value inside

200µs, with a maximum perturba-tion under 200mV. The double traceof VOUT under load in Figure 8 isactually switching ripple at 1.4MHzcaused by the ESR of output capaci-tor C2. A better (lower ESR) outputcapacitor will decrease the outputripple.

LT1611 5V to –5V Inverting ConverterA low noise –5V output can be gener-ated using an inverting topology withthe LT1611. This circuit, shown inFigure 9, bears some similarity to theSEPIC described above, but the out-put is in series with the secondinductor. This results in a very lownoise output. The circuit can deliver–5V at up to 150mA from a 5V input,or up to 100mA from a 3V input.Efficiency, described in Figure 10,peaks at 75%. Figure 11 illustratesthe start-up waveforms. During start-up, the switch-current increases toapproximately 1A. At this current,the inductance of the Sumida unitdecreases, resulting in the increased

VIN

VIN3V–7V

VOUT15V/50mA

1613 • TA01

SW

L110µH D1

GND

LT1613

L1: MURATA LQH3C100 (814) 237-1431C1: AVX TAJB226M016 (803) 946-0362C2: AVX TAJA475M025D1: MOTOROLA MBR0520 (800) 441-2447

C115µF

C222µF

R2121k

R11.37M1%

FBSHDN SHDN

+ +1nF

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)

85

80

75

70

65

60

55

50

1611 TA02

0 10 20 30 40 50 60

VIN = 3.6V

VIN = 6.5V

VIN = 5V

70 10080 90

VIN

VIN4V–7V

VOUT5V/175mA

1613 • TA01

SW

L1A15µH

D1

GND

LT1613

L1: SUMIDA CLS62-150 15µH (847) 956-0666C1, C2: AVX TAJA156M016 (803) 946-0362C3: X7R CERAMICD1: MOTOROLA MBR0520 (800) 441-2447

C115µF

C215µF

324k

FBSHDN SHDN

+

+

L1B15µH

1M

C30.22µF

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)

85

80

75

70

65

60

55

50

1611 TA02

0 25 50 75 100 125 150

VIN = 3.6V VIN = 5V

VIN = 6.5V

175 200 225 250

ripple current noticeable in the switch-current trace of Figure 11. After thecircuit has reached regulation, theripple current decreases by about afactor of two. Switching waveformswith a 100mA load are shown in Fig-ure 12. Output voltage ripple is causedby ripple current in the inductor mul-tiplied by output capacitor ESR.

Although the 20mVP-P ripple pic-tured in Figure 12 is low, significantimprovement can be obtained byjudicious component selection. Fig-ure 13 details the same 5 to –5V

VOUT100mV/DIV

AC COUPLED

105mA5mAILOAD

200µs/DIV

VIN

VIN5V

VOUT–5V/150mA

1613 • TA01

SW

L1A22µH

D1

GND

LT1611

L1: SUMIDA CLS62-220 22µH (847) 956-0666C1, C2: AVX TAJB226010 (803) 946-0362C3: X7R CERAMICD1: MOTOROLA MBR0520 (800) 441-2447

C122µF

C222µF

10k

NFBSHDN SHDN

+

+

L1B22µH

29.4k

C30.22µF

Figure 4. This 4-cell to 15V boost converter can deliver 50mAfrom a 3V input.

Figure 5. Efficiency of Figure 4’s circuit

Figure 6. This single-ended primary inductance converter (SEPIC)generates 5V from an input voltage above or below 5V.

Figure 7. Efficiency of Figure 6’s SEPICreaches 77%.

Figure 9. This inverting converter delivers –5V at 150mA froma 5V input.

Figure 8. SEPIC transient response at 5V input with a 5mA to 105mAload step


DESIGN FEATURES

converter function with better outputcapacitors. Now, output ripple mea-sures just 4mVP-P. Additionally,transient response is improved by theaddition of phase lead capacitor C5.Figure 14 depicts load transientresponse of a 25mA to 125mA loadstep. Maximum perturbation is under30mV and the converter reaches finalvalue in approximately 250µs.

It is important to take notice of howFigures 9 and 13 are drawn. D1’scathode is returned to the LT1611’sGND pin before both connect to theground plane. This connection com-bines the current of the switch anddiode, which conduct on alternatephases. The summation of both cur-rents equals a current with no abruptchanges, minimizing di/dt inducedvoltages caused by the few nanohen-ries of inductance in the ground plane.This summed current is then depos-

ited into the ground plane. If thistechnique is not followed, 100mVspikes can appear at the converteroutput (I speak from experience: myfirst several breadboards had thisproblem).

Many systems, such as personalcomputers, have a 12V supply avail-able. Although the LT1611 VIN pin

VOUT2V/DIV

ISW500mA/DIV

VSHDN5V/DIV

VOUT200mV/DIV

AC COUPLED

ISW100mA/DIV

VSW10V/DIV

100ns/DIV

VOUT20mV/DIV

AC COUPLED

125mA25mA

ILOAD

has a 10V maximum, the 36V switchallows a 12V supply to be used for theinductor while the LT1611’s VIN pin isstill driven from 5V, as indicated inFigure 13. Significantly more outputpower can be obtained in this man-ner, as illustrated in the efficiencygraph of Figure 15.

Figure 10. 5V to –5V inverting converterefficiency reaches 76%.

Figure 11. 5V to –5V inverting converter start-up into a 47Ω load

Figure 12. Switching waveforms of inverting converter with 100mA load

Figure 13. Low noise inverting converter; component selection andfeedforward capacitor C5 reduce noise to 4mVP-P.

Figure 14. Transient response of low noise inverting converter isunder 30mV for a 25mA to 125mA load step. Steady-state outputripple is 4mVP-P.

200µs/DIV

200µs/DIVLOAD CURRENT (mA)

EFFI

CIEN

CY (%

)85

80

75

70

65

60

55

50

1611 TA02

0 25 50 75 100 125 150

VIN = 3V

VIN = 5V

VIN

VIN5V

VOUT–5V/150mA

1613 • TA01

SW

L1A22µH

D1

GND

LT1611

L1: SUMIDA CLS62-220 22µH (847) 956-0666C1: AVX TAJB226010 (803) 946-0362C2: X7R CERAMICC3: Y5V CERAMICC4: SANYO POSCAP 10TPC68M (619) 661-6835D1: MOTOROLA MBR0520 (800) 441-2447

C122µF

C34.7µF

C468µF

10k

NFBSHDN SHDN

+

+

L1B22µH

29.4k

C20.22µF

C52.2nF

5V OR 12V(SEE TEXT)



DESIGN FEATURES

Versatile New Switching RegulatorFits in SO-8 by Craig Varga

IntroductionLinear Technology recently introducedthe LTC1530 synchronous buckregulator controller. Although pack-aged in an 8-pin SO, it has proven tobe remarkably capable and versatile.The part is loosely based on thepopular LTC1430, but with numerousenhancements. Features includecurrent limiting that senses the volt-age across the RDS(ON) of the high-sideMOSFET (no sense resistor required),built in soft-start, 1% accurate refer-ence, gate drivers capable of handlinglarge MOSFETs, and micropowershutdown. The error amplifier trans-conductance is higher than that ofprevious generation parts and istrimmed for accuracy and stabilizedover temperature. The IMAX current,which programs current limit, has apositive temperature coefficient to

help cancel the positive temperaturecoefficient of the MOSFET’s RDS(ON).This allows for more consistent cur-rent limit over temperature. Althoughintended primarily for buck regulatordesigns, the part has been successfullydesigned into boost, positive-to-negative and negative-to-positiveconverters.

A Quick Look at the InsidesFigure 1 is the basic block diagram.The LTC1530 is a voltage mode con-trol, synchronous buck regulatorcontroller. An on-chip oscillator gen-erates a 300kHz ramp waveform. Theoutput of the error amplifier is com-pared to this ramp by the PWMcomparator. So far, nothing extraor-dinary. Current-limit circuitry,however, is a little more unusual.

Instead of the traditional currentsense resistor, the LTC1530 relies onthe RDS(ON) of the high-side MOSFETas its source of load current informa-tion. This saves the space, cost andthe power dissipation of an additionalresistor in the power path. The pro-gramming current (IMAX) has a positivetemperature coefficient that approxi-mates the positive TC of a MOSFET’sRDS(ON). This tends to flatten the cur-rent-limit trip point as a function oftemperature. In a slight overload, theLTC1530 provides “square currentlimiting.” In other words, the regula-tor starts to look like a current source.In the event of a significant overload,should the output fall to less thanone-half of the nominal output volt-age, the soft-start capacitor will bedischarged very quickly. This forces

–+ – +

–

+

COMP

ICOMP

CSS

ISSMSS

DISDR

INTERNALOSCILLATOR

LOGIC ANDTHERMAL SHUTDOWN

POWER DOWN

4

–

+

VREF VREF – 3%

IFB

VREF + 3%

ERR MIN

gm = 2m

PWM

– +MAX

PVCC

FB

+

–

G2

G18

1

7

3 VSENSE

FB

FOR FIXEDVOLTAGEVERSIONS

3 VOUT

VREF

VREFVREF – 3%VREF + 3%

VREF/2

VREF/2

1530 BD

LVC

CC

6

IMAX

IMAX

5

HCL*MONOMHCL

*HCL = HARD CURRENT LIMIT

Ω

Figure 1. LTC1530 block diagram


DESIGN FEATURES

the regulator into shutdown for aperiod of time, typically a few milli-seconds. After the time delay, thesupply attempts to restart. If the over-load still exists, the hiccup modeoperation will continue. Once the shortis removed, the regulator will startnormally.

Unlike its predecessor, theLTC1530’s soft-start capacitor isinternal. The start-up rise time waschosen to satisfy the vast majority ofapplication requirements. Turn on isclean, well controlled and monotonic.

Since dynamic performance is ofextreme importance in many of today’ssystems, the LTC1530 incorporatesseveral features to provide improvedresponse times to load transients.First are the min/max comparators.

These are a pair of comparators thatcontinuously monitor the output volt-age. If the output is more than 3% oneither side of nominal, the appropri-ate comparator forces the duty factorto maximum or zero in an attempt torestore the output to the correct levelas quickly as possible. Eventually,the error amplifier and main feed-back loop will catch up and force theoutput to settle nicely. The error am-plifier is also an improvement overearlier designs. The transconduct-ance and output impedance have bothbeen increased substantially from theLTC1430 values. This has the effectof raising the DC open-loop gain ofthe amplifier, resulting in better lineand load regulation. Transconduct-ance is also trimmed to ensureaccuracy. The result is more predict-able and repeatable loop response.The amplifier gm is temperature com-pensated so loop gain stays nearlyconstant over temperature extremes.

The LTC1530 also has a low powershutdown mode. If the Comp pin ispulled to ground with an open collec-tor or open drain transistor, theLTC1530’s quiescent current will dropto approximately 45µA.

Virtually all integrated circuits havesome quirks that will get you in troubleif you don’t pay attention. TheLTC1530 is no exception. Care must

be taken in choosing the power MOS-FETs used in circuits that depend ona charge pump to supply gate-drivepower. It is essential to select a FETfor the upper device that will be almostfully enhanced before the PVCC sup-ply voltage reaches 8V with whatevermain input voltage happens to beavailable. Failure to heed thisrequirement can lead to a circuit thatmay not start up properly at all times.Standard logic-level FETs work fine.Be sure VTH is less than 2V in theworst case.

The cause of this start-up phe-nomenon is related to the way thecurrent limit circuit behaves. Below aPVCC level of 8V, current limit is dis-abled. Assume for the sake of thisdiscussion that the main input sup-ply is derived from 5V. At turn on, asthe charge pump gradually pushesthe PVCC supply upward, the current-limit circuit wakes up at 8V on PVCC.If the 5V supply is exactly 5V, the gatedrive available for the FET is only 3V(8V – 5V). If the FET’s RDS(ON) is veryhigh relative to its nominal value atthis point, the current-limit circuitmay activate in a misguided attemptto maintain control of the output cur-rent. If, at the same time, the outputvoltage has come up to less than one-half of its final value, the LTC1530will respond by discharging the soft-

1

4

3

2

5

8

6

7

PVCC

COMP

VFB

GND

IMAX

G1

IFB

G2

LTC1530S8

+

+

+12V

VIN5V

ON/OFF

C11µF16V

C41µF16V

C114.7µF, 16VKEMET Ta

C2–C3330µF, 6.3VKEMET Ta×2

Q32N7002

R1010k

C568pF

C61800pF

R510k

R4 750Ω

Q1IRF7805

Q2IRF7805

R3 100Ω

L13.5µH

ETQP6F3R5SFA

C132200pF

R61.0Ω

D1MBRS-130T3

C120.22µF

D2 BAT54S

OPTIONAL, INSTALL IF NO 12V

JP1 JP2 JP3

R775k1%1.5V

R868.1k1%1.8V

R920.5k1%2.5V

R211.3k1%3.3V

VOUT1.5V, 1.8V, 2.5V OR 3.3VAT 6A

C7270pF

R116.5k1%

C8–C10330µF6.3VKEMET Ta×3

VREF = 1.233V

Figure 2. 6A buck regulator; output voltage is jumper selectable for 1.5V, 1.8V, 2.5V or 3.3V.

Figure 3. Output voltage at turn-on for Figure2’s circuit


DESIGN FEATURES

start capacitor and trying to initiate arestart.

As long as the output voltage hasreached a level of greater than one-half of its final value before the PVCCvoltage reaches 8V, the output willcontinue to rise in current limit. If theoutput is below this level, start-up isnot ensured. If the PVCC supply isderived from a 12V source instead ofcharge pumped from the 5V supply,this problem cannot occur.

A Few Circuit ExamplesThe LTC1530 turns out to be a ratherversatile device. Although intendedas a buck regulator, the part has been

successfully used in boost and buck-boost designs. Figure 2 is a classicbuck topology. The circuit wasdesigned to handle approximately 6Awhile maintaining a low profile. Inputand output capacitors are tantalumdevices. The inductor is a very low DCresistance design for high efficiency.The input is 5V, while the outputvoltage can be jumper selected for3.3V, 2.5V, 1.8V or 1.5V. The photoin Figure 3 shows the output voltagerise at turn on. A clean, monotonicrise is evident.

Figure 4 is a 3A design that has atotal height of less than 2.4mm. Theinductor is a Gowanda part #50-324,

which mounts through a hole in thePCB for a total height above the boardof approximately 1.5mm. Outputripple voltage is approximately10mVP-P at a 3A load with the specifiedPanasonic SP series output capaci-tors. There are several options for themain inductor. The overall smallestsize available is an IHLP-2525 byDale Electronics. It’s 3mm tall butonly 6.4mm on a side. Output rippleis about 50% higher with this inductor.

Figure 5 is an example of a syn-chronous boost regulator. The inputis 3.3V and the output is 5V. Thecircuit is rated for a maximum outputcurrent of 6A. Since the output cur-

1

4

3

2

5

8

6

7

PVCC

COMP

VFB

GND

IMAX

G1

IFB

G2

LTC1530S8

+

+

VIN5V

C121µF16V

C41µF10V

C114.7µF16V

C2–C347µF, 6.3V×2

C768pF

C54700pF

R210k

R4 750Ω

Q1ASi4936DY

Q1BSi4936DY

R5 100Ω

L14.7µH

C110.1µF

D1 BAT54S

VOUT3.3V/3A

C8–C1056µF4V×3VREF = 1.233V

C6470pF

R116.9k1%

R710k1%

C2, C3, C8–C10: PANASONIC SP TYPE(201) 348-7522

L1: GOWANDA 50-324 (716) 532-2234OR DALE IHLP2525 (605) 665-1627(SEE TEXT)

+

5

4

3

2

1

7

6

8

IMAX

COMP

VFB

GND

PVCC

G2

IFB

G1

LTC1530S8

+

+

+C31µF16V

C1–C2470µF16V×2

C15100pF

C140.022µF

R112k

Q1IRF7801

Q2IRF7801

L2**10µH

VOUT5V/6A

C7, C8, C11470µF6.3V×3

C10470µF6.3V

VREF =1.233V

R271.5k1%

R323.2k1%

L1*2.5µH

+

LTC1517-5VIN

GND

VOUT

C1–

C1+

1

2

3

5

4

D3FMM914

C60.22µF

C1210µF16V

C131µF16V

C41µF X7R

C91µF X7R

VIN3.3V

D1MBR0530

D2MBR0530

C50.22µF

L1: PULSE PE-53681 (619) 674-8100L2: COILCRAFT DS3316P-102 (847) 639-6400

***

RS1(OPTIONAL, SEE TEXT)

Figure 4. 3.3V/3A regulator

Figure 5. 5V/6A synchronous boost regulator


DESIGN FEATURES

rent waveform is discontinuous, theoutput ripple is inherently large inany boost regulator. The second stageLC filter is added to clean things up abit. The feedback divider connects tothe output before the LC filter for areason. If the divider is connectedafter the LC filter, the extra 180° ofphase shift above the LC corner fre-quency will make the regulator’sfeedback loop unstable. The DC re-sistance of the inductor is small, sothe effect on load regulation is mini-mal.

The LTC1517 charge pump is usedto generate a sufficiently high voltagefor the LTC1530 to function correctlyand also to ensure adequate gatedrive for the power MOSFETs. It runsfrom the 3.3V input and delivers aregulated 5V output. Once the mainoutput comes into regulation, chargepump power is derived through D2.This causes the LTC1517’s regulatedoutput voltage set-point to be exceededand D3 back biases, shutting theLTC1517 down. Note that currentlimit is disabled in this design bygrounding IMAX and connecting IFB toVIN. Since in the boost topology thereis a direct DC path from input to

output, there is no point in using thecurrent limit feature except to protectagainst inductor saturation. It is alsoworth mentioning that the FET RDS(ON)cannot be used as the current senseresistor in this application becauseFET Q2’s drain is not common to VIN.If inductor saturation protection isdesirable, it is possible to install asmall value current sense resistorbetween C2 and L1. Install an appro-priate value resistor (RS1) between C2and L1; connect the IMAX pin to the C2side of RS1 (instead of ground) andconnect IFB directly to the input sideof L1. Just don’t expect the circuit tolimit current in the event of a shortcircuit.

Figure 6 is a positive input to nega-tive 5V output design. Since theLTC1530 needs to be referenced tothe –5V output, the design requiresexternal gate-drive circuitry for boththe main and synchronous FETs. Theabsolute maximum voltage rating ofthe LTC1530’s gate drive would beexceeded if the high-side gate weredriven directly. Q3 and the associatedparts at the input to the LTC1693gate driver provide the required level-shift function. The synchronous FET

is driven by the other half of theLTC1693. The driver is only requiredat this location to match the propaga-tion delay of the high-side drive.Failure to pay attention to these detailswill result in severely degraded effi-ciency. Output currents of up to 4Acan be obtained from this circuit.Like the boost regulator, the outputcurrents are discontinuous, so rippleon the output is somewhat high. Asmall, second-stage LC filter can eas-ily remedy this if desired.

ConclusionThe LTC1530 is a small, versatilecontroller that is usable in numeroustopologies and over a wide range ofpower levels. In the basic buck appli-cations for which it was designed, theLTC1530 permits the designer torealize very simple, low parts countdesigns that require minimal realestate. The part provides clean turn-on and current-limit characteristics.With a little ingenuity, it is possible todevelop circuits different than thosethat the part’s designers intended,but which give excellent performancenonetheless.

1

4

3

2

5

8

6

7

PVCC

COMP

VSENSE

GND

IMAX

G1

IFB

G2

LTC1530-ADJ

+

+

+

+ +

+

+

R31.3k

C227µF

R42.0k

C310µF

C40.1µF

Q42N3906

C11000pF

RC4.7k

CC0.22µF

R12.7k

R8470Ω1/4W

R9 1k

D2MBR0530T1

D1MBR0530T1

Q32N7002

C74.7µF

C60.1µF3

65

4

Q1

Q2

CIN

VOUT–5V/5ACOUT

L12.5µH

87

2

1

C84.7µF

1/2 LTC1693-2

1/2LTC1693-2

R1047Ω

D31N4148

C56.8µF

R2100Ω

D41N4148

R61k

R52.96k

VIN 5V

PANASONIC ETQP6F2R5FA(201) 348-75223× SANYO 10MV1200GX4× SANYO 6MV1500GX(619) 661-6835SUD50N03-10

L1:

CIN:COUT:

Q1, Q2:

R7 3.3Ω

Figure 6. 5V to –5V/4A synchronous switching, inverting polarity converter


DESIGN FEATURES

16-Bit Parallel DAC Has 1LSB Linearity,Ultralow Glitch and Accurate4-Quadrant Resistors by Patrick Copley

Today’s fast paced marketplace hasdeveloped a major appetite for highresolution, high accuracy, fast digi-tal-to-analog converters. Systemrequirements in instrumentation,automatic test equipment, communi-cations, waveform generation, dataacquisition and feedback control sys-tems, among many other applications,have fueled the need for 16-bit digital-to-analog converters. Not only doesthe converter need to meet the strin-gent speed and accuracy requirementsof the system, it needs to do so in bothunipolar (0V to 10V) and bipolar (±10V)modes of operation without degrada-tion. To meet and exceed theserequirements, Linear Technologyintroduces its LTC1597 16-bit paral-lel, current output, low glitch,multiplying DAC with 4-quadrantresistors. Key features of the newDAC include:

±1LSB maximum INL and DNLover the industrial temperaturerange

On-chip 4-quadrant resistorsallow precise 0V to 10V, 0V to–10V or ±10V outputs

Ultralow, < 1nV-s midscale glitchimpulse

Small 28-pin SSOP package

Low supply power consumption:10µW typical

Pin-compatible with the LTC159114-bit parallel, current output,low glitch, multiplying DAC with4-quadrant resistors.

Unique Featuresof the LTC1597The LTC1597 operates from a single5V supply and provides both unipolar

0V to –10V or 0V to 10V and bipolar±10V output ranges from a 10V or–10V reference input using a single ordual external op amp. The deviceachieves bipolar operation using threeadditional on-chip precision resistors.The DAC consists of a precision thin-film R/2R ladder for the thirteen LSBs.The three MSBs are decoded intoseven segments of resistor value R, asshown in Figure 1. R is nominally48k. Each of these segments and theR/2R ladder carry an equally weightedcurrent of one-eight of full-scale. Thefeedback resistor, RFB, and 4-quad-rant resistor, ROFS, have a value of R/4. 4-quadrant resistors R1 and R2have a magnitude of R/4.The reference pin presents a constantinput impedance of R/8 in unipolarmode and R/12 in bipolar mode. Theoutput impedance of the current out-put pin, IOUT1, varies with DAC code.

96k 12k12k

96k

48k

96k

48k

96k

DECODER

D15(MSB)

D13D14

D15

D12 D11 D0(LSB)LOAD

VCC

REF

RFB

RFB

IOUT1

AGND

CLR28

DGND22

1597 BD

DAC REGISTER

48k 48k 48k 48k 48k 48k 48k

R212k

8

23

R1 3

RCOM 2

1

LD

9

10

D14

11

D4

21

D3

24

D2

25

D0

27

D1

26

WR

7

6

ROFS

ROFS

4

• • •

R112k

WR INPUT REGISTER

• • • •

RST

RST

5

Figure 1. The LTC1597 16-bit CMOS DAC uses a precision thin-film modified R/2R architecture to provide unsurpassed accuracy and stability.Accurate 4-quadrant multiplication applications are now possible with on-chip resistors R1, R2 and ROFS. A built-in deglitcher reduces glitchimpulse to 1nV-s.


DESIGN FEATURES

An added feature of the LTC1597 isa proprietary deglitcher that reducesthe glitch energy to below 1nV-s overthe DAC’s output voltage range.

The LTC1597 has a 16-bit parallelinput data bus and is double bufferedwith two 16-bit registers. The doublebuffered feature permits the updat-ing of several DACs simultaneously.The WR signal updates the input reg-ister and the LD signal loads the DACregister. The deglitcher is activatedon the rising edge of the LD signal.

The versatility of the interface alsoallows the use of the input and DACregisters in a master/slave or edge-triggered configuration. This mode ofoperation occurs when WR and LDare tied together to act as a clocksignal.

The asynchronous clear pin (CLR)resets the LTC1597 to zero scale andthe LTC1597-1 to midscale. CLR re-sets both the input and DAC registers.The LTC1597 also features a power-on reset.

16-Bit AccuracyOver TemperatureThe LTC1597 has ultralow linearitydrift of well below ±0.2LSB from–45°C to 85°C. This allows theLTC1597 to hold its accuracy of 1LSBintegral nonlinearity (INL) and differ-ential nonlinearity (DNL) over timeand temperature. In the past, theonly DACs that approached thisaccuracy over temperature were ofthe autocalibrated type. These DACswere very large, very expensive andtherefore not very practical for mostapplications.

Figures 2a and 2b show the typicalINL and DNL curves of the LTC1597.The outstanding 0.25LSB INL, 0.15LSB DNL (typical) and very low driftallow a maximum 1LSB specificationover the extended industrial tempera-ture range. For optimum performance,the REF pin of the LTC1597 should bedriven by a source impedance of lessthan 1kΩ. However, the DAC has beendesigned to minimize sourceimpedance effects. An 8kΩ sourceimpedance degrades both INL andDNL by a mere 0.2LSB.

Fast Settling:Less than 2µs to within0.0015% of Full-ScaleNow system designers no longer haveto make tough decisions in the trade-off between accuracy and speed. Thesolution is here. The combination ofthe LTC1597 DAC and the LT1468 opamp provides an industry first: superb16-bit settling of less than 2µs for a10V step while maintaining 1LSB DCaccuracy.

Figure 3 shows the application cir-cuit for unipolar mode. Figure 4 showsthe resulting full-scale 10V step set-tling time of the LTC1597/LT1468combination. With a 20pF feedbackcapacitor, the optimized settling timeto 0.0015% is an amazing ≈1.7µs. A

DIGITAL INPUT CODE0

–1.0

INTE

GRAL

NON

LINE

ARIT

Y (L

SB)

–0.8

–0.4

–0.2

0

1.0

0.4

16384 32768

1597 G01

–0.6

0.6

0.8

0.2

49152 65535

DIGITAL INPUT CODE0

–1.0

DIFF

EREN

TIAL

NON

LINE

ARIT

Y (L

SB)

–0.8

–0.4

–0.2

0

1.0

0.4

16384 32768

1597 G02

–0.6

0.6

0.8

0.2

49152 65535

VCC

LTC1597

RFB

RFBROFS

ROFS

5V

LD

LD

3 2

9 8 28

23

7

22

R1 RCOM

1REF

4 5

0.1µF

6IOUT1

20pF

VOUT =0V TO –VREF

1591/97 F01b

AGND

DGND

WR

10 TO 21,24 TO 27

WR

CLR

CLR

VREF

–

+LT1468 16-BIT DAC

R1 R2

16DATA

INPUTS

Unipolar Binary Code Table

DIGITAL INPUTBINARY NUMBERIN DAC REGISTER

–VREF (65,535/65,536)–VREF (32,768/65,536) = –VREF/2–VREF (1/65,536)0V

LSB

1111 1111 11110000 0000 00000000 0000 00010000 0000 0000

ANALOG OUTPUTVOUT

MSB

1111100000000000

Figure 2. The outstanding INL and DNL(typically less than 0.25LSB) and very lowlinearity drift allow a maximum 1LSB spec tobe guaranteed over the industrial tempera-ture range.

Figure 3. With a single external op amp, the LTC1597 performs 2-quadrant multiplication with±10V input and 0V to –VREF output. With a fixed –10V reference, it provides a precision 0V to10V unipolar output.

500ns/DIV

GATEDSETTLING

WAVEFORM500µV/DIV

LD PULSE5V/DIV

Figure 4. When used with the LT1468 and a20pF feedback capacitor (see Figure 3), theLTC1597 can settle in an amazing 1.7µs towithin 0.0015%. The top trace shows the LDpulse; the bottom trace shows the gatedsettling waveform settling to 1LSB in 1.7µs.

2a.

2b.


DESIGN FEATURES

detailed discussion of 16-bit settlingtime can be found in Linear Technol-ogy Application Note 74, “Componentand Measurement Advances Ensure16-Bit DAC Settling Time.”

The ability to minimize settling timeis limited by the need to null the DACoutput capacitance, which varies from70pF to 115pF, depending on code.This capacitance at the amplifier inputcombines with the feedback resistorto form a zero in the closed-loop fre-quency response in the vicinity of200kHz–400kHz. Without a feedbackcapacitor, the circuit will oscillate.The choice of 20pF stabilizes the cir-cuit by adding a pole at 1.3MHz tolimit the frequency peaking and alsooptimizes settling time. The settlingtime to 16-bit accuracy is theoreti-cally bounded by 11.1 time constantsset by the feedback resistance andcapacitance.

Ultralow 1nV-s GlitchGlitches in a DAC’s output when itupdates can be a big problem in pre-cision applications. Usually, theworst-case glitch occurs when theDAC output crosses midscale. TheLTC1597’s new proprietary deglitcherreduces the output glitch impulse to1nV-s, which is at least ten timeslower than any of the competition’s16-bit voltage output DACs. In addi-tion, the deglitcher makes the glitchimpulse uniform for any code. Figure

5 shows the output glitch for a mid-scale transition with a 0V to 10Voutput range.

Unipolar 0V to 10V Outputswith a Single Op AmpFigure 3 shows the circuit for a 0V to10V output range. The DAC uses anexternal reference and a single opamp in this configuration. This cir-cuit can also perform 2-quadrantmultiplication where the REF pin isdriven by a ±10V AC input signal andVOUT swings from 0V to –VREF.

TIME (µs)0 1 2 3 4

OUTP

UT V

OLTA

GE (m

V)

0

1595 03 .eps

–10

+10COMPETITOR’S DAC

LTC15971nV-s TYP

FREQUENCY (Hz)

–90

SIGN

AL/(N

OISE

+ D

ISTO

RTIO

N) (d

B)

–70

–50

–40

10 1k 10k 100k

1591/97 G03

–110100

–60

–80

–100

VCC = 5V USING AN LT1468CFEEDBACK = 30pFREFERENCE = 6VRMS

500kHz FILTER

80kHz FILTER

30kHz FILTER

FREQUENCY (Hz)

–90

SIGN

AL/(N

OISE

+ D

ISTO

RTIO

N) (d

B)

–70

–50

–40

10 1k 10k 100k

1591/97 G04

–110100

–60

–80

–100

VCC = 5V USING TWO LT1468sCFEEDBACK = 15pFREFERENCE = 6VRMS

500kHz FILTER

80kHz FILTER30kHz FILTER

FREQUENCY (Hz)

–90

SIGN

AL/(N

OISE

+ D

ISTO

RTIO

N) (d

B)

–70

–50

–40

10 1k 10k 100k

1591/97 G05

–110100

–60

–80

–100

VCC = 5V USING TWO LT1468sCFEEDBACK = 15pFREFERENCE = 6VRMS

500kHz FILTER

80kHz FILTER

30kHz FILTER

VCC

LTC1597-1

RFB

RFBROFS

ROFS

5V

LD

LD

3 2

9 8 28

23

7

22

R1 RCOM

1REF

4 5

0.1µF

6IOUT1

33pF

VOUT =–VREFTO VREF

1591/97 F02b

AGND

DGND

–

+

1/2 LT1112

WR

10 TO 21,24 TO 27

WR

CLR

CLR

VREF

–

+1/2 LT111216-BIT DAC

R1 R2

16DATA

INPUTS

Bipolar Offset Binary Code Table


VREF (32,767/32,768)VREF (1/32,768)0V–VREF (1/32,768)–VREF

LSB

1111 1111 11110000 0000 00010000 0000 00001111 1111 11110000 0000 0000

ANALOG OUTPUTVOUT

MSB

11111000100001110000Figure 5. The proprietary deglitcher reduces

the output glitch to less than 1nV-s, which isten times less than any other 16-bit, voltage-output DAC. Further, the deglitcher makesthe glitch uniform, independent of code.

Figure 6. LTC1597 multiplying-mode signal-to-noise vs frequency

6a. Unipolar-mode full-scale: the noise anddistortion (N + D) is less than –96dB for signalfrequencies up to 30kHz. Out to 100kHz, theN + D is less than –78dB.

6b. Bipolar-mode zero-scale: the N + D is lessthan –96dB for signal frequencies up to30kHz. Out to 100kHz, the N + D is less than–82dB.

6c. Bipolar-mode full-scale: the (N + D) is lessthan –96dB for signal frequencies up to30kHz. Out to 100kHz, the N + D is less than–79dB.

Figure 7. With a dual op amp, the LTC1597 performs 4-quadrant multiplication. With a fixed10V reference, it provides a ±10V bipolar output. For fast bipolar settling applications, anLT1468 can be used for the output amplifier.


DESIGN FEATURES

0.92LSB (140µV) at 17 bits for roomtemperature. The circuit uses theLTC1597 in its unipolar mode withthe reference input inverted (–VREF,by means of R1 and R2 and an exter-nal op amp) for the output voltagerange 0V to VREF. When the sign bitchanges, the analog switch changesthe reference input polarity to nonin-verting (VREF) for the output range 0Vto –VREF.

94dB SFDRDigital Sine Wave GeneratorFigure 9 shows the circuit diagramfor a variable frequency digital wave-form generator. The circuit shows thebipolar configuration for the LTC1597but the unipolar configuration willwork just as well. For a samplingfrequency of 50kHz and an outputsine wave frequency of 1kHz, the sec-ond harmonic distortion is –94dB andthe third harmonic is –101dB. Theon-chip deglitcher circuit minimizesthe code-dependent glitch (which

–

+

–

+

LTC203AC

LTC1236A-10

LT1468

2 6

4

16 15 14

1 2 3

15pF

R1 R2

R1 RCOM REF3 2 1 23 4 5

ROFS

ROFS

RFB

RFB

SIGN BIT

16 DATAINPUTS

10 T0 2124 TO 27

LTC1597

5V

0.1µF

16-BIT DAC LT1468

I0UT

AGND

DGND22

7

6

20pF

VOUT

LD

LD

9 8 28

WR

WR

CLR

CLR

VREF

Bipolar Sign Magnitude Code Table


VREF (65,535/65,536)VREF (1/65,536)0V0V–VREF (1/65,536)–VREF (65,535/65,536)

LSB

1111 1111 11110000 0000 00010000 0000 00000000 0000 00000000 0000 00011111 1111 1111

ANALOG OUTPUTVOUT

MSB

111100000000000000001111

SIGN

111000

15V

Bipolar ±10V Outputwith Two Op AmpsThe LTC1597 contains all the 4-quad-rant resistors necessary for bipolaroperation. For a fixed 10V reference,the circuit shown in Figure 7 gives aprecision –10V to 10V output swing,with a minimum of external compo-nents: a feedback capacitor and adual op amp. The bipolar zero error is8LSB maximum over temperature. Iftwo LT1468 op amps are used insteadof the LT1112, the circuit can per-form wider bandwidth 4-quadrantmultiplication, where the referenceinput is driven by a ±10V AC inputsignal and VOUT swings ±10V .Figure 6 shows a graph of the multiply-ing mode total harmonic distortion andnoise of the LTC1597/LT1468 combi-nation in both unipolar and bipolar

modes of operation. For AC signals lessthan 40kHz, the THD+noise is superb(better than 90dB) and is still very goodout to 100kHz (78dB). Filtering at theoutput of the LT1468 is necessary toreduce the noise bandwidth to accept-able levels. The wider the bandwidth,the higher the noise floor.

17-Bit Sign Magnitude DACGives Perfect Bipolar ZeroFigure 8 shows a novel application ofthe LTC1597, a 17-bit sign magni-tude DAC, and the resulting outputcoding. This circuit has an extremelyaccurate bipolar zero error, which isthe offset voltage of the current-to-voltage op amp plus the bias currenttimes the DAC feedback resistor. Forthe LT1468, this corresponds to amaximum bipolar zero error of

Figure 8. This 17-bit sign-magnitude DAC uses the LTC1597 in its unipolar mode with the reference bit inverted (–VREF) for the output range 0Vto VREF. When the sign bit changes, the analog switch changes the reference input polarity to noninverting (VREF) for the output range 0V to–VREF. The resulting circuit produces an impressive bipolar zero error of 140µV (0.92LSB) max at room temperature—less than 1LSB at 17 bits.


DESIGN FEATURES

–

+

LTC1236A-102 6

4

R1 R2

R1 RCOM REF3 2 1 23 4 5

ROFS

ROFS

RFB

RFB

16 DATA INPUTS

10 T0 2124 TO 27

LTC1597

5V

0.1µF

16-BIT DAC LT1468

I0UT

AGND

DGND22

7

6

15pF

LD

9 8 28

WR CLR

CLR

10V15V

LOWPASSFILTER

–

+LT1001

SINE ROMLOOKUPTABLE

PHASEREGISTER

CLOCK

PHASETRUNCATION

16 BITS

PARALLELDELTAPHASE

REGISTERM

SERIALOR BYTE

LOADREGISTER

FREQUENCY CONTROL

Σ

PHASE ACCUMULATORn = 24–32 BITS

n n n

n

n nSERIAL OR PARALLEL

DATA INPUT

fC

M • fC2n

fO =

CODE

0

DAC

OUTP

UT E

RROR

32,768

1720 G01

65,535

DAC TRANSFER CURVE WITH IDEAL OP AMP

DAC TRANSFER CURVE WITH VOS IN CURRENT-TO-VOLTAGE OP AMP

OFFSET ERROR =VOSI-to-V

GAIN ERROR =VOSI-to-V

UNIPOLAR MODE

CODE0

DAC

OUTP

UT E

RROR

32,768

1720 G01

65,535

GAIN ERROR =2VOSI-to-V + 4VOSINV

BIPOLAR ZERO ERROR =3VOSI-to-V + 2VOSINV

DAC TRANSFER CURVE WITH IDEAL OP AMP

NEGATIVE FULL-SCALEERROR = 2VOSI-to-V

DAC TRANSFER CURVE WITH VOS IN CURRENT-TO-VOLTAGEOP AMP AND REF INVERTING OP AMP

BIPOLAR MODE

Figure 9. This digital waveform generator produces a 1kHz sine wave with a second harmonic distortion of –94dB. The sampling frequency is 50kHz.

Figure 10. The effect of op amp offset on the LTC1597 gain and offset errors in unipolar mode (left) and bipolar mode (right); op amp offsethas virtually no effect on DAC linearity; it merely shifts the end points.

reifilpmA

snoitacificepSreifilpmA

V SOVµ

IBAn

A LOVm/V

egatloVesioN

/Vn zHesioNtnerruC

/Ap zHetaRwelS

sµ/V

htdiwdnaBniaGtcudorP

zHM

rewoPnoitapissiD

Wm

1001TL 52 2 01

7901TL 05 53.0 41 800.0

)laud(2111TL 06 52.0 41 800.0

)laud(4211TL 07 02 7.2 3.0

8641TL 57 01 5 6.0

Table 1. Amplifiers recommended for use with the LTC1597, with relevant specifications

008

0001

0051

0004

0005

21.0 52.0

2.0

61.0

5.4

22

8.0

7.0

57.0

5.21

09

64

11

pmapo/5.01

pmapo/96

711


DESIGN FEATURES

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)

85

80

75

70

65

60

55

50

1611 TA02

0 50 100 150 200 250 300 350

VIN

VIN3.6V–7V

VOUT–10V/60mA

1613 • TA01

SW

L1A15µH

D1

GND

LT1611

L1: SUMIDA CL562-150 (847) 956-0666C1: AVX TAJB226M010 (803) 946-0362C2: X7R CERAMICC3: AVX TAJA685M016D1: MOTOROLA MBR0520 (800) 441-2447

C122µF

C36.8µF

10k

NFBSHDN SHDN

+

+

L1B15µH

68.1k

C20.22µF

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)

85

80

75

70

65

60

55

50

1611 TA02

0 25 50 75 100 125 150

VIN = 3.6VVIN = 5V

VIN = 6.5V

LT1611 4-Cell to –10VInverting ConverterA –10V low noise output can be gen-erated in a similar manner as the –5Vcircuit described above. Figure 16’scircuit can deliver –10V at up to 60mAfrom a 3.6V input. Efficiency, graphedin Figure 17, reaches a high of 78%.

ConclusionThe flexibility of individually controlledoutputs in multiple-supply applica-tions can make several LT1611/LT1613 converters attractive com-pared to a multiple-output flyback

Figure 15. 12V supply at L1A increasesefficiency to 81% and output current to350mA.

Figure 16. 4-Cell to –10V inverting converter delivers 75mA from a 4V input.

Figure 17. 4-cell to –10V converter efficiency

design with one large switching regu-lator and a custom transformer.Changing an output voltage on amultiple output flyback requireschanging the transformer turns ratio,hardly a simple task. Conversely,individual control of each output, us-ing the multiple LT1611/LT1613approach, provides for complete con-trol of each output voltage as well assupply sequencing. The LT1611 andLT1613 SOT-23 switchers providesmall, low noise solutions to powergeneration needs in tight spaces.

LT1611/LT1613, continued from page 13

causes distortion) by making the glitchimpulse both ultralow and uniformwith code.

Op Amp SelectionConsiderationsA significant advantage of theLTC1597 is the ability to choose theI-to-V output op amp to optimize sys-tem accuracy, speed, power and cost.Table 1 shows a sampling of op ampsand their relevant specifications forthis application.

The LTC1597 is designed to mini-mize the sensitivity of INL and DNL toop amp offset; this sensitivity hasbeen greatly reduced compared to thatof competing multiplying DACs. Fig-ure 10 summarizes the effects of opamp offset for both modes of opera-tion. Note that the bipolar LSB size istwice its unipolar counterpart. As Fig-ure 10 shows, op amp offset has aminimal effect on DAC linearity; itmerely shifts the end points.

The amplifier’s input bias current,which flows through the feedbackresistor, adds to the output offsetvoltage. The amplifier’s finite DC open-loop gain also degrades accuracy. TheDAC gain error is inversely propor-tional to the open-loop gain andfeedback factor of the op amp. Inunipolar mode at full-scale the feed-back factor is 0.5; for a 0.2LSB of gainerror (REF = 10V) at 16 bits, the open-loop amplifier gain should be greaterthan 650,000.

The op amp’s input voltage andcurrent noise also limit DC accuracy.Noise effects accuracy similarly tovoltage and current offsets and addsin an RMS fashion. As with any pre-cision application, and with widebandwidth amplifiers in particular,the noise bandwidth should be mini-mized with a filter on the output of theop amp to maximize resolution.

Referring to Table 1, the LT1001provides excellent DC precision, lownoise and low power dissipation. TheLT1468 provides the optimum solu-tion for applications requiring DCprecision, low noise and fast 16-bitsettling.

Conclusion:Wherever system requirementsdemand true 16-bit accuracy overtemperature, the LTC1597 providesthe best solution. The LTC1597 hasoutstanding 1LSB linearity overtemperature, ultralow glitch impulse,on-chip 4-quadrant resistors, lowpower consumption, asynchronousclear and a versatile parallelinterface.Combined with the LT1468op amp, the LTC1597 provides thebest in its class, 1.7µs settling time to0.0015%, while maintaining superbDC linearity specifications.


DESIGN FEATURES

Fast Rate Li-Ion Battery Chargerby Goran PericaIntroduction

The recent trend in notebook com-puters has been toward increasingbattery operating time and fasterprocessor speeds. These two require-ments, in conjunction with a need forfaster battery recharging (1–2 hours)have placed a strain on battery charg-ing circuits and wall adapters. Atypical notebook computer systemconfiguration is shown in Figure 1.

Wall adapters are typically AC/DCconverters with a 20V output at3A–4A of load current. When a note-book computer is running, all of theavailable current from the wall adaptermay be consumed by the system,with no power left for charging thebattery. However, as soon as thesystem’s power requirements dropbelow the wall adapter’s current limit,the battery charging can resume. Inorder to recharge the battery in theshortest time possible, the recharg-ing should start as soon as there isany current left over from the system.The ideal situation is when the sum ofbattery charging current and the sys-tem current is just below the walladapter’s current limit:

IIN_MAX > ISYS + ICHARGER

where IIN_MAX is the wall adapter cur-rent limit, ISYS is the system loadcurrent and ICHARGER is the batterycharger current.

To achieve this objective, it is nec-essary to adjust the battery chargercurrent so that the sum of the twocurrents is just below the maximumavailable input current, IIN_MAX. The

LT1505 incorporates a patented bat-tery charger input current limitingfunction along with other functionsnecessary to provide a complete,single-chip battery charging circuitsolution.

LT1505 FeaturesThe LT1505 is a constant-current(CC), constant-voltage (CV) currentmode switching battery charger cir-cuit with the following features: 0.5% voltage reference 5% output current regulation Output voltage is preset for 3 or 4

Li-Ion cells (12.3V, 12.6V, 16.4Vand 16.8V)

Output voltage is programmablefrom 1V to 21V

Low VIN-to-VOUT operation(dropout <0.5V)

Programmable AC wall adaptercurrent limiting

Programmable peak batterycharging current

Battery drain <10µA in shutdown 94% efficiency

Circuit DescriptionThe LT1505 is a synchronous buckconverter using N-channel MOSFETs.The LT1505 operates at 200kHz andcan be synchronized to an externalclock with a frequency higher than240kHz. The LT1505 IC has anundervoltage lockout circuit thatdetects the presence of an input powersource and enables the battery charg-ing. Once the undervoltage lockouthas been exceeded, the PWM will start

running and the input MOSFET M3 isturned ON, thus reducing the voltagedrop across its internal body diodeDBODY (see Figure 2).

The LT1505 monitors the currentfrom the wall adapter and controlsthe battery charger current. Forexample, if a 3A, 20V wall adapter isused along with a 12.6V Li-Ion bat-tery pack, the peak battery chargingcurrent, when the system is off, canbe set to:

IBATT MAX = η × IIN_MAX × VIN/VBATT

where IBATT MAX is the maximum bat-tery charging current when the systemis idle, η is the efficiency of batterycharger, VIN is the wall adapter out-put voltage and VBATT is the batterycharging voltage.

Assuming an efficiency of 90%, theabove example could provide batterycharging current in excess of 4A. TheLT1505 will reduce the battery charg-ing current as soon as the systemcurrent exceeds (IIN_MAX – ICHARGER).For example, if a 20V, 3A wall adapteris used and the system draws 2A fromthe adapter, the available current forcharging the battery will be ICHARGER =1A. The resulting battery chargingcurrent IBATT will be:

IBATT = η × ICHARGER × VIN/VBATTorIBATT = 0.9 × 1A × 20V/12.6V = 1.428A

The input current from the walladapter passes through a currentsense resistor, RS4. One part of theinput current goes to the system loadand the remaining part goes to theLT1505 battery charger. The voltagedrop across RS4 is monitored by acurrent comparator with a 90mVthreshold. Once the threshold of 90mVis reached, the LT1505 will reducethe programmed battery charging cur-rent so that the peak input currentdoes not exceed the preset limit. Thus,the maximum input current (IIN_MAX)will be:

IIN_MAX = ISYSTEM + ICHARGER = 0.090V/RS4

INPUT FROMWALL ADAPTER

INPUTCURRENT

SENSE

Li-IonBATTERY

SYSTEMLOAD

LT1505BATTERYCHARGER

Figure 1. Typical notebook computer power supply


DESIGN FEATURES

where ISYSTEM is the system load cur-rent, ICHARGER is the LT1505 batterycharger current and RS4 is the cur-rent sense resistor. With the resistorvalue of 0.025Ω in Figure 2, the inputcurrent limit IIN_MAX will be set to3.6A.

The battery charging current limitis set by RPROG, RS1 and RS2 and is:

IBAT_MAX = (VPROG/RPROG) × (RS2/RS1)

where VPROG is the reference voltageof 2.465V. The values in Figure 2 havebeen selected for a current limit(IBAT_MAX) of 4A. Changing RS1 to0.050Ω will set the IBAT_MAX to 2A.

Also, the peak battery chargingcurrent (IBAT_MAX) can be programmedby the host computer. The IBAT_MAXcan be set in increments of 0.25A ifRPROG is replaced by a network ofresistors, as shown in Figure 3.

The battery charger in Figure 2achieves high efficiency thanks tosynchronous operation and inputpower FET. The efficiency is as highas 94%, as can be seen in Figure 4.

PCB LayoutWhen laying out the PCB, a multilayerlayout with one of the inner layers as asolid ground plane is recommended.The LT1505 and low power compo-nents associated with it should be keptas close together as possible. Addition-ally, all power components should bekept together and next to LT1505 con-trol circuitry. The goal is to keep allhigh power switching currents as lo-calized as possible. Components thatconnect to the ground plane shouldhave vias placed as close as possible tothe pins connected to the ground plane.Also, power components should havelarger or multiple vias connecting to

the ground plane. Avoid placing thepower components in such a way thatinput and output currents flow by theLT1505 IC. Also, to keep the compo-nent temperature rise low, use as muchcopper as possible. The use of polygonplanes for high power nets such as theones connect ing to VIN, VCC,

BAT2 BAT SENSE

LT1505

4.7Ω

VCC BOOST BOOSTC

SPIN

PGND

AGND

4.1V

4.2VCP11µF

C70.68µF

C60.1µF

C34.7µF

C8220pF

COUT22µF25V×2

C21µF

VBAT

12.6VBATTERY

NOTE: DBODY IS THE BODY DIODE OF M3CIN: SANYO OS-CON (619) 661-6835L1: SUMIDA CDRH127 (847) 956-0666

M1Si4412

M2Si4412

D4MBRS140

D21N4148

D31N4148

R7475Ω

100k

R54.75k

R11k

R64.75k

RS40.025Ω

M3Si4435

DBODY TOSYSTEM POWER

VIN(FROM

ADAPTER)

R222Ω

RS10.025Ω

L110µH

RC11k

RP1330Ω

1505 F01

RPROG4.93k1%

CC10.33µF

RS2200Ω1%

RS3200Ω1%

VFB

3 CELL

PROG

VC

BGATE

COMP1

CAP

FLAG

SHDN

SYNC

UV

INFET

SW

TGATE

GBIAS

CLP

CLN

CIN47µF35V

C11µF

C40.1µF

LT1505

PROG

2A 1A 0.5A 0.25A

10k 20k 40.2k 80.6k RP1330Ω

CP11µF

FROMµP

4× 2N3904

OUTPUT CURRENT (A)

EFFI

CIEN

CY (%

)

1611 TA02

0 1 2 3 4

100

95

90

85

80

75

70

65

60

LIMITEDINPUT

POWERBATTERY CHARGECURRENT SENSE

BATTERY SUPPLIESADDITIONAL PEAK POWER

SYSTEMLOAD

LT1505BASED

CONVERTER

Figure 2. 4A Li-Ion battery charger

Figure 3. Programming of battery-charge current Figure 5. Typical telecom application

Figure 4. Efficiency of 4A, 12.6V batterycharger at 20V input



DESIGN IDEAS

No RSENSE Controller Delivers 12Vand 100W at 97% Efficiency by Christopher B.

Umminger

Heat removal presents a thornyproblem in many of today’s compactsystems. This is especially the casewhen power converters deliver highoutput voltages with several amperesof current and are processing tens tohundreds of watts. In this regime, aconverter with only moderate effi-ciency will have a significant amountof waste heat and may require heatsinks and additional air flow. A veryhigh efficiency converter can reducethe wasted power, which saves spaceand lowers costs.

The circuit shown in Figure 1 is apower converter that produces a 12Voutput at up to 8.5A from an inputthat can range between 12V and 28V.The 100W of output power is con-verted at 97% efficiency with only 3Wdissipated on the board. No specialheat sinks were used other than awidened VIN trace connected to thedrain of M1. This point reached a

maximum temperature of 75°C in a25°C environment. L1 is a custom-wound inductor using fourteen turnsof 15 gauge wire on a Magnetics, Inc.Kool Mµ® 77206-A7 core. The entireconverter takes up a volume of only0.65in3 and processes an impressive150W per cubic inch.

The circuit uses the LTC1625 NoRSENSE™ controller to deliver the highoutput voltage with excellent effi-ciency. This controller provides truecurrent mode control without using asense resistor by monitoring the volt-age drop across the power MOSFETswitches. Eliminating the senseresistor saves board space andimproves efficiency. In this applica-tion, a 0.01Ω sense resistor woulddissipate about 0.7W at full load.

Many current mode controllers usea sense resistor in series with theinductor. Unfortunately, they mustrestrict the maximum output voltage

due to limits on the input range of thecurrent comparator. However, theLTC1625 has no such constraint. Thecircuit in Figure 1 uses the LTC1625in its adjustable mode, with the VPROGpin left open. The internal erroramplifier compares the voltage at theVOSENSE pin to a 1.19V reference andan external resistive divider sets theoutput voltage.

Figure 2 shows that 97% efficiencyis achieved over a wide range of loadcurrent. The application uses the FCBpin to disable Burst Mode operationand force continuous, synchronousoperation down to no load. EnablingBurst Mode would keep the efficiencyabove 90% down to a load of only50mA. The current mode control ofthe LTC1625 incorporates foldbackcurrent limiting that reduces the out-put current to 6A when the output isshorted.Kool Mµ is a registered trademark of Magnetics, Inc.

Figure 1. 100W, 12V, 8.5A supplyFigure 2. Efficiency vs load current forFigure 1’s circuit

+1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9 +

+

EXTVCC

SYNC

RUN/SS

FCB

ITH

SGND

VOSENSE

VPROG

VIN

TK

SW

TG

BOOST

INTVCC

BG

PGND

LTC1625CS

M1FDS6670A

L1 15µH

VOUT12V/8.5A

COUT150µF16V×2

D1MBRS-140T3M2

FDS6670ACVCC4.7µF

DB CMDSH-3 CB 0.22µF

R2 35.7k

R1 3.92k

CC2 100pF

RC1 20kCC12200pF

CSS 0.1µF

CF0.1µF

RF 1Ω

CIN10µF30V×4

VIN12V–28V

SANYO OS-CON 30SC10M (619) 661-6835SANYO OS-CON 16SA150M

CIN:COUT:

0

EFFI

CIEN

CY (%

)

100

95

90

85

80106

LOAD CURRENT (A)2 4 8

VIN = 24VVOUT = 12V


DESIGN IDEAS

Generating Low Cost, Low Noise,Dual-Voltage Supplies by Ajmal Godil

Some sensitive electronic applica-tions, such as telecommunication anddata acquisition, require both 5V and–5V low noise supplies, which mayhave to be generated from a singlehigh voltage positive supply. The cir-cuit in Figure 1 shows a cost-effectiveway to generate 5V and –5V from asingle 10V–28V supply by using thelow noise LT1777 and a few off-the-shelf components.

The LT1777 is a step-down regula-tor specially designed for low noiseapplications. In order to achieve low

noise, the LT1777 is equipped withdI/dt limiting circuitry, which is pro-grammed via a small external inductorin the power path. It also containsinternal circuitry to limit the dV/dtturn-on and turn-off ramp rates. Fig-ure 2 shows the VSW node voltage andthe VSW node current for the low noiseLT1777. Figure 3 shows the VSW nodevoltage and VSW node current for thehigh voltage LT1676 buck regulatorunder the same test conditions. It canbe seen from Figures 2 and 3 that the

IV5 DAOL )Am(

dewollamumixaMehtnotnerruc

)Am(ylppusV5–

V NI V01=

05 04

001 07

002 011

003 031

053 041

V NI V81=

05 09

001 051

002 002

003 032

053 002

V NI V82=

05 031

001 081

002 062

003 072

053 032

Table 1. Allowable load current on the –5V supply vs input voltage and 5V load current

SHDN

+

4

10

3

14

12

7

6

5

13

1

8

9

12

VCC

VIN

SHDN

VC

SYNC

SGND

VSW

VD

FB

GND

GND

GND

GND

LT1777

VIN10V–28V

C6100µF63V

100pF

C4100pF

C52200pF

R322k

LSENSE0.47µH

L1B200µH

D1MBRS-

1100

D2 MBRS1100

L1A200µH

C3100µF

10V

C7100µF10V

C11µF10V

C81µF10V

R136.5k1%

R212.1k1%

+VOUT5V*

–VOUT–5V*

C2**4.7µF

L1A/B:

LSENSE:

C3, C7:

C6:C2:

COILTRONICS CTX200-4(561) 241-7876GOWANDA SML32-470K(716) 532-2234AVX TPSD107M010R0065(803) 946-036263CV1D0BSAVX 1206YG475

SEE TABLE 1 FOR RELATIONSHIP BETWEEN LOADON +VOUT AND MAXIMUM CURRENT ON –VOUT.THIS IS A CERAMIC CAP, BUT ATANTALUM CAP COULD ALSO BE USED

*

**

+

VSW NODEVOLTAGE

10V/DIV

VSW NODECURRENT

200mA/DIV

500ns/DIV

VSW NODEVOLTAGE

10V/DIV

VSW NODECURRENT

200mA/DIV

500ns/DIV

Figure 1. This cost-effective supply generates ±5V from a 10V–28V input.

Figure 2. VSW node voltage and node current for theLT1777

Figure 3. VSW node voltage and node current for theLT1676



DESIGN IDEAS

Switched Capacitor Voltage RegulatorProvides Current Gain by Jeff Witt

A switched capacitor voltageinverter is normally used to generatea negative supply voltage from a posi-tive input supply. The negative supplycurrent is equal in magnitude to thecurrent drawn from the input. Thisdesign idea describes two circuits thatuse an inverter to double the currentbetween the input and output,increasing efficiency and eliminatingheat dissipation problems.

More Efficient than a LinearIf the roles of the ground and outputpins are swapped (Figure 1), aninverter will divide the input voltageby two. This circuit can be used inplace of a linear regulator when theinput voltage is more than twice thedesired output, for example, regula-tion of 12V to 5V or 3.3V.

The circuit’s operation is illustratedin Figure 2. An internal oscillatoralternately closes and opens fourswitches. In the first half cycle,switches 1 and 2 are closed and cur-rent flows from the input to the output,charging C1. In the second half cycle,switches 3 and 4 are closed, dis-

charging C1 into the output. The cur-rent delivered to the output iscontinuous and equal to twice theaverage input current. Because theoutput current is continuous, theoutput voltage ripple is low. Note thatC1 and COUT do not need to bematched, as their voltages are equal-ized on each cycle.

Figure 3 shows the actual circuit.Instead of halving the input voltage,the LT1054 modulates the input cur-rent (through switch 1 of Figure 2) toregulate the output voltage. This cir-

cuit can deliver 200mA at 5V from aninput of 11.2V to 13V. Typical effi-ciency is 74%, compared to 42% for alinear regulator. More importantly,dissipation is decreased from 1.4Wfor the linear regulator to 0.35W, eas-ily managed by the LT1054’s 8-pinsurface mount package. For a 3.3V/200mA output, the circuit is 49%efficient, compared to a linearregulator’s 27%, with power dissipa-tion reduced from 1.8W to 0.7W. A6.2Ω resistor in series with C1 sharesthe dissipated power with the LT1054;no heat sink is needed.

Three DiodesImprove the InverterThe same advantages can be realizedwhile generating a negative output.However, a switched capacitor inverterdoes not have the right compliment ofswitches. By adding three diodes (seeFigure 4), the inverter can charge twocapacitors in series and then dis-charge them in parallel to an outputcapacitor. The absolute value of theoutput voltage will equal half of theinput voltage, minus some loss due tothe switches and diodes.

Figure 5 shows a practical circuit,which converts 12V to –4V. TheLT1054’s servo loop keeps the outputregulated to –4V over an input rangeof 11V to 15V and a load current up to

Figure 1. Rewiring a switched capacitor inverter for step-down regulation results ina current gain of 2.

Figure 2. The LT1054’s internal switches alternately charge and discharge C1, deliveringa continuous current to the output.

VOUT

VIN

CAP+

CAP–

GND

VI

–V

I

VOUT

VIN

CAP+

CAP–

GND

VI

V/2

2I

1

3

2

4

C1

COUT

VOUT

VIN

1

3

2

4

C1

COUT

VOUT

VIN

CURRENT FLOW


DESIGN IDEAS

VOUT

V+

CAP+

CAP–

GND

++

+

C1*10µF

10µF

10µFR139.2k

R3*200k 330pF

R4*33k

VIN12V

VOUT5V/200mA

VREF

FB/SHDN

8

3

6

1

5

4

2

*FOR 3.3V/200mA, SET R4 = 147k, PUT 6.2Ω IN SERIES WITH C1 AND PRELOAD WITH R4 = 2.2k

LT1054CS8

1

3

2

4

VOUT

VIN

CURRENT FLOW

1

3

2

4

VOUT

VIN

D1

D2 D3

C233µF

C133µF

6.8µF

C333µF

Q1

20.0k

86.6k

VIN11V–15V

VOUT–4V/100mA

CAP–

CAP+

VOUT

V+

VREF

FB/SHDN

GND

U1 LT1054CS8

8

6

1

3

5

2

4

AVX TAJB336M010RAVX TAJB685M025RMOTOROLA MBR0520LT1IR IRLML2402

C1, C2, C3:C4:

D1, D2, D3:Q1:

100mA. (Unfortunately, there is toomuch voltage loss to regulate to –5Vfrom a 12V source.) Note that manynegative supplies will power loadsthat can pull the output above ground(op amp circuits in particular); Q1prevents such a load from pullingU1’s VOUT pin above its ground pin.

Because most of U1’s operatingcurrent flows out of its ground pin,the input current to this circuit is abit more than one-half of the outputcurrent. While delivering 100mA, theinput from 12V was measured at64mA, resulting in 53% efficiency.

One alternative, a switched capacitorinverter followed by a linear regula-tor, would be 33% efficient at best andpower dissipation would be 0.8W. Thiscircuit dissipates only 0.35W, allow-ing this all–surface mount circuit torun cool.

Figure 3. This switched capacitor regulator doubles the currentbetween the input and the output, increasing efficiency andeliminating the need for a heat sink.

Figure 4. Adding three diodes to a switched capacitor inverter doubles the current between the input and the output.

Figure 5. This circuit converts 12V to –4V. Only 63mA of input currentis required for 100mA of output current.

switch node voltage and current wave-forms for the LT1777 are morecontrolled and rise and fall more slowlythan those of the LT1676 regulator.By slowing down the sharp edgesduring turn-on and turn-off for thepower switch, conducted and radi-ated EMI are reduced.

The circuit in Figure 1 shows threeinductors: L1A, L1B and LSENSE. L1A

and L1B are two windings on a singlecore to generate ±5V. C2 has beenadded to minimize coupling mis-matches between the two windings(L1A and L1B); this forces the wind-ing potentials to be equal and improvescross-regulation. This creates the dualSEPIC (single-ended primary induc-tance converter) topology. LSENSE is auser-selectable sense inductor to pro-

gram the dI/dt ramp rate (see theLT1777 Data Sheet for more informa-tion). Table 1 summarizes theallowable load current on the –5Vsupply as a function of input supplyvoltage and the load current on the5V supply. Note that 5V and –5Vsupplies are allowed to droop by 0.25V,which corresponds to 5% loadregulation.

LT1777, continued from page 27


DESIGN IDEAS

High Current Step-Down Conversionfrom Low Input Voltages by Dave Dwelley

Many modern logic systems runwith 3.3V as the sole power source. Atthe same time, some modern micro-processors and ASICs require supplyvoltages of 2.5V or less. Traditionalstep-down switching regulators canhave difficulty running from the 3.3Vsupply, because affordable powerMOSFETs generally require 5V gate

drive to work efficiently. Two attractivesolutions to generating 2.5V or lessfrom a 3.3V supply are possible usingthe LTC1649 and the LTC1430A.

The LTC1649 is a switching regu-lator controller designed to use 5VMOSFETs while running from an inputsupply as low as 2.7V. No 5V supplyis required. The LTC1649 includes an

A typical circuit is shown in Figure1. The 3.3V supply voltage at VIN isconverted to a regulated 5V output atCPOUT. This 5V supply powers thePVCC2 and VCC pins to provide gatedrive to Q3. Q1 and Q2 require anadditional charge-pump stage to drivetheir gates above the VIN supply volt-age. D1 and C2 provide this boostedsupply at PVCC1. The voltage feedbackloop is closed through R1 and R2,with loop compensation provided byan RC network at the COMP pin. Soft-start time is programmed by the valueof CSS. Maximum output current isset by RIMAX at the IMAX pin and issensed across the RDS(ON) of the Q1/Q2pair, eliminating the need for a highcurrent external resistor to monitorcurrent. The circuit boasts efficiencyapproaching 95% at 5A (Figure 2).

Some applications have a small 5Vsupply available, but need to drawthe load current from the 3.3V sup-ply. Such an application can use thecircuit shown in Figure 3, with the

VCC

VOUT2.5V/15A

IMAX

SHDN

1µF

G2

FB

VIN

VIN3.3V

C+

LTC1649

PVCC2

PVCC1 G1

IFB

COMP

SS C–

GND CPOUT

C2 1µF

C410µF

D2MBR0530

CSS0.1µF

CC0.01µF

IRF7801 = INTERNATIONAL RECTIFIER (310) 322-3331MBR0530 = MOTOROLA (800) 441-2447

RC7.5k

LEXT1.2µH

C1220pF

C310µF

D1MBR0530

RIMAX51k

R3 22Ω R4 1k

Q3IRF7801

Q1, Q2IRF7801TWO IN PARALLEL

COUT4400µF

CIN3300µF

SHDN

R212.7k

R112.4k

1649 TA01

+ C50.33µF

+

+

+

LOAD CURRENT (A)0.1 1 10 100

EFFI

CIEN

CY (%

)

1649 TA02

100

90

80

70

60

50

40

VCC

VOUT2.5V/15A

IMAX

SHDN

G2

FB

VIN3.3V

LTC1430A

PVCC2

PVCC1 G1

IFB

COMP

SS

GND

C2 1µF

CSS0.1µF

CC0.01µF

RC7.5k

LEXT1.2µH

C1220pF

C310µF

D1MBR0530

RIMAX51k

R3 22Ω R4 1k

Q3IRF7801

Q1, Q2IRF7801TWO IN PARALLEL

COUT4400µF

CIN3300µF

SHDN

R212.7k

R112.4k

1649 TA01

+

+

+SENSE+

SENSE–

FREQSET

PGND

VCC5V

IRF7801 = INTERNATIONAL RECTIFIER (310) 322-3331MBR0530 = MOTOROLA (800) 441-2447

NC

NC

NC

Figure 1. 3.3V to 2.5V/15A converter using the LTC1649

Figure 3. 3.3V to 2.5V/15A converter using a 5V auxiliary supply and the LTC1430A

Figure 2. Efficiency of Figure 1’s circuit


onboard charge pump to generate the5V gate drive that the external powerMOSFETs require. It also features anarchitecture designed to use allN-channel external MOSFETs and ahigh performance voltage mode feed-back loop to ensure excellent transientresponse for use with high speedmicroprocessors and logic.


DESIGN IDEAS

How to Design High Order Filters withStopband Notches Using the LTC1562Operational Filter (Part 2) by Nello Sevastopoulos

This is the second in a series ofarticles describing applications of theLTC1562 connected as a lowpass,highpass or bandpass filter with addedstopband notches to increase selec-tivity. Part 1 (Linear Technology VIII:2,May 1998, pp. 28–31) described onemethod of coupling the four Opera-tional Filter™ building blocks of theLTC1562 to design an 8th order low-pass filter with two stopband notches.Part 2 expands the technique of Part1 to design an 8th order bandpassfilter with two stopband notches.

Throughout this series of articles,notches will be generated by first sum-ming the input signal with a 180degree out-of-phase signal appearingat the output(s) of the LTC1562Operational Filter and second, by ad-justing the summation gains to yielda zero sum.

Part 1 showed one proprietarymethod of creating notches in thestopband of a lowpass filter. Theessence of this method is brieflyrevisited in Figure 1, where two of

four Operational Filter sections arecoupled to form a 4th order lowpassfilter with one stopband notch. Thenotch is obtained by summing theinput signal, VIN, with the output,V1A, into the inverting node of thenext section of the IC. The two sig-nals, VIN and V1A, will tend to canceleach other at a frequency where theyare 180 degrees out of phase. Thecancellation will be complete if theamplitudes of VIN and VIA yield equal(and opposite) currents at the sum-ming junction of the op amp of Figure1, that is if:

RIN2 = RFF2 • (RQ1/RIN1) (1)

In Figure 1, the lead capacitor CIN1raises the frequency where a 180degree phase shift occurs above thecenter frequency of the 2nd ordersection (fO). The resulting notch fre-quency is then higher than the cutofffrequency of the 4th order filter.

Figure 1 can be easily modified tomake the frequency of the notch lowerthan the center frequency of the 2nd

order section from which it is derived.This is useful in bandpass filters wherean unwanted frequency lower thanthe center frequency of the filter mustbe rejected. This is shown in Figure 2,where the input signal is summedwith output V2A instead of outputV1A. The frequency of the resultingnotch is:

fN2 = fO1 • R1RQ1

CCIN1

R21RIN1

1– • • (2)

(R1 = 10k; C = 159.15pF)and the gain conditions dictatingEquation 1 now translate to:

RQ1R1

CIN1C• (3)RIN2 = RFF2 • ( (

The circuit of Figure 2 can be usedto build a 4th order bandpass filterwith one notch below its centerfrequency. Such a filter can simulta-neously detect a tone and reject anunwanted frequency located in thevicinity of the passband.

–

+

1sCR1

–

+

1sCR1

R22

RFF2RIN2

CC

RQ2

R21

RIN1

CIN1

RQ1

VIN

1/2 LTC1562

R1, C ARE PRECISION INTERNAL COMPONENTSR1 = 10k; C = 159.15pF

1

2

3

20

19

18

V1A

V2A

V1B

V2B

R21

RIN1

CIN1

RQ1

VIN

LTC1562

1

2

3

V1A

V2A(OTHER CONNECTIONS AS SHOWN IN FIGURE 1)

Figure 1. Two out of four Operational Filter sections are coupled to form a 4th order lowpassfilter with one stopband notch.

Figure 2. Figure 1’s circuit modified to makethe frequency of the notch lower than thecenter frequency of the 2nd order sectionfrom which it is derived.


DESIGN IDEAS

The notch techniques of Figures 1and 2 will be referred as “feedfor-ward.” This is necessary to separatethese techniques from others to beshown later, in Part 3 of this series ofarticles.

The feedforward notch techniqueof Figure 2 can be advantageouslycombined with Figure 1 to realizesharp bandpass filters with two stop-band notches: one notch below andone above the center frequency. Fil-ters of this type can be very selective,although they are quite cumbersometo design. A step-by-step design pro-cedure is illustrated below.

A Practical ExampleAn 8th order 100kHz bandpass filteris realized, through FilterCAD™ forWindows® (available at no charge fromLinear Technology—see the “DesignTools” page in this issue), by cas-cading four 2nd order sections ofequal Q. The –3dB band-edges arearithmetrically symmetric withrespect to the filter’s 100kHz centerfrequency and signals below 80kHzand above 125kHz are attenuated by60dB or more. Figure 3 shows thetheoretical amplitude response andTable 1 shows the desired filterparameters, namely, the center fre-quencies, Qs and notch frequencies.The filter of Figure 3/Table 1 can berealized by decomposing the 8th orderrealization into two independent 4thorder filter sections and then cascad-ing these two 4th order sections, whichis an easier task than designing an8th order elliptic bandpass filter all atonce. FilterCAD, in custom mode,

should be used to perform this opera-tion. Figure 4 and Table 2 show thefilter decomposition and the cascad-ing sequence; note the left and rightnotches. Figure 5 uses the LTC1562Operational Filter to realize the filterof Figure 3 as decomposed in Figure4. The design is split into two 4thorder sections. The algorithm tocalculate the external passive com-ponents is outlined below.

In order to obtain a practical real-ization that closely approximates thetheoretical one, the Q of each 2ndorder section will be lowered by 15%.(Please consult the LTC1562 final datasheet.)

In order to follow the long andtedious algorithm below, consider theintuitive outline: We need to calculatethe following set of passive compo-nents for the first 4th order section:RIN1, CIN1, R21, RQ1, and RIN2, RFF2,R22 and RQ2. The resistors R21, RQ1,

R22 and RQ2 are easily calculated viathe expression for the center fre-quency, fOi, and Qi for the 2nd ordersection “i.” The expression for thenotch, equation (2), involves the prod-uct of RIN1 • CIN1, so neither componentcan be calculated separately. Instead,RIN1 is calculated by considering themaximum gain (which occurs aroundthe center frequency fO1) at eithernode V1A or V2A. This controls pre-mature internal clipping. Once RIN1 isset, CIN1 is easily calculated via equa-tion (2) for the lower band notch.Similarly, equation (3) defines the ra-tio of RIN2 to RFF2, so neither of thesecomponents can be calculated inde-pendently of the other. RFF2 iscalculated by considering the gainfactor (“GAIN”) of the 4th order filtersection at the V1B output (Figure 1/Table 2)). Once RFF2 is set, RIN2 iscalculated via equation (3).

fO Q fN QN epyT3e7869.99 0000.01 ——— ——— PB3e4699.69 0000.01 3e4182.921 ——— NPL3e2230.301 0000.01 3e3203.77 ——— NPH3e0000.001 0000.01 ——— ——— PB

Table 1. Parameters of the four sections of an 8th order, 100kHz bandpass filter 20

0

–20

–40

–60

–80

–100

–12050 60 70 80 90 100 120 130110 140 150

FREQUENCY (kHz)

GAIN

(dB)

–65dBBANDWIDTH

20

0

–20

–40

–60

–80

–10050 60 70 80 90 100 120 130110 140 150

FREQUENCY (kHz)

GAIN

(dB)

50 60 70 80 90 100 120 130110 140 150FREQUENCY (kHz)

f 1O k4699.69= 01=1Q

f 2O k7869.99= 01=2Q f 2N k3.77=

M )s(D/)s(N•NIAG=)s(H

M 3282.0=NIAG

M s(s1A=)s(N 2 01•2709•532+ 9)

M 01•2218.26=1A 3

f 3O k001= 01=3Q

f 4O k2230.301= 01=4Q f 2N k4182.921=

M )s(D/)s(N•NIAG=)s(H

M 8871.0=NIAG

M s(s1A=)s(N 2 01•38•956+ 9)

M 01•9138.26=1A 3

Table 2. Filter decomposition and cascading sequence

Figure 3. Theoretical amplitude response of8th order, 100kHz bandpass filter

Figure 4. Cascading two 4th order bandpass sections to realize the filter of Figure 3.


DESIGN IDEAS

The same design method is laterrepeated to derive the passive compo-nents for the second 4th order section:

I. Calculate the passive componentsof the of the first 4th ordersection(fO1 = 96.9964kHz, Q = 8.5, fO2 =99.9687kHz, Q = 8.5, fn2 =77.3kHz)

1. Calculate the center frequency-setting resistor, R21:(For details, please refer to theLTC1562 data sheet.)R21 = (100kHz/fO1)2 • 10k =10.629k(choose the closest 1% value,R21 = 10.7k (1%))

2. Calculate the Q-setting resistor,RQ1:(For details, please refer to theLTC1562 data sheet)RQ1 = Q1 √R21 • 10k = 87.925k(choose the closest 1% value,RQ1 = 86.6k (1%))

3. Calculate the input resistor RIN1from the following expression(s):

3a. if fO1 ≤100kHz (for LTC1562)

(4)RIN1 = Q1 • R21 •

( (fN22

fO121 –Q12 •

11 + 2

RIN1 = 95.56k

Although not applicable for thisexample, thoroughness dictates men-tioning the case below:

3b. if fO1 ≥ 100kHz (for LTC1562)

(5)RIN1 = RQ1 • ( (fN2

2

fO121 –Q12 •

11 + 2

Make sure, in either case 3a or 3b,that RIN1 is greater than R21, that is,the DC gain at pin 3 in Figure 5 is lessthan unity; if not set RIN1 = R21 andproceed to step 4a.

The expression for RIN1 sets thegain at fO1 equal to unity at the nodeof maximum swing (V1A or V2A). Notethat, for high Qs, the gain at fO1 is themaximum gain. If you know the spec-trum of the signals that will be appliedto the filter input and if internal gainshigher than unity will be allowed, thevalue of RIN1 can be reduced to improvethe input signal-to-noise ratio.

4a. Use the value of RIN1, calcu-lated above, and calculate thevalue for the input capacitorCIN1 from the notch equation (2).

(6)CIN1 = ( (fN2

2

fO121 –

1R1RQ1

R21RIN1

• • C

(fN1 < fO1; C = 159.15pF)

CIN1 = 5.639pF.

Use the commercially available NPOtype 0402 surface mount capacitorwith the value nearest the ideal valueof CIN1 calculated above. For instance,for CIN1, choose an off-the-shelf 5.6pFcapacitor.

4b. Recalculate the value of RIN1after CIN1 is chosen.RIN1 = (CIN1(ideal) RIN1(ideal))/CIN1(NPO,0402) = 96.22kChoose the closest 1% value:RIN1 = 95.3k (1%)

5. Calculate the frequency- and Q-setting resistors R22, RQ2, asdone in steps 1 and 2, above.Choose the closest 1% standardresistor values.R22 = 10k (1%);RQ1 = 84.5k(1%)

6. Calculate the feedforwardresistor, RFF2:1/(RFF2 C) = Gain • A1;C = 159.15pF

The values for parameter (Gain •A1) are provided by FilterCAD; theyrelate to the coefficients of the nu-merator of the transfer function (V1B/VIN in Figure 1); a passband AC gain ofunity is assumed (see Table 2). Pleasenote that, for a lowpass case, as inPart 1 of this article series, the valueof (Gain • A1) is the DC gain of thefilter and its value can be easily setwithout software assistance.

Equating the numerator of the fil-ter transfer function with the valuesprovided by FilterCAD:

V1BVIN

s(s2 + ωN22)

(RFF2 • C) • D(s)GAIN (A1s)(s2 + A2)

D(s)= =

GAIN = 0.2823A1 = 62.8122 • 103

A2 = (2πfN2)2 = 235.9 • 109

(7)

RFF2 = 1/((Gain A1) C) = 354.35k;C = 159.15pFRFF2 = 357k(1%)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

LTC1562

RFF2, 357k

RIN2, 110k

RIN4, 95.3k

RFF4, 332k

RIN1, 10.7k

CIN1, 5.6pF

VIN

VOUT

1562 TA03

RIN3, 294k

–5V5V

RQ1, 86.6k

R21,10.7k

R23, 10k

0.1µF

RQ3, 84.5k

R24, 9.53k

RQ4, 82.5k

RQ2, 84.5k

R22, 10k

CIN3, 18pF

0.1µF

20

0

–20

–40

–60

–80

–100

–12050 60 70 80 90 100 120 130110 140 150

FREQUENCY (kHz)

GAIN

(dB)

–65dBBANDWIDTH

Figure 5. Hardware realization of the filter in Figure 3, using all four sections of an LTC1562

Figure 6. Measured amplitude response ofFigure 5’s filter


DESIGN IDEAS

7. Solve for RIN2 by using Equation(3), which dictates the gaincondition for the occurrence ofthe notch:

RIN2 = (RFF2 RQ1 CIN1)/(R1 C) =108.785k; (R1,C) = (10k, 159.15pF)RIN2 = 110k (1%)

II. Calculate the passivecomponents of the second 4thorder section(fO3 = 100kHz, Q3 = 8.5, fO4 =103.0322kHz, Q4 = 8.5, fn4 =129.2814kHz)Except for the bandpass gaincalculations, the algorithm willbe the same as the lowpassdesign of Part 1 of this article.

1. R23 = (100kHz/fO3)2 • 10k =10k (1%)

2. RQ3 = Q3 √R23 • 10k = 85k,RQ3 = 84.5k (1%)

3. Calculate the input resistor RIN3from the following expression(s):

3a. if fO3 ≤ 100kHz (for LTC1562)

(8)RIN3 = Q3 • R23 • ( (fO3

2

fN421 –1 +

2• Q32

RIN3 = 302.41k3b. if fO3 ≥ 100kHz (for LTC1562)

(9)RIN3 = RQ3 • ( (fO3

2

fN421 –1 +

2• Q32

For fO3 = 100kHz, as in the exampleabove, either expression can be used.Note that the expression for RIN3 in3b, above, is the same as expressionfor RIN1 shown in Part 1 of this article.

4a. Use the theoretical value forRIN3, calculated above, andcalculate the value of the inputcapacitor CIN3 from the notchequation (2) of part 1 of thisarticle; for convenience this isrepeated below:

(10)CIN3 = C • ( (fO32

fN421 –

RQ3RIN3

•

CIN3 = 17.86pF;Use a commercially available NPO-

type 0402 surface mount capacitorwith the value nearest the ideal valueof CIN3 calculated above. For instance,CIN3 = 18pF.

4b. Recalculate the value for RIN3calculated in step 3a after CIN3is chosen.

RIN3 = (CIN3(ideal) RIN3(ideal))/CIN3(NPO,0402)= 300.058k

RIN3 = 294k (1%)5. Calculate the frequency- and

Q-setting resistors, R24 andRQ4, as done in steps 1 and 2,above. Choose the nearest 1%standard value.

R24 = 9.42k; R24 = 9.53k (1%)RQ4 = 82.97k; RQ4 = 82.5k (1%)

6. Calculate the feedforwardresistor, RFF4. First equate thenumerator of the 4th order filtertransfer function with thevalues provided by FilterCAD(see Table 2):

VOUTV1B

sRFF4 • C

ωO32

ωO42

s2 + ωN42

D(s)

GAIN • A1s • (s2 + ωN42)

D(s)

= • •

• •ωO3

2

ω2N4

=

THEN RFF4 = 1GAIN • A1

1C

GAIN = 0.1788A1 = 62.8319 • 103

(11)

RFF4 = 334.64k, choose RFF4 = 332k(1%).

7. Solve for RIN4 by using equation(1) of Part 1 of this article,which dictates the gain

condition for the occurrence ofa notch. For convenience, thisgain condition is repeatedbelow.

RIN4 = RFF4 • RQ3RIN3

(12)

RIN4 = 95.422k; RIN4 = 95.3k(1%)

Experimental ResultsFigure 6 shows the measured ampli-tude response of the filter of Figure 5.The values of the passive componentare as calculated above and as shownin Figure 5. The measured amplituderesponse closely approximates theideal response as synthesized by Fil-terCAD. The peak frequency withstandard 1% resistor values and 5%capacitor values is 100.65kHz (0.65%off). The higher frequency notch,although it shows a respectable depthof 70dB, is not as well defined as thenotch below the filter’s center fre-quency, yet the –65dB bandwidth isas predicted by FilterCAD. The 10dBlack of the upper band notch depth isdue to the finite speed of the internalop amps; they cause the practical 180degree phase shift frequency and thegain at V1A’s output to depart slightlyfrom the theoretical calculations.

For the sake of perfection, the notchdepth can be easily restored by tweak-ing the value of RQ3; the new RQ3 willbe 75k. This is shown with dashedlines in Figure 6. This, however, low-ers the passband gain by the ratio ofthe new to the old RQ3 value, that is,by about –1.0dB (you cannot foolmother nature). Depending on theapplication, the 10dB of additionalnotch depth for 1.5dB of passbandgain loss may be a reasonable trade.The passband gain can also be cor-rected by lowering the values of eitherpair, (RFF2, RIN2) or (RFF4, RIN4), by thesame amount (1.5dB). In Figure 6,the gain was restored to 0dB by chang-ing the values of RIN2, RFF2 to 93.1kand 300.1k respectively.

The total integrated noise was animpressively low 69µVRMS, allowing asignal-to-noise ratio well in excess of80dB. The input signal-to-noise ratiocan be further increased if the pass-

VS = ±5V

VOUT(RMS), fOUT = 100kHz

V IN(

RMS)

, fOU

T =

100k

Hz

0.1

1

5

50.1 1

Figure 7. Gain linearity of Figure 5’s filter,measured at the 100kHz theoretical centerfrequency


Step-Down Conversion, continued from page 30

lower cost LTC1430A replacing theLTC1649. The LTC1430A does notinclude the 3.3V to 5V charge pumpand requires a 5V supply to drive theexternal MOSFET gates. The currentdrawn from the 5V supply dependson the gate charge of the externalMOSFETs but is typically below 50mA,regardless of the load current on the2.5V output. The drains of the Q1/Q2pair draw the main load current fromthe 3.3V supply. The remaining cir-

cuitry works in the same manner asin Figure 1. Efficiency and perfor-mance are virtually the same as theLTC1649 solution, but parts countand system cost are lower.

In a 3.3V to 2.5V application, thesteady-state, no-load duty cycle is76%. If the input supply drops to3.135V (3.3V – 5%), the duty cyclerequirement rises to 80% at no load,and even higher under heavy ortransient load conditions. Both the

LTC1649 and the LTC1430A guar-antee a maximum duty cycle of greaterthan 90% to provide acceptable loadregulation and transient response.The standard LTC1430 (not theLTC1430A) can max out as low as83%—not high enough for 3.3V to2.5V circuits. Applications with largerstep-down ratios, such as 3.3V to2.0V, can use the circuit in Figure 3successful ly with a standardLTC1430.

band gain can be higher than 0dB orif internal nodes are allowed to havegains higher than 0dB. Please con-tact the LTC Filter Design andApplications Group for further details.

The low noise behavior of the filtermakes it useful in applications wherethe input signal has a wide voltage

range. This is true provided the filtermagnitude response does not changewith varying input signal levels, thatis, the filter gain is linear. The gainlinearity measured at the 100kHztheoretical center frequency of thefilter is shown in Figure 7. The gain is

perfectly linear for input amplitudesup to 1.25VRMS (3.5VP-P) so an 84dBdynamic range can be claimed. Theinput signal, however, can reach am-plitudes up to 3VRMS (8.4VP-P, 92dBSNR) with some reduction in gainlinearity.

SW, VBAT and GND in Figure 2 willhelp in spreading the heat and willreduce the power dissipation in con-ductors and MOSFETs.

Other ApplicationsThe LT1505 can also be used in othersystem topologies, such as the tele-com application shown in Figure 5.The circuit in Figure 5 uses the bat-tery to supply peak power demands.

By doing so, the required peak powerfrom the wall adapter can be muchlower than the peak power requiredby the load. The wall adapter has tosupply the average power only.

ConclusionThe LT1505 is a complete, single-chip battery charger solution fortoday’s demanding charging require-ments in high performance laptop

applications. The device requires asmall number of external componentsand provides all necessary functionsfor battery charging and power man-agement. High efficiency and smallsize allow for easy integration withthe laptop circuits. Also, by adding asimple external circuit, charging canbe easily controlled by the host com-puter, allowing for more sophisticatedcharging schemes.

LTC1735/LTC1736, continued from page 6

level is 44µVRMS over a bandwidth of800kHz or 98dB below the maximumunclipped output.

AcknowledgmentsPhilip Karantzalis and Nello Sev-astopoulos of LTC’s Monolithic FilterDesign and Applications Group con-tributed to the application examples.

References1. Hauser, Max. “Universal Continu-ous-Time Filter Challenges DiscreteDesigns.” Linear Technology VIII:1(February 1998), pp. 1–5 and 32.2. Sevastopoulos, Nello. “How to De-sign High Order Filters with StopbandNotches Using the LTC1562 QuadOperational Filter, Part 1.” LinearTechnology VIII:2 (May 1998), pp.28-31.

3. Sevastopoulos, Nello. “How to De-sign High Order Filters with StopbandNotches Using the LTC1562 QuadOperational Filter, Part 2.” in the De-sign Ideas section of this issue ofLinear Technology.4. LTC1562 Final Data Sheet.5. For example: Schwartz, Mischa.Information Transmission, Modula-tion, and Noise, fourth edition, pp.180–192. McGraw-Hill 1990.

LTC1562-2, continued from page 10

ConclusionThe LTC1735 and LTC1736 are thelatest members of Linear Technology’sfamily of constant frequency, N-chan-nel high efficiency controllers. Withnew protection features, improved cir-cuit operation and strong MOSFET

drivers, the LTC1735 is an ideal up-grade to the LTC1435/LTC1435A forhigher current applications. With theintegrated VID control, the LTC1736is ideal for CPU power applications.

The high performance of these con-trollers with wide input range, 1%reference and tight load regulationmakes them ideal for next generationdesigns.

LT1505, continued from page 25

CONTINUATIONS


DESIGN INFORMATION

The LTC1658 and LTC1655: SmallestRail-to-Rail 14-Bit and 16-Bit DACs

by Hassan Malik

Expanding the rail-to-rail, voltageoutput DAC family, Linear Technol-ogy introduces two new voltage outputDACs that break the size/bits bar-rier. The LTC1658 is a 14-bitrail-to-rail voltage output DAC in atiny MSOP-8 package and theLTC1655 is a 16-bit voltage outputDAC in an SO-8 package. Both ofthese DACs also provide a convenientupgrade path for users of LTC’s 12-bit voltage output DAC family. TheLTC1658 draws only 270µA from a3V or 5V supply and is 14-bit mono-tonic over temperature. The LTC1655draws 600µA from a 5V supply and is16-bit monotonic over temperature.

These DACs have a flexible 3-wireserial interface that is SPI/QSPI andMICROWIRE compatible.

Figures 1 demonstrates the ease ofusing the LTC1658. The output swingsfrom 0V to VREF at full-scale. VREFshould be less than or equal to VCC toprevent the loss of codes and degrada-tion of PSRR near full-scale. The inputserial data is loaded as one 16-bitword with two dummy bits. The digitalinputs are TTL/CMOS level compat-ible and the CLK input has an internalSchmitt trigger for noise immunity.This allows direct optocoupler inter-facing to the part. Figure 2 plots thepart’s 0.25LSB typical DNL.

A typical application for theLTC1655 is shown in Figure 3. TheLTC1655 has the same interface asthe LTC1658 and is also capable ofbeing daisy chained. There is anonboard 2.048V bandgap referenceconnected internally to the 16-bitDAC. The rail-to-rail output nomi-nally swings from 0V to 4.096V, sincethere is a gain of two in the outputamplifier. The reference pin can beoverdriven to a value higher than2.048V if a larger output swing isdesired. Since there is a gain of 2 fromthe reference pin to the output at full-scale, the voltage on the REF pinmust always be less than VCC /2.Figure 4 plots the typical DNL of theLTC1655.

Figure 1. LTC1658 block diagram

Figure 2. The LTC1658 14-bit rail-to-railDAC in MSOP has 0.25LSB typical DNL.

Figure 3. LTC1655 block diagram Figure 4. LTC1655 typical DNL plot

CODE0

–1.0

–0.2

–0.4

–0.6

–0.8

0

0.2

0.4

0.6

0.8

1.0

DNL

ERRO

R (L

SB)

16384 32768

1658 TA02

49152 65535

–

+

14-BITDAC

2.7V TO 5.5V

GND

POWER-ONRESET

TOOTHERDACS

16-BITSHIFTREGANDDAC

LATCH

µP

DIN

VCC

14

REF

2

8 6

DOUT4

51658 TA01

CLK1

CS/LD3

7 RAIL-TO-RAILVOLTAGEOUTPUT

VOUT

CODE0

–1.0

–0.2

–0.4

–0.6

–0.8

0

0.2

0.4

0.6

0.8

1.0

DNL

ERRO

R (L

SB)

4096 8192

1658 TA02

12288 16383

–

+

16-BITDAC

4.5V TO 5.5V

GND

POWER-ONRESET

TOOTHERDACS

16-BITSHIFTREGANDDAC

LATCH

µP

DIN

VCC

16

2

8 6

DOUT4

51658 TA01

CLK1

CS/LD3

7 RAIL-TO-RAILVOLTAGEOUTPUT

VOUT

2.048V

REFREF


NEW DEVICE CAMEOS

LTC1502-3.3Single Cell to 3.3VInductorless DC/DC ConverterThe LTC1502-3.3 is LTC’s latestoffering in the regulated charge pumparena. This new charge pump is theonly inductorless single-cell boostconverter in the industry. The partemploys a quadrupler switchedcapacitor architecture to generate aregulated 3.3V supply from a singleNiCd or alkaline cell. Start-upenhancement circuitry enables theLTC1502-3.3 to power up with VIN aslow as 0.8V. Only five small ceramiccapacitors are required to make acomplete 3.3V single-cell power sup-ply with 10mA of output loadcapability.

The part also has a shutdown fea-ture that disconnects the load fromVIN and reduces quiescent current toonly 5µA. The LTC1502-3.3 is short-circuit protected and can survive anindefinite VOUT short to GND. Smallsize (8-pin MSOP package) and lowquiescent current (40µA typical) makethe LTC1502-3.3 ideal for space con-scious, low power applications suchas pagers and PDAs. Since the VOUTpin is high impedance during shut-down, the part is also well suited forsingle-cell battery backup applica-tions.

LTC1661 Micropower Dual10-Bit DAC with Sleep ModeAvailable in MS-8The LTC1661 is a micropower, dual,10-bit voltage-output DAC that isavailable in a tiny 8-pin MSOP pack-age. Required board area is only0.01in2 per DAC.

Operating on a single 2.7–5.5Vsupply, the LTC1661 draws just 60µAper DAC (120µA total for the part) fortrue micropower performance. Sleepmode further reduces total supply-plus-reference current to just 1µA.

The LTC1661 is guaranteed mono-tonic over temperature—differentialnonlinearity error is typically ±0.2LSB(±0.75LSB Max). Each DAC has a

gain of 1 from reference to output; theReference pin can be tied to VCC forfull rail-to-rail operation. The outputamplifiers are stable driving capaci-tive loads of up to 1000pF and cansource or sink up to 5mA. The out-puts swing to within a few millivolts ofeither supply rail when unloaded andhave an equivalent output resistanceof 85Ω when driving a load to therails.

The 3-wire serial interface uses a16-bit input word comprising 4 con-trol bits, 10 input-code bits, and 2don’t-care bits. Power-on reset is alsoprovided. The input logic is doublebuffered for additional flexibility ininterfacing with the microprocessorand for more effective control of mul-tiple chips that share clock and datalines.

Low supply current, power-savingSleep mode and extremely compactsize make the LTC1661 ideal for bat-tery-powered applications, while itsstraightforward usability, high per-formance and wide supply range makeit an excellent choice as a general-purpose converter.

LTC1841/LTC1842/LTC1843Dual Micropower Comparatorwith Built-In ReferenceThe LTC1841/LTC1842/LTC1843are dual micropower comparatorswith built-in references (LTC1842/LTC1843). These parts feature lessthan 5.7µA supply current over tem-perature, a 1.182V ±1% reference(LTC1842/LTC1843), programmablehysteresis (LTC1842/LTC1843) andopen-drain output comparators thatcan sink greater than 20mA. The ref-erence output can drive a bypasscapacitor of up to 0.01µF withoutoscillation.

The comparators operate fromsingle 2V to 11V supplies or ±1V to±5.5V supplies (LTC1841). Compara-tor hysteresis is easily programmedusing two resistors and the HYST pin.The comparator’s input operates fromthe negative supply to within 1.3V of

the positive supply. The comparatoroutput stage can typically sink greaterthan 20mA. By eliminating the cross-conduction current that normallyoccurs when the comparator changeslogic states, power supply glitchesare eliminated.

The LTC1841/LTC1842/LTC1843are available in 8-pin SO packages.

LTC1605-1/-2: 100ksps16-Bit ADC Now Availablewith 0V to 4V and ±4VAnalog Input RangesThe LTC1605-1 and LTC1605-2 arethe newest members of LinearTechnology’s family of 16-bit ADCs.The two new ADCs offer the user achoice of analog input ranges to helpmake full use of the wide dynamicrange offered by these converters.These 100ksps sampling ADCs fea-ture 16-bit resolution with no missingcodes and ±2LSB INL. They operatefrom a single 5V supply with typicalpower dissipation of only 55mW. Theyare offered in both 28-pin PDIP andSSOP packages.

The LTC1605-1 has an analog inputrange of 0V to 4V with ±20V overvolt-age protection. This 16-bit ADC isideally suited for single-supply sys-tems. It is a complete data acquisitionsystem containing a differential, suc-cessive-approximation A/D that usesswitched capacitor technology to per-form a 16-bit conversion. The analogfront end consists of a resistor dividernetwork followed by a sample-and-hold that allows fast moving signalsto be digitized. The LTC1605-1 alsohas a trimmed bandgap reference thatcan be overdriven with an externalreference if greater accuracy is needed.It also features a simple parallel I/Owhere the digital output word can beread as a 16-bit word or as two 8-bitbytes. The digital output word formatfor the LTC1605-1 is straight binary.

The LTC1605-2 has a bipolar ana-log input range of ±4V with ±20Vovervoltage protection (±15V overdriverecoverable) operating on a single 5Vsupply. It is also a complete dataacquisition system with the same fea-tures and parallel I/O as the

New Device Cameos


NEW DEVICE CAMEOS

LTC1605-1. The LTC1605-2 digitaloutput word format is two ’scomplement.

LTC1754-5 Regulated ChargePump Delivers 50mA in anSOT-23 PackageThe LTC1754-5 is the newest addi-tion to Linear Technology’s industryleading family of switched capacitorregulated charge pumps. Combiningthe best features of its predecessors,it delivers a full 50mA from a tinySOT-23 package while stepping upfrom 3V to a regulated 5V. The 6-pinpackage provides additional fun-ctionality by including shutdowncapability. Finally, it has built-in ther-mal shutdown circuitry that allows itto survive a continuous short circuitto ground at its output.

The quiescent supply current ofthe LTC1754-5 is only 13µA. This lowsupply current means very low powerconsumpt ion in l ight loadapplications. Furthermore, becauseit uses Burst Mode operation, its

efficiency is typically 82.7% whendelivering moderate to high load cur-rent. This efficiency is very close tothe ideal 83.3% for a 3V to 5V regulat-ing charge pump. In shutdown, thesupply current is guaranteed to beless than 1µA.

With no inductors and only threesmall capacitors, the LTC1754-5 regu-lated charge pump delivers significantpower from a small amount of realestate.

LTC1569-7: Unique 10thOrder, Linear-Phase, DCAccurate Lowpass Filter isTunable by a Single ResistorThe LTC1569-7 is a self-contained10th order linear-phase filter featur-ing cutoff frequencies up to 256kHzwhile operating on supplies from 3.3V(3V minimum) up to ±5V. Cutoff fre-quencies up to 128kHz can also beobtained with a 3V (2.7V minimum)supply. Unlike other monolithic fil-ters, the LTC1569-7’s precisionon-chip oscillator allows the cutoff

frequency to be set accurately (within2%) by a single resistor. Alternatively,for swept cutoff frequency applica-tions, an external clock can be used.

The amplitude response of theLTC1569-7 approximates a root raisedcosine, with an alpha of 0.5, for phaselinearity with excellent attenuation.The attenuation of the LTC1569-7 at1.5 times the cutoff frequency is 55dB,whereas attenuation is in excess of60dB at 2.1 times the cutoff frequency.

The DC offset of the LTC1569-7 istypically 2mV. Its DC gain linearityand SINAD are suitable for 12-bitsystems. The input of the filter can beconfigured as single ended ordifferential.

When operated at full bandwidth,the LTC1569-7 consumes 20mA on asingle 5V supply but, when slowersampling rates are required (that is,at lower cutoff frequencies), the deviceautomatically switches to a reducedsupply current, which can be as lowas 5mA. The LTC1569-7 is availablein an 8-pin SO package.

For further information on anyof the devices mentioned in thisissue of Linear Technology, usethe reader service card or callthe LTC literature servicenumber:

1-800-4-LINEAR

Ask for the pertinent data sheetsand Application Notes.

Authors can be contactedat (408) 432-1900

forthe latest information

on LTC products, visit

www.linear-tech.com


DESIGN TOOLS

Applications on DiskFilterCAD™ 2.0 CD-ROM — This CD is a powerful filterdesign tool that supports all of Linear Technology’s highperformance switched capacitor filters. Included is Fil-terView™, a document navigator that allows you toquickly find Linear Technology monolithic filter datasheets, the FilterCAD manual, application notes, designnotes and Linear Technology magazine articles. It doesnot have to be installed to run FilterCAD. It is notnecessary to use FilterView to view the documents, asthey are standard .PDF files, readable with any versionof Adobe Acrobat™. FilterCAD runs on Windows® 3.1 orWindows 95. FilterView requires Windows 95. TheFilterCAD program itself is also available on the web andwill be included on the new LinearView™ CD.

Available at no charge.

Noise Disk — This IBM-PC (or compatible) programallows the user to calculate circuit noise using LTC opamps, determine the best LTC op amp for a low noiseapplication, display the noise data for LTC op amps,calculate resistor noise and calculate noise using specsfor any op amp. Available at no charge

SPICE Macromodel Disk — This IBM-PC (or compat-ible) high density diskette contains the library of LTC opamp SPICE macromodels. The models can be used withany version of SPICE for general analog circuit simula-tions. The diskette also contains working circuit examplesusing the models and a demonstration copy of PSPICE™by MicroSim. Available at no charge

SwitcherCAD™ — The SwitcherCAD program is a pow-erful PC software tool that aids in the design andoptimization of switching regulators. The program cancut days off the design cycle by selecting topologies,calculating operating points and specifying componentvalues and manufacturer’s part numbers. 144 pagemanual included. $20.00

SwitcherCAD supports the following parts: LT1070 se-ries: LT1070, LT1071, LT1072, LT1074 and LT1076.LT1082. LT1170 series: LT1170, LT1171, LT1172 andLT1176. It also supports: LT1268, LT1269 and LT1507.LT1270 series: LT1270 and LT1271. LT1371 series:LT1371, LT1372, LT1373, LT1375, LT1376 and LT1377.

Micropower SwitcherCAD™ — The MicropowerSCADprogram is a powerful tool for designing DC/DC convert-ers based on Linear Technology’s micropower switchingregulator ICs. Given basic design parameters,MicropowerSCAD selects a circuit topology and offersyou a selection of appropriate Linear Technology switch-ing regulator ICs. MicropowerSCAD also performs circuitsimulations to select the other components which sur-round the DC/DC converter. In the case of a batterysupply, MicropowerSCAD can perform a battery lifesimulation. 44 page manual included. $20.00

MicropowerSCAD supports the following LTC micro-power DC/DC converters: LT1073, LT1107, LT1108,LT1109, LT1109A, LT1110, LT1111, LT1173, LTC1174,LT1300, LT1301 and LT1303.

Technical Books1990 Linear Databook, Vol I —This 1440 page collec-tion of data sheets covers op amps, voltage regulators,references, comparators, filters, PWMs, data conver-sion and interface products (bipolar and CMOS), in bothcommercial and military grades. The catalog featureswell over 300 devices. $10.00

1992 Linear Databook, Vol II — This 1248 page supple-ment to the 1990 Linear Databook is a collection of allproducts introduced in 1991 and 1992. The catalogcontains full data sheets for over 140 devices. The 1992Linear Databook, Vol II is a companion to the 1990Linear Databook, which should not be discarded.

$10.00

1994 Linear Databook, Vol III —This 1826 page supple-ment to the 1990 and 1992 Linear Databooks is acollection of all products introduced since 1992. A totalof 152 product data sheets are included with updatedselection guides. The 1994 Linear Databook Vol III is acompanion to the 1990 and 1992 Linear Databooks,which should not be discarded. $10.00

1995 Linear Databook, Vol IV —This 1152 page supple-ment to the 1990, 1992 and 1994 Linear Databooks is acollection of all products introduced since 1994. A totalof 80 product data sheets are included with updatedselection guides. The 1995 Linear Databook Vol IV is acompanion to the 1990, 1992 and 1994 Linear Databooks,which should not be discarded. $10.00

1996 Linear Databook, Vol V —This 1152 page supple-ment to the 1990, 1992, 1994 and 1995 Linear Databooksis a collection of all products introduced since 1995. Atotal of 65 product data sheets are included with updatedselection guides. The 1996 Linear Databook Vol V is acompanion to the 1990, 1992, 1994 and 1995 LinearDatabooks, which should not be discarded. $10.00

1997 Linear Databook, Vol VI —This 1360 page supple-ment to the 1990, 1992, 1994, 1995 and 1996 LinearDatabooks is a collection of all products introducedsince 1996. A total of 79 product data sheets are in-cluded with updated selection guides. The 1997 LinearDatabook Vol VI is a companion to the 1990, 1992, 1994,1995 and 1996 Linear Databooks, which should not bediscarded. $10.00

1990 Linear Applications Handbook, Volume I —928 pages full of application ideas covered in depth by40 Application Notes and 33 Design Notes. This catalogcovers a broad range of “real world” linear circuitry. Inaddition to detailed, systems-oriented circuits, this hand-book contains broad tutorial content together with liberaluse of schematics and scope photography. A specialfeature in this edition includes a 22-page section onSPICE macromodels. $20.00

1993 Linear Applications Handbook, Volume II —Continues the stream of “real world” linear circuitryinitiated by the 1990 Handbook. Similar in scope to the1990 edition, the new book covers Application Notes 40through 54 and Design Notes 33 through 69. Referencesand articles from non-LTC publications that we havefound useful are also included. $20.00

1997 Linear Applications Handbook, Volume III —This 976 page handbook maintains the practical outlookand tutorial nature of previous efforts, while broadeningtopic selection. This new book includes Application

Notes 55 through 69 and Design Notes 70 through 144.Subjects include switching regulators, measurementand control circuits, filters, video designs, interface,data converters, power products, battery chargers andCCFL inverters. An extensive subject index referencescircuits in LTC data sheets, design notes, applicationnotes and Linear Technology magazines. $20.00

1998 Data Converter Handbook — This impressive1360 page handbook includes all of the data sheets,application notes and design notes for LinearTechnology’s family of high performance data converterproducts. Products include A/D converters (ADCs), D/Aconverters (DACs) and multiplexers—including the fast-est monolithic 16-bit ADC, the 3Msps, 12-bit ADC withthe best dynamic performance and the first dual 12-bitDAC in an SO-8 package. Also included are selectionguides for references, op amps and filters and a glossaryof data converter terms. $10.00

Interface Product Handbook — This 424 page hand-book features LTC’s complete line of line driver andreceiver products for RS232, RS485, RS423, RS422,V.35 and AppleTalk® applications. Linear’s particularexpertise in this area involves low power consumption,high numbers of drivers and receivers in one package,mixed RS232 and RS485 devices, 10kV ESD protectionof RS232 devices and surface mount packages.

Available at no charge

Power Solutions Brochure — This collection of cir-cuits contains real-life solutions for common powersupply design problems. There are over 70 circuits,including descriptions, graphs and performancespecifications. Topics covered include battery chargers,power supplies for desktop and portable computers,supplies for portable electronics, telecommunicationssupplies, offline supplies and various other power man-agement techniques, including Hot Swap™ circuits.


Data Conversion Solutions Brochure — This 64 pagecollection of data conversion circuits, products andselection guides serves as excellent reference for thedata acquisition system designer. Over 60 products areshowcased, solving problems in low power, small sizeand high performance data conversion applications—with performance graphs and specifications. Topicscovered include ADCs, DACs, voltage references andanalog multiplexers. A complete glossary defines dataconversion specifications; a list of selected applicationand design notes is also included.


Telecommunications Solutions Brochure — This col-lection of circuits, new products and selection guidescovers a wide variety of products targeted for thetelecommunications industry. Circuits solving real lifeproblems are shown for central office switching, cellularphone, base station and other telecom applications.New products introduced include high speed amplifiers,A/D converters, power products, interface transceiversand filters. Reference material includes a telecommuni-cations glossary, serial interface standards, protocolinformation and a complete list of key application notesand design notes. Available at no charge

DESIGN TOOLS

Information furnished by Linear Technology Corporationis believed to be accurate and reliable. However, LinearTechnology makes no representation that the circuitsdescribed herein will not infringe on existing patent rights. continued on page 40

Linear Technology Magazine • February 1999© 1999 Linear Technology Corporation/Printed in U.S.A./

LINEAR TECHNOLOGY CORPORATION1630 McCarthy BoulevardMilpitas, CA 95035-7417(408) 432-1900 FAX (408) 434-0507www.linear-tech.comFor Literature Only: 1-800-4-LINEAR

Acrobat is a trademark of Adobe Systems, Inc.; Windowsis a registered trademark of Microsoft Corp.; Macintoshand AppleTalk are registered trademarks of Apple Com-puter, Inc. PSPICE is a trademark of MicroSim Corp.

CD-ROM CatalogLinearView — LinearView™ CD-ROM version 3.0 isLinear Technology’s latest interactive CD-ROM. It al-lows you to instantly access thousands of pages ofproduct and applications information, covering LinearTechnology’s complete line of high performance analogproducts, with easy-to-use search tools.

The LinearView CD-ROM includes the complete productspecifications from Linear Technology’s Databook li-brary (Volumes I–VI) and the complete ApplicationsHandbook collection (Volumes I–III). Our extensivecollection of Design Notes and the complete collectionof Linear Technology magazine are also included.

A powerful search engine built into the LinearView CD-ROM enables you to select parts by various criteria,such as device parameters, keywords or part numbers.All product categories are represented: data conversion,references, amplifiers, power products, filters and inter-face circuits. Up-to-date versions of Linear Technology’s

DESIGN TOOLS, continued from page 39 software design tools, SwitcherCAD, Micropower Switch-erCAD, FilterCAD, Noise Disk and Spice Macromodellibrary, are also included. Everything you need to knowabout Linear Technology’s products and applications isreadily accessible via LinearView. LinearView runs un-der Windows 95 and Macintosh® System 8.0 or later.Available at no charge.

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Other web sites usually require the visitor to downloadlarge document files to see if they contain the desiredinformation. This is cumbersome and inconvenient. Tosave you time and ensure that you receive the correctinformation the first time, the first page of each datasheet, application note and Linear Technology maga-zine is recreated in a fast, download-friendly format.This allows you to determine whether the document iswhat you need, before downloading the entire file.

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JAPANLinear Technology KK5F NAO Bldg.1-14 Shin-Ogawa-cho Shinjuku-kuTokyo, 162JapanPhone: 81-3-3267-7891FAX: 81-3-3267-8510

KOREALinear Technology Korea Co., LtdNamsong Building, #403Itaewon-Dong 260-199Yongsan-Ku, Seoul 140-200KoreaPhone: 82-2-792-1617FAX: 82-2-792-1619

SINGAPORELinear Technology Pte. Ltd.507 Yishun Industrial Park ASingapore 768734Phone: 65-753-2692FAX: 65-752-0108

SWEDENLinear Technology ABSollentunavägen 63S-191 40 SollentunaSwedenPhone: (08)-623-1600FAX: (08)-623-1650

TAIWANLinear Technology CorporationRm. 602, No. 46, Sec. 2Chung Shan N. Rd.Taipei, Taiwan, R.O.C.Phone: 886-2-521-7575FAX: 886-2-562-2285

UNITED KINGDOMLinear Technology (UK) Ltd.The Coliseum, Riverside WayCamberley, Surrey GU15 3YLUnited KingdomPhone: 44-1276-677676FAX: 44-1276-64851

World HeadquartersLinear Technology Corporation1630 McCarthy BoulevardMilpitas, CA 95035-7417Phone: (408) 432-1900FAX: (408) 434-0507

U.S. AreaSales OfficesNORTHEAST REGIONLinear Technology Corporation3220 Tillman Drive, Suite 120Bensalem, PA 19020Phone: (215) 638-9667FAX: (215) 638-9764

Linear Technology Corporation266 Lowell St., Suite B-8Wilmington, MA 01887Phone: (978) 658-3881FAX: (978) 658-2701

NORTHWEST REGIONLinear Technology Corporation720 Sycamore DriveMilpitas, CA 95035Phone: (408) 428-2050FAX: (408) 432-6331

SOUTHEAST REGIONLinear Technology Corporation17000 Dallas Parkway, Suite 219Dallas, TX 75248Phone: (972) 733-3071FAX: (972) 380-5138

Linear Technology Corporation9430 Research Blvd.Echelon IV Suite 400Austin, TX 78759Phone: (512) 343-3679FAX: (512) 343-3680

Linear Technology Corporation1080 W. Sam Houston Pkwy., Suite 225Houston, TX 77043Phone: (713) 463-5001FAX: (713) 463-5009

Linear Technology Corporation5510 Six Forks Road, Suite 102Raleigh, NC 27609Phone: (919) 870-5106FAX: (919) 870-8831

CENTRAL REGIONLinear Technology Corporation2010 E. Algonquin Road, Suite 209Schaumburg, IL 60173Phone: (847) 925-0860FAX: (847) 925-0878

Linear Technology CorporationKenosha, WI 53144Phone: (414) 859-1900FAX: (414) 859-1974

SOUTHWEST REGIONLinear Technology Corporation21243 Ventura Blvd., Suite 208Woodland Hills, CA 91364Phone: (818) 703-0835FAX: (818) 703-0517

Linear Technology Corporation15375 Barranca Parkway, Suite A-213Irvine, CA 92618Phone: (949) 453-4650FAX: (949) 453-4765

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