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Exercises Lesson 3: The Control Unit Computer Structure and Organization Graduate in Computer Sciences Graduate in Computer Engineering Academic course: 2012-2013

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  • Exercises

    Lesson 3: The Control Unit

    Computer Structure andOrganization

    Graduate in Computer SciencesGraduate in Computer Engineering

    Academic course: 2012-2013

  • Lesson 3: Page: 2 / 12

    The Control Unit

    1. Lets be an elemental computer with the following elements:

    • A 16 operations ALU with two multiplexor attached to their inputs.

    • Accumulator register to store temporal values.

    • A 32 registers file with two outputs ports and one input port.

    • PC attached to data / addresses bus.

    • Main memory of 128 Mbytes of capacity

    • Memory reading and writing use two clock periods

    • Data / addresses bus is 32 bits length.

    Execute next instruction:

    SHL F, 5

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

    c. Design micro instruction format. Control Memory 64k.

    d. Design the micro program for the above execution phase.

  • Lesson 3: Page: 3 / 12

    The Control Unit

    Tcp

    Tmem

    MemoriaPrincipal

    MemRdWr

    a Dir A

    ALUentera

    Mux X Mux YX0, X1 Y0

    LacAcum

    LiR.Ins

    ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    señales de control

    DIT

    LcpCP

    Sal A Sal B

    Entrada

    Lr

    Banco deRegistros

    Dir A Dir B

    Tac

    Talu

    a Dir B

    Bus de datos / direcciones

    Selop

    2. Lest following elemental computer:

    • A 8 operations ALU: +, ×, arithmetic shift left and right AND, OR,

    XOR y logical shift right.

    • Accumulator register to store temporal values.

    • A 16 registers file with two outputs ports and one input port.

    • Autoincremented PC.

    • Main memory of 16Mbytes of capacity.

    • Data bus and addresses bus are 32 bits length.

    • All instruction formats are 4 words length.

  • Lesson 3: Page: 4 / 12

    The Control Unit

    Tcp

    Tmem

    MemoriaPrincipal

    MemRdWr

    a Dir A

    ALUentera

    Mux X Mux YX0 Y0

    LacAcum

    LiR.Ins

    ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    señales de control

    DIT

    LcpCP

    Sal A Sal B

    Entrada

    Lr

    Banco deRegistros

    Dir A Dir B

    Tac

    Talu

    a Dir B

    Bus de datos

    Bus de direcciones

    TadbdTbdad

    Selop

    Inc

    Execute next instruction:

    XOR F, [E + 1234h]

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

    c. Design micro instruction format. Control Memory 64k.

    d. Design the micro program for the above execution phase.

    3. Lets be the following elemental computer:

    • A 16 operations ALU. Input to Output transfer is one of its operations, as

    well ass A-B and B-A.

  • Lesson 3: Page: 5 / 12

    The Control Unit

    • Accumulator register to store temporal values.

    • A 8 registers files with one input port and one output port.

    • Autoincremented PC

    • Main Memory of 128Mbytes of capacity.

    • Data and Addresses buses are 16 bits length.

    • Data bus content can be transferred to Addresses bus and vice versa.

    Tcp

    Tmem

    MemoriaPrincipal

    MemRd

    Wr

    a Dir

    LacAcum

    CP

    Tac

    Talu

    Bus de datos

    Bus de direcciones

    TadbdTbdad

    ALUentera

    EntradaLr

    Banco deRegistros

    Dir.Salida

    LiR.Ins ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    señales de control

    DIT

    Selop

    Inc

    Lcp

    Execute next instruction:

    SUB [B++], A

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

    c. Design microinstruction format. Control Memory 32k.

    d. Design the micro program for the above execution phase.

  • Lesson 3: Page: 6 / 12

    The Control Unit

    4. Lets be the following elemental computer:

    • Two ALUs: one of them is specialized in multiply and divide

    operations and the another one in addition and subtraction

    operations.

    • Both ALUs have an accumulator register to store temporal

    values.

    • A 32 registers file with one input port and one output port..

    • Autoincremented PC

    • Main Memory of 32Mbytes of capacity.

    • Data and Addresses buses are 32 bits length.

    • Data bus content can be transferred to Addresses bus and vice

    versa.

    • The whole instructions formats are 32 bits length.

    Tcp

    Tmem

    MemoriaPrincipal

    MemRd

    Wr

    a Dir

    CP

    Bus de datos

    Bus de direcciones

    TadbdTbdad

    EntradaLr

    Banco deRegistros

    Dir.Salida

    LiR.Ins ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    señales de control

    DIT

    LacAcum

    Tac

    Talu

    ALUmul / div

    Talu2

    ALUadd / sub

    Lac2Acum2

    SelopSelop2

    Lcp

    Inc

  • Lesson 3: Page: 7 / 12

    The Control Unit

    Execute the following instruction:

    Div C, D

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

    c. Design microinstruction format. Control Memory 32k.

    d. Design the micro program for the above execution phase.

    5. Lets be the next elemental computer:

    • A 32 operations ALU with the possibility of input to output

    transfer.

    • Temporal and Accumulator registers to store temporal values

    which cannot be used by assembly language.

    • 16 register files with two output ports and one input port.

    • Stack pointer attached to addresses register

    • Main memory: 16 Mbytes of capacity

    • Data bus content can be transferred to Addresses bus and vice

    versa.

    • Buses are 32 bits length

    • The whole instruction formats are 32 bits length.

    Execute next instruction:

    ADD A, B

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

  • Lesson 3: Page: 8 / 12

    The Control Unit

    LtmpTmp

    Tcp

    Tmem

    MemoriaPrincipal

    MemRdWr

    ALUentera

    Mux X Mux YX0, X1 Y0

    LacAcum

    señales de control

    LcpCP

    Sal A Sal B

    Entrada

    Lr

    Banco deRegistros

    Dir A Dir B

    Tac

    Talu

    Bus de datos / direcciones

    Selop

    a Dir A

    LiR.Ins

    ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    DIT

    a Dir B

    LspSP

    Tsp Ttmp

    6. Lets be following elemental computer:

    • Two specialized ALUs: one in multiply and dicide operations,

    addition and subtraction the another one.

    • Temporal and Accumulator register to store temporal values with

    no assembly access.

    • 32 registers file with one input and output ports.

    • Autoincremented PC..

    • Stack pointer attached to addresses bus.

    • Main memory of 32Mbytes of capacity

    • Buses are 32 bits length.

    • The whole instruction formats are 32 bits length.

  • Lesson 3: Page: 9 / 12

    The Control Unit

    • Data bus content can be transferred to Addresses bus and vice

    versa.

    Tcp

    Tmem

    MemoriaPrincipal

    MemRd

    Wr

    a Dir

    LcpCP

    Bus de datos

    Bus de direcciones

    TadbdTbdad

    EntradaLr

    Banco deRegistros

    Dir.Salida

    LiR.Ins ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    señales de control

    DIT

    LacAcum

    Tac

    Talu

    ALU 1mul / div

    Talu2

    ALU 2add / sub

    Lac2Acum2

    SelopSelop2

    LtmpTmp

    LspSP

    Tsp Ttmp

    Mux XX0

    Inc

    Execute following isntructions:

    ADD [[B + 1000h]], [C + 1234h]

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

    7. Lets be a elemental computer as follows.:

    • Two specialized ALUs. a fixed point ALU and a floating point one.

  • Lesson 3: Page: 10 / 12

    The Control Unit

    • Temporal and Accumulator registers to store temporal values

    which cannot be used by assembly language.

    • Two 32 registers file with one input and output ports. One for

    fixed point registers and the another for floating point ones.

    • Autoincremented PC

    • Main Memory of 4Gbytes of capacity.

    • Buses are 32 bits length.

    • The whole instruction formats are 32 bits length.

    • Data bus content can be transferred to Addresses bus and vice

    versa.

    Tcp

    Tmem

    MemoriaPrincipal

    MemRdWr

    a Dir A

    LcpCP

    Bus de datos

    Bus de direcciones

    TadbdTbdad

    EntradaLr

    Banco deRegistrosde coma

    fija

    Dir ASalida

    LacAcum

    Tac

    Talu

    LiR.Ins ResetC.Fases

    LFlags Registro Estado

    Unidad de Control

    Desp./ DI.

    OsciladorReloj

    señales de control

    DIT

    a Dir B

    Lac2

    Talu2

    Acum2

    Sal A Sal B

    EntradaLr2

    Banco deRegistrosde comaflotante

    Dir A Dir B

    Inc

    ALUcoma fija

    Mux X Mux YX0 Y0

    Selop

    Ttmp

    LtmpTmp

    ALUcoma flotante

    Mux X Mux YX0' Y0'

    Selop2

    Execute following instruction:

    MULF D, C, 3.27

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram

  • Lesson 3: Page: 11 / 12

    The Control Unit

    8. Lets be next elemental computer:

    • A 16 operations ALU.

    • 3 registers file: B, C and D.

    • Main Memory of 640Kbytes.

    • Data and Addresses buses are 32 bits length

    Execute following instruction:

    SUB B, [ C + 1000h ]

    a. Modify bellow computer if needed

    b. Describe elemental operation to perform in each execution phase

    c. Draw above instruction chronogram

  • Lesson 3: Page: 12 / 12

    The Control Unit

    9. Lets be following elemental computer:

    • A 16 operations ALU.

    • Datapath contains PC, SP and Accumulator register, as well as a

    3 registers file.

    • Main memory 32 Kbytes of capacity.

    • Data bus: 8 bits.

    • Addreses bus: 16 bits.

    • Instructions have different sizes

    Execute next instruction:

    POP B

    a. Describe elemental operation to perform in each execution phase

    b. Draw above instruction chronogram