lenovo.g570.compal.piwg1 piwg2.la 6751p.la 6753p.rev.0.3.schematics
TRANSCRIPT
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8/19/2019 Lenovo.G570.Compal.piwg1 PIWG2.LA 6751P.la 6753P.rev.0.3.Schematics
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Cover Page
Cust
om
1 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Cover Page
Cust
om
1 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Cover Page
Cust
om
1 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.
Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH
DIS+UMA+Muxless M/B Schematics Document
REV:0.3
Compal PIWG1 / PIWG2
2010-10-22
ATI Robson/PX3.0,PX4.0
LA-6751P / LA-6753P
Lenovo G470 / G570
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8/19/2019 Lenovo.G570.Compal.piwg1 PIWG2.LA 6751P.la 6753P.rev.0.3.Schematics
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1 1
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Block Diagram
Cust
om
2 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Block Diagram
Cust
om
2 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Block Diagram
Cust
om
2 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.
File Name : G470/G570
Compal confidential
37.5mm*37.5mm
25mm*25mm
FDI *8100MHz 2.7GT/s
Intel
LPC BUS
BANK 0, 1, 2, 3
Sandy Bridge
Socket-rPGA988B
DMI *4
FCBGA 989
DDR3*4
VRAM 64*16
Thermal Sensor
PCI-E(WLAN)
USB(WiMAX)
IntelCougar Point
EC
Touch Pad Int. KBD
SPI ROM
AMDRobson XT
DDR3 SO-DIMM *2 PCI-E x16
Dual Channel DDR3 1066MHz(1.5V) DDR3 1333MHz(1.5V)
Up to 8GB
HDMI
Connector
CRTConnector
LVDSConnector
PCI ExpressMini Card Slot *1
AthrosAR8151-B(GLAN)AR8152-B(10/100)
RJ-45Connector
PCI-E x1 *6
WiMAXWLAN
SPIROMBIOS
USB2.0 *14
SATA *6
SATA ODD
SATA3 HDD
eSATA+USB(Left)
(Port 0/Port 1 support SATA3)
Audio Codec
CX20671
LAN
Conexant
Card Reader
RTS5139
Reltek
SDXC/MMC/MS/xD
Camera Conn.
BlueTooth Conn.
Mini Card Slot *1
USB2.0 *1(Right)
USB2.0 *2(Left)
AZALIA
2 channel speaker
Int. MIC
Audio Jacks
For 14"(Page 4x) LS6753P PWR/B LS6751P CardReader/B
For 15"(Page 4x+1) LS6753P PWR/B
LS6754P LED/B LS6751P CardReader/B
LS6755P ODD/B
ENE KB930ENE KB9012
EMC1403
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODYOF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Notes List
B
3 59Friday
, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODYOF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Notes List
B
3 59Friday
, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODYOF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
Notes List
B
3 59Friday
, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.
USB 2.0 USB 1.1 Port3 ExternalUSB Port
USB Port (Left Side)
Camera
Blue Tooth
0
1
2
3
4
5
6
7
8
9
10
11
12
13
UHCI0
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
EHCI1
EHCI2
USB Port Table
Board ID / SKU ID Table for AD channelBOARD ID Table
EC SM Bus1 address
Device
DDR DIMM0 1001 000Xb
DDR DIMM2 1001 010Xb
STATE SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3#
SLP_S4# SLP_S5# +VALW +V +VS Clock
Vcc 3.3V +/- 5%
100K +/- 5%Ra/Rc/ReBoard ID Rb / Rd / Rf V min
01
2
3
08.2K +/- 5%
0 V 0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
AD_BID V typ AD_BID V AD_BID max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
3.300 V
0 V 0 V
4
5
6
7 NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
1.185 V 1.264 V
Board ID
0
12
3
4
5
6
7
PCB Revision
0.1
PCH SM Bus address
Device Address
Address
Address
Voltage Rails
Unpop
BTO Item
BOM Structure
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOW LOW LOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGH HIGH HIGH
HIGH
HIGH
HIGH
EC SM Bus2 address
Device
Smart Battery 0001 011X b
PX@UMA and PX bus
DIS@
Blue Tooth BT@
Connector ME@
Discrete HDMI VGA_HDMI@
@
USB/B (Right Side)
Card Reader
Mini Card(WLAN)
UMA HDMI UMA_HDMI@
Discrete Only
X
V+3VALW+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
XX
V
V
X
XX
PCH
ThermalSensor
X
X
X
SML0CLK
SML0DATAPCH
SMB_EC_CK2
SOURCE
KB930
VGA BATT KE930 SODIMM
SMBUS Control Table
SMBCLK
SMBDATAPCH
WLANWWAN
SMB_EC_DA2
SMB_EC_CK1SMB_EC_DA1 X V
V
X
X
X
X
X
X
X
X
X
X
X
X
X
KB930
SML1CLK
SML1DATAPCH XX X
X
X
USB Port (Left Side)
USB Port (Left Side)
V+3VS
+3VS
+3VS
+3VS
V+3VS
eSATA
ESATA@
O
X
S3
+3VS
X
X
+3VALW
+5VS
O
+CPU_CORE
OO
X
X X
+VCCP
power plane
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
+GFX_CORE
+1.8VS
+0.75VS
+1.05VS
+VGA_CORE
COMMON HDMI HDMI@
BOM Structure Table
BACO BACO@
EVTDVT
PVT
MP
PX3.0 only, not for BACO PX3@
45 LEVEL 45@
10/100 LAN 8152@
GIGA LAN GIGA@
Cameara CMOS@
Thermal Sensor EMC1403-2 1001_101xb
100_1100 bThermal Sensor EMC1402-1
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C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
dGPU Block Diagram
B
4 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number
Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
dGPU Block Diagram
B
4 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.Title
Size Document Number
Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
dGPU Block Diagram
B
4 59Friday, November 26, 2010
2010/07/12 2012/07/11
Compal Electronics, Inc.
Note: Do not drive any IOs before VDDR3 is ramped up.
VDD_CT(1.8V)
VDDR3(3.3VGS)
VDDC/VDDCI(1.12V)
PERSTb
Straps Reset
Straps Valid
REFCLK
VDDR1(1.5VGS)
Power-Up/Down Sequence1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-upsequence, though a shorter ramp-up duration is preferred.
2. VDDR3 should ramp-up before or simultaneously with VDDC.
3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin beforeDPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10.
4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC andVDD_CT have ramped up.
5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts toramp-up (or vice versa).)
PCIE_VDDC(1.0V)
Global ASIC Reset
T4+16clock
MOS
PE_GPIO1
PE_GPIO0 PE_EN
BIF_VDDC
PX_mode
PWRGOOD
SI4800
SI4800
Regulator
Regulator
5 4 3 2 1
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5
4
4
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2
2
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D D
C C
B B
A A
FDI_FSYNC0
FDI_LSYNC0FDI_LSYNC1
FDI_FSYNC1
FDI_INT
EDP_COMP
PEG_COMP
PCIE_CRX_GTX_N15
PCIE_CRX_GTX_N10
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_N6PCIE_CRX_GTX_N7
PCIE_CRX_GTX_N4PCIE_CRX_GTX_N3
PCIE_CRX_GTX_N9
PCIE_CRX_GTX_N12PCIE_CRX_GTX_N13
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P15PCIE_CRX_GTX_P14
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_P1PCIE_CRX_GTX_P2
PCIE_CTX_GRX_C_P0
PCIE_CTX_GRX_C_P10
PCIE_CTX_GRX_C_P15PCIE_CTX_GRX_C_P14
PCIE_CTX_GRX_C_P8
PCIE_CTX_GRX_C_P6
PCIE_CTX_GRX_C_P4
PCIE_CTX_GRX_C_P13
PCIE_CTX_GRX_C_P7
PCIE_CTX_GRX_C_P1
PCIE_CTX_GRX_C_P9
PCIE_CTX_GRX_C_P12
PCIE_CTX_GRX_C_P3
PCIE_CTX_GRX_C_P5
PCIE_CTX_GRX_C_P2
PCIE_CTX_GRX_C_P11
PCIE_CTX_GRX_C_N14PCIE_CTX_GRX_C_N15
PCIE_CTX_GRX_C_N0
PCIE_CTX_GRX_C_N10
PCIE_CTX_GRX_C_N6
PCIE_CTX_GRX_C_N8
PCIE_CTX_GRX_C_N13
PCIE_CTX_GRX_C_N4
PCIE_CTX_GRX_C_N9
PCIE_CTX_GRX_C_N5
PCIE_CTX_GRX_C_N2
PCIE_CTX_GRX_C_N12
PCIE_CTX_GRX_C_N7
PCIE_CTX_GRX_C_N1
PCIE_CTX_GRX_C_N11
PCIE_CTX_GRX_C_N3
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P15PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P12
eDP_HPD
FDI_LSYNC0
FDI_FSYNC0
FDI_LSYNC1
FDI_FSYNC1
FDI_INT
DMI_CTX_PRX_P0
DMI_CRX_PTX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_P3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_N2
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_FSYNC0FDI_FSYNC1
FDI_INT
FDI_LSYNC0FDI_LSYNC1
PCIE_CRX_GTX_N[0..15]
PCIE_CTX_GRX_P[0..15]
PCIE_CTX_GRX_N[0..15]
PCIE_CRX_GTX_P[0..15]
+1.05VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(1/7) DMI,FDI,PEG
Custom
5 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(1/7) DMI,FDI,PEG
Custom
5 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(1/7) DMI,FDI,PEG
Custom
5 59Friday, November 26, 2010
2010/07/12 2012/07/11
PEG_ICOMPI and RCOMPO signals should beshorted and routedwith - max length = 500 mils - typicalimpedance = 43 mohmsPEG_ICOMPO signals should be routed with -max length = 500 mils- typical impedance = 14.5 mohms
eDP_COMPIO and ICOMPO signalsshould be shorted near ballsand routed with typicalimpedance
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6/60
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_TCKXDP_TRST#
XDP_TMSXDP_TDIXDP_TDO
SUSP
H_CATERR#
XDP_BPM#4
XDP_TRST#
XDP_PREQ#
SM_RCOMP0
H_PECI
XDP_BPM#7
PM_DRAM_PWRGD_R
H_THRMTRIP#
XDP_TDO
SM_RCOMP2
XDP_BPM#1
XDP_BPM#6
CLK_CPU_DMI_RCLK_CPU_DMII#_R
XDP_BPM#3
H_CPUPWRGD_R
XDP_TDI
XDP_BPM#0
BUF_CPU_RST#
XDP_DBRESET#
H_PROCHOT#_R
XDP_TCK
H_DRAMRST#
XDP_BPM#2
H_PM_SYNC_R
XDP_PRDY#
SM_RCOMP1
XDP_BPM#5
PLT_RST#BUFO_CPU_RST#
H_PROCHOT#
PM_SYS_PWRGD
_BUF
BUF_CPU_RST#
XDP_TMS
PM_DRAM_PWRGD
SUSP
H_DRAMRST#
H_PM_SYNC
CLK_CPU_DMI#
H_THRMTRIP#
CLK_CPU_DMI
H_CPUPWRGD
H_SNB_IVB#
H_PECI
H_PROCHOT#
PLT_RST#
SYS_PWROK
PCH_POK
+1.05VS
+1.5V_CPU_VDDQ
+3VALW
+1.05VS
+3VS
+1.05VS
+1.05VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(2/7) PM,XDP,CLK
Custom
6 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(2/7) PM,XDP,CLK
Custom
6 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(2/7) PM,XDP,CLK
Custom
6 59Friday, November 26, 2010
2010/07/12 2012/07/11
PU/PD for JTAG signals
DDR3 Compensation Signals
Compal Electronics, Inc.
Buffered reset to CPU
DG1.0
closs to EC 250~750mils
DG1.0
3V
Change footprint
20100814
10/12 reserve R880 / R882
R13 1K_0402_5%R13 1K_0402_5%12
R23 51_0402_5%@R23 51_0402_5%
@ 12
U2
SN74LVC1G07DCKR_SC70-5
U2
SN74LVC1G07DCKR_SC70-5
NC 1
A 2
G
3
Y4
P
5
R3275_0402_5%
R3275_0402_5%
1
2R3443_0402_1%
R3443_0402_1%1 2
G
D
S
Q12N7002H_SOT23-3
@
G
D
S
Q12N7002H_SOT23-3
@2
1
3
R30200_0402_5%R30200_0402_5%
1
2
R21 51_0402_5%R21 51_0402_5%12R22
0_0402_5%R22
0_0402_5%
1 2
R27
10K_0402_5%
R27
10K_0402_5%
1
2
R24 51_0402_5%R24 51_0402_5%12
R20 51_0402_5%R20 51_0402_5%12
R10 0_0402_5%R10 0_0402_5%1 2
R3339_0402_5%
@R3339_0402_5%
@
1
2
R350_0402_5%@R350_0402_5%@
1
2
R1556_0402_5%
R1556_0402_5%
1 2
C330.1U_0402_16V4Z
C330.1U_0402_16V4Z
1
2
R18 200_0402_1%R18 200_0402_1%12
R260_0402_5%
R260_0402_5%1 2
R161 100K_0402_5%R161 100K_0402_5%
1 2
U1
74AHC1G09GW_TSSOP5
U1
74AHC1G09GW_TSSOP5
B1
A2
G
3
O 4
P
5
R11
0_0402_5%
R11
0_0402_5%
1 2
R17 25.5_0402_1%R17 25.5_0402_1%12R16 140_0402_1%R16 140_0402_1%12
R12 1K_0402_5%R12 1K_0402_5%12
R29
130_0402_5%
R29
130_0402_5%1 2
C L O C K S
M I S C
T H E R M A
L
P W R
M A N A G E M E N T
D D R
3
M I S C
J T A G & B P M
JCPU1B
Sandy Bridge_rPGA_Rev1p0ME@
C L O C K S
M I S C
T H E R M A
L
P W R
M A N A G E M E N T
D D R
3
M I S C
J T A G & B P M
JCPU1B
Sandy Bridge_rPGA_Rev1p0ME@
SM_RCOMP[1] A5
SM_RCOMP[2] A4
SM_DRAMRST# R8
SM_RCOMP[0] AK1
BCLK# A27
BCLK A28
DPLL_REF_CLK# A15
DPLL_REF_CLK A16
CATERR#AL33
PECIAN33
PROCHOT#AL32
THERMTRIP#AN32
SM_DRAMPWROKV8
RESET#AR33
PRDY# AP29
PREQ# AP27
TCK AR26
TMS AR27
TRST# AP30
TDI AR28
TDO AP26
DBR# AL35
BPM#[0] AT28
BPM#[1] AR29
BPM#[2] AR30
BPM#[3] AT30
BPM#[4] AP32
BPM#[5] AR31
BPM#[6] AT31
BPM#[7] AR32
PM_SYNCAM34
SKTOCC#AN34
PROC_SELECT#C26
UNCOREPWRGOODAP33
R28 1K_0402_5%R28 1K_0402_5%12
C340.1U_0402_16V4Z
C340.1U_0402_16V4Z
1
2
R8820_0402_5%@R8820_0402_5%
@1 2
R25 51_0402_5%R25 51_0402_5%12
R8800_0402_5%@R8800_0402_5%
@1 2
R9
62_0402_5%
R9
62_0402_5%
1
2
5 4 3 2 1
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7/60
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52
DDR_A_D53
DDR_A_D31
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19
DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_MA15
DDR_A_DQS0
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4
DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0
DDR_A_MA14
DDR_A_MA5DDR_A_MA4
DDR_A_MA1DDR_A_MA2DDR_A_MA3
DDR_A_MA9
DDR_A_MA7DDR_A_MA6
DDR_A_MA12DDR_A_MA13
DDR_A_MA8
DDR_A_MA11DDR_A_MA10
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
DDR_B_MA15
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_DQS7
DDR_B_DQS0DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS6
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14
DDR3_DRAMRST#_RH_DRAMRST#
DRAMRST_CNTRL
DDR_A_D[0..63]
DDR_A_BS0DDR_A_BS1DDR_A_BS2
DDR_A_WE#DDR_A_RAS#DDR_A_CAS#
M_CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_DIMMA
M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA
DDR_CS0_DIMMA# DDR_CS1_DIMMA#
M_ODT0 M_ODT1
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
DDR_B_BS0DDR_B_BS1DDR_B_BS2
DDR_B_D[0..63]
DDR_B_WE#DDR_B_RAS#DDR_B_CAS#
DDR_CS3_DIMMB#
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
M_CLK_DDR2 M_CLK_DDR#2 DDR_CKE2_DIMMB
M_CLK_DDR3
DDR_CS2_DIMMB#
M_ODT3 M_ODT2
DDR_CKE3_DIMMB M_CLK_DDR#3
DDR3_DRAMRST# H_DRAMRST#
DRAMRST_CNTRL_PCH
DDR_A_MA[0..15] DDR_B_MA[0..15]
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(3/7) DDRIII
Custom
7 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(3/7) DDRIII
Custom
7 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(3/7) DDRIII
Custom
7 59Friday, November 26, 2010
2010/07/12 2012/07/11Compal Electronics, Inc.Eiffel used 0.01u
Module design used 0.047u
R360_0402_5%@R360_0402_5%@
1 2
D D R
S Y S T E M
M E M O R Y
B
JCPU1D
Sandy Bridge_rPGA_Rev1p0ME@
D D R
S Y S T E M
M E M O R Y
B
JCPU1D
Sandy Bridge_rPGA_Rev1p0ME@
SB_BS[0]AA9
SB_BS[1]AA7
SB_BS[2]R6
SB_CAS#AA10
SB_RAS#AB8
SB_WE#AB9
SB_CLK[0] AE2
SB_CLK[1] AE1
SB_CLK#[0] AD2
SB_CLK#[1] AD1
SB_CKE[0] R9
SB_CKE[1] R10
SB_ODT[0] AE4
SB_ODT[1] AD4
SB_DQS[4] AN6
SB_DQS#[4] AN5
SB_DQS[5] AP8
SB_DQS#[5] AP9
SB_DQS[6] AK11
SB_DQS#[6] AK12
SB_DQS[7] AP14
SB_DQS#[7] AP15
SB_DQS[0] C7
SB_DQS#[0] D7
SB_DQS[1] G3
SB_DQS#[1] F3
SB_DQS[2] J6
SB_DQS#[2] K6
SB_DQS[3] M3
SB_DQS#[3] N3
SB_MA[0] AA8
SB_MA[1] T7
SB_MA[2] R7
SB_MA[3] T6
SB_MA[4] T2
SB_MA[5] T4
SB_MA[6] T3
SB_MA[7] R2
SB_MA[8] T5
SB_MA[9] R3
SB_MA[10] AB7
SB_MA[11] R1
SB_MA[12] T1
SB_MA[13] AB10
SB_MA[14] R5
SB_MA[15] R4
SB_DQ[0]C9
SB_DQ[1]A7
SB_DQ[2]D10
SB_DQ[3]C8
SB_DQ[4]A9
SB_DQ[5]A8
SB_DQ[6]D9
SB_DQ[7]D8
SB_DQ[8]G4
SB_DQ[9]F4
SB_DQ[10]F1
SB_DQ[11]G1
SB_DQ[12]G5
SB_DQ[13]F5
SB_DQ[14]F2
SB_DQ[15]G2
SB_DQ[16]J7
SB_DQ[17]J8
SB_DQ[18]K10
SB_DQ[19]K9
SB_DQ[20]J9SB_DQ[21]J10
SB_DQ[22]K8
SB_DQ[23]K7
SB_DQ[24]M5
SB_DQ[25]N4
SB_DQ[26]N2
SB_DQ[27]N1
SB_DQ[28]M4
SB_DQ[29]N5
SB_DQ[30]M2
SB_DQ[31]M1
SB_DQ[32]AM5
SB_DQ[33]AM6
SB_DQ[34]AR3
SB_DQ[35]AP3
SB_DQ[36]AN3
SB_DQ[37]AN2
SB_DQ[38]AN1
SB_DQ[39]AP2
SB_DQ[40]AP5
SB_DQ[41]AN9
SB_DQ[42]AT5
SB_DQ[43]AT6
SB_DQ[44]AP6
SB_DQ[45]AN8
SB_DQ[46]AR6
SB_DQ[47]AR5
SB_DQ[48]AR9
SB_DQ[49]AJ11
SB_DQ[50]AT8
SB_DQ[51]AT9
SB_DQ[52]AH11
SB_DQ[53]AR8
SB_DQ[54]AJ12
SB_DQ[55]AH12
SB_DQ[56]AT11
SB_DQ[57]AN14
SB_DQ[58]AR14
SB_DQ[59]AT14
SB_DQ[60]AT12
SB_DQ[61]AN15
SB_DQ[62]AR15
SB_DQ[63]AT15
RSVD_TP[11] AB2
RSVD_TP[12] AA2
RSVD_TP[13] T9
RSVD_TP[14] AA1
RSVD_TP[15] AB1
RSVD_TP[16] T10
SB_CS#[0] AD3
SB_CS#[1] AE3
RSVD_TP[17] AD6
RSVD_TP[18] AE6
RSVD_TP[19] AD5
RSVD_TP[20] AE5
R400_0402_5%
R400_0402_5%
1 2
R381K_0402_5%R381K_0402_5%
1 2
D D R
S Y S T E M
M E M O R Y
A
JCPU1C
Sandy Bridge_rPGA_Rev1p0ME@
D D R
S Y S T E M
M E M O R Y
A
JCPU1C
Sandy Bridge_rPGA_Rev1p0ME@
SA_BS[0]AE10
SA_BS[1]AF10
SA_BS[2]V6
SA_CAS#AE8
SA_RAS#AD9
SA_WE#AF9
SA_CLK[0] AB6
SA_CLK[1] AA5
SA_CLK#[0] AA6
SA_CLK#[1] AB5
SA_CKE[0] V9
SA_CKE[1] V10
SA_CS#[0] AK3
SA_CS#[1] AL3
SA_ODT[0] AH3
SA_ODT[1] AG3
SA_DQS[0] D4
SA_DQS#[0] C4
SA_DQS[1] F6
SA_DQS#[1] G6
SA_DQS[2] K3
SA_DQS#[2] J3
SA_DQS[3] N6
SA_DQS#[3] M6
SA_DQS[4] AL5
SA_DQS#[4] AL6
SA_DQS[5] AM9
SA_DQS#[5] AM8
SA_DQS[6] AR11
SA_DQS#[6] AR12
SA_DQS[7] AM14
SA_DQS#[7] AM15
SA_MA[0] AD10
SA_MA[1] W1
SA_MA[2] W2
SA_MA[3] W7
SA_MA[4] V3
SA_MA[5] V2
SA_MA[6] W3
SA_MA[7] W6
SA_MA[8] V1
SA_MA[9] W5
SA_MA[10] AD8
SA_MA[11] V4
SA_MA[12] W4
SA_MA[13] AF8
SA_MA[14] V5
SA_MA[15] V7
SA_DQ[0]C5
SA_DQ[1]D5
SA_DQ[2]D3
SA_DQ[3]D2
SA_DQ[4]D6
SA_DQ[5]C6
SA_DQ[6]C2
SA_DQ[7]C3
SA_DQ[8]F10
SA_DQ[9]F8
SA_DQ[10]G10
SA_DQ[11]G9
SA_DQ[12]F9
SA_DQ[13]F7
SA_DQ[14]G8
SA_DQ[15]G7
SA_DQ[16]K4
SA_DQ[17]K5
SA_DQ[18]K1
SA_DQ[19]J1
SA_DQ[20]J5SA_DQ[21]J4
SA_DQ[22]J2
SA_DQ[23]K2
SA_DQ[24]M8
SA_DQ[25]N10
SA_DQ[26]N8
SA_DQ[27]N7
SA_DQ[28]M10
SA_DQ[29]M9
SA_DQ[30]N9
SA_DQ[31]M7
SA_DQ[32]AG6
SA_DQ[33]AG5
SA_DQ[34]AK6
SA_DQ[35]AK5
SA_DQ[36]AH5
SA_DQ[37]AH6
SA_DQ[38]AJ5
SA_DQ[39]AJ6
SA_DQ[40]AJ8
SA_DQ[41]AK8
SA_DQ[42]AJ9
SA_DQ[43]AK9
SA_DQ[44]AH8
SA_DQ[45]AH9
SA_DQ[46]AL9
SA_DQ[47]AL8
SA_DQ[48]AP11
SA_DQ[49]AN11
SA_DQ[50]AL12
SA_DQ[51]AM12
SA_DQ[52]AM11
SA_DQ[53]AL11
SA_DQ[54]AP12
SA_DQ[55]AN12
SA_DQ[56]AJ14
SA_DQ[57]AH14
SA_DQ[58]AL15
SA_DQ[59]AK15
SA_DQ[60]AL14
SA_DQ[61]AK14
SA_DQ[62]AJ15
SA_DQ[63]AH15
RSVD_TP[1] AB4
RSVD_TP[2] AA4
RSVD_TP[4] AB3
RSVD_TP[5] AA3
RSVD_TP[3] W9
RSVD_TP[6] W10
RSVD_TP[7] AG1
RSVD_TP[8] AH1
RSVD_TP[9] AG2
RSVD_TP[10] AH2
R394.99K_0402_1%
R394.99K_0402_1%
1
2
R371K_0402_5%
R371K_0402_5%
1
2
G
D S
Q2BSS138_NL_SOT23-3
G
D S
Q2BSS138_NL_SOT23-3 2
13
C350.047U_0402_16V4ZC350.047U_0402_16V4Z
1
2
5 4 3 2 1
-
8/19/2019 Lenovo.G570.Compal.piwg1 PIWG2.LA 6751P.la 6753P.rev.0.3.Schematics
8/605 4 3 2 1
D D
C C
B B
A A
CFG4
CFG6
CFG2
CFG7
CFG2
CFG4
CFG6CFG7
CFG5
CFG5
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(4/7) RSVD,CFGCustom
8 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(4/7) RSVD,CFGCustom
8 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(4/7) RSVD,CFGCustom
8 59Friday, November 26, 2010
2010/07/12 2012/07/11
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately following xxRESETBde assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device isconnected to the Embedded Display Port
1 : Disabled; No Physical Display Portattached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1: Normal Operation; Lane # definition matchessocket pin map definition
Compal Electronics, Inc.
*
*
*
8/5 Check
R3531K_0402_1%
R3531K_0402_1%
1
2
R43
1K_0402_1%
@R43
1K_0402_1%
@
1
2
T12 PADT12 PAD
R44
1K_0402_1%
@R44
1K_0402_1%
@
1
2
T11 PADT11 PAD
T 9 P ADT 9 P ADT10 PADT10 PAD
T13P AD T 13PAD
R E S
E R V E D
JCPU1E
Sandy Bridge_rPGA_Rev1p0ME@
R E S
E R V E D
JCPU1E
Sandy Bridge_rPGA_Rev1p0ME@
CFG[0]AK28
CFG[1]AK29
CFG[2]AL26
CFG[3]AL27
CFG[4]AK26CFG[5]AL29
CFG[6]AL30
CFG[7]AM31
CFG[8]AM32
CFG[9]AM30
CFG[10]AM28
CFG[11]AM26
CFG[12]AN28
CFG[13]AN31
CFG[14]AN26
CFG[15]AM27
CFG[16]AK31
CFG[17]AN29
RSVD34 AM33
RSVD35 AJ27
RSVD38 J16
RSVD42 AT34
RSVD39 H16
RSVD40 G16
RSVD41 AR35
RSVD43 AT33
RSVD45 AR34
RSVD56 AT2
RSVD57 AT1
RSVD58 AR1
RSVD46 B34
RSVD47 A33
RSVD48 A34
RSVD49 B35
RSVD50 C35
RSVD51 AJ32
RSVD52 AK32
RSVD30 AE7
RSVD31 AK2
RSVD28 L7
RSVD29 AG7
RSVD27J15
RSVD16C30
RSVD15D23
RSVD17A31
RSVD18B30
RSVD20D30
RSVD19B29
RSVD22A30
RSVD21B31
RSVD23C29
RSVD24J20
RSVD37 T8
RSVD6B4
RSVD7D1
RSVD8F25
RSVD9F24
RSVD11D24
RSVD12G25
RSVD13G24
RSVD14E23
RSVD32 W8
RSVD33 AT26
RSVD25B18
RSVD44 AP35
RSVD10F23
RSVD5AJ26
VAXG_VAL_SENSEAJ31
VSSAXG_VAL_SENSEAH31
VCC_VAL_SENSEAJ33
VSS_VAL_SENSEAH33
KEY B1
VCC_DIE_SENSE AH27
VCCIO_SELA19
RSVD54 AN35
RSVD55 AM35
R451K_0402_1%
@R451K_0402_1%
@
1
2
R421K_0402_1%
@ R421K_0402_1%
@
1
2
R411K_0402_1%R411K_0402_1%
1
2
R641K_0402_1%
R641K_0402_1%
1
2
-
8/19/2019 Lenovo.G570.Compal.piwg1 PIWG2.LA 6751P.la 6753P.rev.0.3.Schematics
9/60
5 4 3 2 1
-
8/19/2019 Lenovo.G570.Compal.piwg1 PIWG2.LA 6751P.la 6753P.rev.0.3.Schematics
10/605 4 3 2 1
D D
C C
B B
A A
+V_SM_VREF_CNT +V_SM_VREF
+VCCSA
H_FC_C22
+1.8VS_VCCPLL VCCSA_SENSE
VCCSA_SENSE
R UN _O N_ CP U1 .5 VS 3# R UN _ON _C PU 1. 5V S3
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3#
VCCSA_SEL
VCC_AXG_SENSE VSS_AXG_SENSE
VSSSA_SENSE
VCCSA_SENSE
SUSP#
CPU1.5V_S3_GATE
SUSP
+VCCSA
+1.5V_CPU_VDDQ
+1.8VS
+VGFX_CORE
+1.5V_CPU_VDDQ
+1.5V
+1.5V_CPU_VDDQ
+1.5V +1.5V_CPU_VDDQ
+VSB+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(6/7) PWRCustom
10 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(6/7) PWRCustom
10 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(6/7) PWRCustom
10 59Friday, November 26, 2010
2010/07/12 2012/07/11
6/9 change 330U to 22U X2
Change footprint
20100814
Change footprint
20100814
Change footprint
20100814
10/21 Change
8/27 change to @
8/27 change to @
8/27 change to stuff
9/27 update C128 to D2 and @
10/5 change to 1K
11/18 add for sequence
R621K_0402_1%R621K_0402_1%
1
2
C 1 3 2
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
C 1 3 2
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
1
2
Q5AP2302GN-HF_SOT23-3
@Q5AP2302GN-HF_SOT23-3
@
1
2
3
R55220_0402_5%
R55220_0402_5%
1
2
C 1 2 7
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
@ C 1 2 7
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
1
2
POWER
G R A P H I C S
D D R 3
- 1 . 5 V
R A I L
S
S E N S E
L I N E S
1 . 8 V
R A I L
S A
R A I L
V R E F
M I S C
JCPU1G
Sandy Bridge_rPGA_Rev1p0ME@
POWER
G R A P H I C S
D D R 3
- 1 . 5 V
R A I L
S
S E N S E
L I N E S
1 . 8 V
R A I L
S A
R A I L
V R E F
M I S C
JCPU1G
Sandy Bridge_rPGA_Rev1p0ME@
SM_VREF AL1
VSSAXG_SENSE AK34
VAXG_SENSE AK35
VAXG1AT24
VAXG2AT23
VAXG3AT21
VAXG4AT20
VAXG5AT18
VAXG6AT17
VAXG7AR24
VAXG8AR23
VAXG9AR21
VAXG10AR20
VAXG11AR18
VAXG12AR17
VAXG13AP24
VAXG14AP23
VAXG15AP21
VAXG16AP20
VAXG17AP18
VAXG18AP17
VAXG19AN24
VAXG20AN23
VAXG21AN21
VAXG22AN20
VAXG23AN18
VAXG24
AN17
VAXG25AM24
VAXG26AM23
VAXG27AM21
VAXG28AM20
VAXG29AM18
VAXG30AM17
VAXG31AL24
VAXG32AL23
VAXG33AL21
VAXG34AL20
VAXG35AL18
VAXG36AL17
VAXG37AK24
VAXG38AK23
VAXG39AK21
VAXG40AK20
VAXG41AK18
VAXG42AK17
VAXG43AJ24
VAXG44AJ23
VAXG45AJ21
VAXG46AJ20
VAXG47AJ18
VAXG48AJ17
VAXG49AH24
VAXG50AH23
VAXG51AH21
VAXG52AH20
VAXG53AH18
VAXG54AH17
VDDQ11 U4
VDDQ12 U1
VDDQ13 P7
VDDQ14 P4
VDDQ15 P1
VDDQ1 AF7
VDDQ2 AF4
VDDQ3 AF1
VDDQ4 AC7
VDDQ5 AC4
VDDQ6 AC1
VDDQ7 Y7
VDDQ8 Y4
VDDQ9 Y1
VDDQ10 U7
VCCPLL1B6
VCCPLL2A6
VCCSA1 M27
VCCSA2 M26
VCCSA3 L26
VCCSA4 J26
VCCSA5 J25
VCCSA6 J24
VCCSA7 H26VCCSA8
H25
VCCSA_SENSE H23
VCCSA_VID1 C24
VCCPLL3A2
FC_C22 C22
C 1 0 7
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 7
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 1 3
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 1 3
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
J1
PAD-OPEN 4x4m
@J1
PAD-OPEN 4x4m
@
1 2
R631K_0402_1%R631K_0402_1%
1
2
R885
0_0402_5%
R885
0_0402_5%
1 2
R580_0402_5%@
R580_0402_5%@1 2
R69 10K_0402_5%
R69 10K_0402_5%
1 2
R60
0_0402_5%
DIS@
R60
0_0402_5%
DIS@
1
2
C 1 2 5
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
C 1 2 5
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
1
2
C 9 9
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 9 9
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
R590_0402_5%
@
R590_0402_5%
@1 2
+
C 1 1 5
3 3 0 U _D 2 _2 . 5 V Y _R 9 M
PX@
+
C 1 1 5
3 3 0 U _D 2 _2 . 5 V Y _R 9 M
PX@
1
2
R56
15K_0402_1%
R56
15K_0402_1%
1
2
C 1 2 6
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
C 1 2 6
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
1
2
C 1 0 8
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 8
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 0 4
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 4
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C1140.1U_0402_16V4Z
C1140.1U_0402_16V4Z
1
2
C970.1U_0603_25V7KC970.1U_0603_25V7K
1
2
C 1 2 2
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 2 2
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 2 9
0 .1 U _ 0 4 0 2 _1 0 V 6 K
@
C 1 2 9
0 .1 U _ 0 4 0 2 _1 0 V 6 K
@
1
2
C 1 0 6
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 6
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 5 4
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
C 1 5 4
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
1
2
R610_0402_5%
R610_0402_5%
12
R666100K_0402_5%
@R666100K_0402_5%
@
1
2
C 1 2 1
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 2 1
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 0 5
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 5
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
R667100K_0402_5% @
R667100K_0402_5% @
1
2
C 3 9 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
@
C 3 9 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
@
1
2
C 9 8
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 9 8
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 2 4
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
C 1 2 4
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
1
2
+
C 1 2 8
3 3 0 U _D 2 _2 . 5 V Y _R 9 M
@
+
C 1 2 8
3 3 0 U _D 2 _2 . 5 V Y _R 9 M
@
1
2
C 1 0 9
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 9
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 1 1
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
C 1 1 1
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
1
2
C 1 0 0
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 0
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 3 4 5
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
C 3 4 5
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
1
2
G
D
S
Q42N7002H_SOT23-3G
D
S
Q42N7002H_SOT23-3
2
1
3
C 1 2 0
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 2 0
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 1 7
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 1 7
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 3 0
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
C 1 3 0
1 0 U _ 0 8 0 5 _ 6 . 3 V 6 M
1
2
C920.1U_0402_10V6K
@ C920.1U_0402_10V6K
@
1
2
C 9 5
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 9 5
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
C 1 1 9
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 1 9
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
+
C 1 1 6
3 3 0 U _D 2 _2 . 5 V Y _R 9 M
@+
C 1 1 6
3 3 0 U _D 2 _2 . 5 V Y _R 9 M
@
1
2
C 1 1 2
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 1 2
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 0 2
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 2
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
R57330K_0402_5%@
R57330K_0402_5%@
1
2
C 1 1 8
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 1 8
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
+ C123330U_2.5V_M
+ C123330U_2.5V_M
1
2
R66 0_0402_5%R66 0_0402_5%1 2
G
D
S
Q72N7002H_SOT23-3
@
G
D
S
Q72N7002H_SOT23-3
@
2
1
3
C 1 3 1
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
C 1 3 1
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
1
2
R68 0_0402_5%@
R68 0_0402_5%@
1 2
R65 0_0402_5%R65 0_0402_5%1 2
C 9 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 9 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
G
D
S
Q32N7002H_SOT23-3 G
D
S
Q32N7002H_SOT23-3
2
1
3
C 1 0 3
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 3
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
C 1 0 1
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
C 1 0 1
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
PX@
1
2
R6680_0402_5% R6680_0402_5%1 2
R670_0805_5%
R670_0805_5%
1 2
C 1 1 0
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
C 1 1 0
2 2 U _ 0 8 0 5 _ 6 . 3 V 6 M
@
1
2
U3
DMN3030LSS-13_SOP8L-8
U3
DMN3030LSS-13_SOP8L-8
365
78
2
4
1
5 4 3 2 1
-
8/19/2019 Lenovo.G570.Compal.piwg1 PIWG2.LA 6751P.la 6753P.rev.0.3.Schematics
11/605 4 3 2 1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(7/7) VSSCustom
11 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(7/7) VSSCustom
11 59Friday, November 26, 2010
2010/07/12 2012/07/11 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. ANDCONTAINSCONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6751P 0.2
PROCESSOR(7/7) VSSCustom
11 59Friday, November 26, 2010
2010/07/12 2012/07/11Compal Electronics, Inc.
VSS
JCPU1H
Sandy Bridge_rPGA_Rev1p0ME@
VSS
JCPU1H
Sandy Bridge_rPGA_Rev1p0ME@
VSS1AT35
VSS2AT32
VSS3AT29
VSS4AT27
VSS5AT25
VSS6AT22
VSS7AT19
VSS8AT16
VSS9AT13
VSS10AT10
VSS11AT7
VSS12AT4
VSS13AT3
VSS14AR25
VSS15AR22
VSS16AR19VSS17AR16
VSS18AR13
VSS19AR10
VSS20AR7
VSS21AR4
VSS22AR2
VSS23AP34
VSS24AP31
VSS25AP28
VSS26AP25
VSS27AP22
VSS28AP19
VSS29AP16
VSS30AP13
VSS31AP10
VSS32AP7
VSS33AP4
VSS34AP1
VSS35AN30
VSS36AN27
VSS37AN25
VSS38AN22
VSS39AN19
VSS40AN16
VSS41AN13
VSS42AN10
VSS43AN7
VSS44AN4
VSS45AM29
VSS46AM25
VSS47AM22
VSS48
AM19
VSS49AM16
VSS50AM13
VSS51AM10
VSS52AM7
VSS53AM4
VSS54AM3
VSS55AM2
VSS56AM1
VSS57AL34
VSS58AL31
VSS59AL28
VSS60AL25
VSS61AL22
VSS62AL19
VSS63AL16
VSS64AL13
VSS65AL10
VSS66AL7
VSS67AL4
VSS68AL2
VSS69AK33
VSS70AK30
VSS71AK27
VSS72AK25
VSS73AK22
VSS74AK19
VSS75AK16
VSS76AK13
VSS77AK10
VSS78AK7
VSS79AK4
VSS80AJ25
VSS81 AJ22
VSS82 AJ19
VSS83 AJ16
VSS84 AJ13
VSS85 AJ10
VSS86 AJ7
VSS87 AJ4
VSS88 AJ3
VSS89 AJ2
VSS90 AJ1
VSS91 AH35
VSS92 AH34
VSS93 AH32
VSS94 AH30
VSS95 AH29
VSS96 AH28VSS97 AH26
VSS98 AH25
VSS99 AH22
VSS100 AH19
VSS101 AH16
VSS102 AH7
VSS103 AH4
VSS104 AG9
VSS105 AG8
VSS106 AG4
VSS107 AF6
VSS108 AF5
VSS109 AF3
VSS110 AF2
VSS111 AE35
VSS112 AE34
VSS113 AE33
VSS114 AE32
VSS115 AE31
VSS116 AE30
VSS117 AE29
VSS118 AE28
VSS119 AE27
VSS120 AE26
VSS121 AE9
VSS122 AD7
VSS123 AC9
VSS124 AC8
VSS125 AC6
VSS126 AC5
VSS127 AC3
VSS128
AC2
VSS129 AB35
VSS130 AB34
VSS131 AB33
VSS132 AB32
VSS133 AB31
VSS134 AB30
VSS135 AB29
VSS136 AB28
VSS137 AB27
VSS138 AB26
VSS139 Y9
VSS140 Y8
VSS141 Y6
VSS142 Y5
VSS143 Y3
VSS144 Y2
VSS145 W35
VSS146 W34
VSS147 W33
VSS148 W32
VSS149 W31
VSS150 W30
VSS151 W29
VSS152 W28
VSS153 W27
VSS154 W26
VSS155 U9
VSS156 U8
VSS157 U6
VSS158 U5
VSS159 U3
VSS160 U2
VSS
JCPU1I
Sandy Bridge_rPGA_Rev1p0ME@
VSS
JCPU1I
Sandy Bridge_rPGA_Rev1p0ME@
VSS161T35
VSS162T34
VSS163T33
VSS164T32
VSS165T31
VSS166T30
VSS167T29
VSS168T28
VSS169T27
VSS170T26
VSS171P9
VSS172P8
VSS173P6
VSS174P5VSS175P3
VSS176P2
VSS177N35
VSS178N34
VSS179N33
VSS180N32
VSS181N31
VSS182N30
VSS183N29
VSS184N28
VSS185N27
VSS186N26
VSS187M34
VSS188L33
VSS189L30
VSS190L27
VSS191L9
VSS192L8
VSS193L6
VSS194L5
VSS195L4
VSS196L3
VSS197L2
VSS198L1
VSS199K35
VSS200K32
VSS201K29
VSS202K26
VSS203J34
VSS204J31
VSS205H33
VSS206
H30
VSS207H27
VSS208H24
VSS209H21
VSS210H18
VSS211H15
VSS212H13
VSS213H10
VSS214H9
VSS215H8
VSS216H7
VSS217H6
VSS218H5
VSS219H4
VSS220H3
VSS221H2
VSS222H1
VSS223G35
VSS224G32
VSS225G29
VSS226G26
VSS227G23
VSS228G20
VSS229G17
VSS230G11
VSS231F34
VSS232F31
VSS233F29
VSS234 F22
VSS235 F19
VSS236 E30
VSS237 E27
VSS238 E24
VSS239 E21
VSS240 E18
VSS241 E15
VSS242 E13
VSS243 E10
VSS244 E9
VSS245 E8
VSS246 E7
VSS247 E6VSS248 E5
VSS249 E4
VSS250 E3
VSS251 E2
VSS252 E1
VSS253 D35
VSS254 D32
VSS255 D29
VSS256 D26
VSS257 D20
VSS258 D17
VSS259 C34
VSS260 C31
VSS261 C28
VSS262 C27
VSS263 C25
VSS264 C23
VSS265 C10
VSS266 C1
VSS267 B22
VSS268 B19
VSS269 B17
VSS270 B15
VSS271 B13
VSS272 B11
VSS273 B9
VSS274 B8
VSS275 B7
VSS276 B5
VSS277 B3
VSS278 B2
VSS279
A35
VSS280 A32
VSS281 A29
VSS282 A26
VSS283 A23
VSS284 A20
VSS285 A3
5 4 3 2 1
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5 4 3 2 1
D D
C C
B B
A A
DDR_A_D31
DDR_A_D12
DDR_CKE0_DIMMA
DDR_A_D59
DDR_A_D6
DDR_A_MA3
DDR_CS1_DIMMA#
DDR_A_D39
DDR_A_BS1
DDR_A_DQS0
DDR_A_WE#
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_DQS7
DDR_A_D0
DDR_A_D57
DDR_A_D46
DDR_A_D28
DDR_A_DM0
DDR_A_D19
DDR_A_DQS#5
DDR_A_D51
DDR_A_D4
DDR_A_DM4
DDR_A_D30
DDR_A_DQS2
DDR_A_D44
DDR_A_RAS#
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_DQS3
DDR_A_MA8
DDR_CS0_DIMMA#
DDR_A_D10
DDR_A_MA6
DDR_A_D27
DDR_A_D3
DDR3_DRAMRST#
DDR_A_MA10
DDR_A_DQS#7
DDR_A_D1
DDR_A_DQS#6
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_D29
DDR_A_DQS#4
DDR_A_D52
DDR_A_DM3
DDR_A_DQS5
DDR_A_D54
DDR_A_D49
DDR_A_BS2
DDR_A_D45
DDR_A_D9
DDR_A_DM7
DDR_A_D7
DDR_A_MA1
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_BS0
DDR_A_CAS# M_ODT0
DDR_A_D37
DDR_A_MA5
DDR_A_DQS#1
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D24
DDR_A_D15
DDR_A_D23
DDR_A_D56
DDR_A_D53
DDR_A_D47
DDR_A_D18
M_ODT1
DDR_A_D43
DDR_A_D34
M_CLK_DDR1M_CLK_DDR#1
DDR_A_D48
DDR_A_DQS#2
DDR_A_D11
DDR_A_D38
M_CLK_DDR0M_CLK_DDR#0
DDR_A_DQS#3
DDR_A_D32
DDR_A_D8
DDR_A_DQS1
DDR_A_MA13
DDR_A_MA11
DDR_A_D50
DDR_A_D61
DDR_A_MA2
DDR_A_D41
DDR_A_D17
DDR_A_D36
DDR_A_D26
DDR_A_D63
DDR_A_D2
DDR_A_D5
DDR_A_D22
DDR_A_D25
DDR_A_DQS6
DDR_A_D35
DDR_A_D14
DDR_A_MA12
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DM6
DDR_A_D42
DDR_CKE1_DIMMA
+VREF_CA
+VREF_DQ_DIMMA
DDR_A_MA15
DDR_A_DM0DDR_A_DM1DDR_A_DM2DDR_A_DM3
DDR_A_DM4DDR_A_DM5DDR_A_DM6DDR_A_DM7
SMB_CLK_S3SMB_DATA_S3
DDR_A_DQS#[0..7]
DDR_A_D[0..63]
DDR_A_DQS[0..7]
DDR_A_MA[0..15]
DDR_CKE0_DIMMA
DDR_A_BS2
M_CLK_DDR0M_CLK_DDR#0
DDR_A_BS0
DDR_A_WE#DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_CKE1_DIMMA
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# M_ODT0
M_CLK_DDR1 M_CLK_DDR#1
M_ODT1
DDR3_DRAMRST#
SMB_CLK_S3 SMB_DATA_S3
+0.75VS
+3VS
+1.5V +1.5V+VREF_DQ_DIMMA +1.5V
+VREF_DQ_DIMMA
+1.5V
+0.75VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OF ENGINEERINGDRAWING ISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. AND CONTAINSCONFIDENTIALAND TRADESECRET INFORMATION. THISSHEETMAY NOTBE TRANSFERED FROM THECUSTODY OF THECOMPETENTDIVISION OF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THISSHEETNOR THEI NFORMATIONITCONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DDRIII-SODIMM SLOT1Custom
12 59Friday, November 26, 2010
2010/07/12 2012/07/11Compal Electronics, Inc.
LA-6751P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OF ENGINEERINGDRAWING ISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. AND CONTAINSCONFIDENTIALAND TRADESECRET INFORMATION. THISSHEETMAY NOTBE TRANSFERED FROM THECUSTODY OF THECOMPETENTDIVISION OF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THISSHEETNOR THEI NFORMATIONITCONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DDRIII-SODIMM SLOT1Custom
12 59Friday, November 26, 2010
2010/07/12 2012/07/11Compal Electronics, Inc.
LA-6751P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OF ENGINEERINGDRAWING ISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. AND CONTAINSCONFIDENTIALAND TRADESECRET INFORMATION. THISSHEETMAY NOTBE TRANSFERED FROM THECUSTODY OF THECOMPETENTDIVISION OF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THISSHEETNOR THEI NFORMATIONITCONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DDRIII-SODIMM SLOT1Custom
12 59Friday, November 26, 2010
2010/07/12 2012/07/11Compal Electronics, Inc.
LA-6751P
DDR3 SO-DIMM A
Layout Note:
Place near DIMM
3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
VDDQ(1.5V) =
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VREF =
1*0402 2.2uf
VDDSPD (3.3V)=
1*0402 0.1uf 1*0402 2.2uf
Layout Note:
Place near DIMM
Layout Note:
Place near DIMM
(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4
(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)OSCAN
7/28 Update connect GND directly
C 1 3 6
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
C 1 3 6
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
1
2
C 1 3 9
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 3 9
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 3 4
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
C 1 3 4
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
1
2
C 1 5 5
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
C 1 5 5
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
1
2
C 1 4 3
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 4 3
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 4 1
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 4 1
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
R731K_0402_1%
R731K_0402_1%
1
2
C 1 3 7
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
@
C 1 3 7
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
@
1
2
C 1 3 8
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
@
C 1 3 8
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
@
1
2
C 1 5 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 5 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
C 1 4 2
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 4 2
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 4 5
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 4 5
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
R8110K_0402_5%
R8110K _0402_5%
1 2
C 1 4 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 4 6
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
C 1 4 4
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 4 4
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 3 3
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 3 3
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
JDIMM1
FOX_AS0A626-U4SN-7F
ME@
JDIMM1
FOX_AS0A626-U4SN-7F
ME@
VREF_DQ1 VSS1 2
VSS23
DQ44
DQ05 DQ5 6
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719 VSS8 20
DQ821
DQ1222
DQ923 DQ13 24
VSS925
VSS1026
DQS#127 DM1 28
DQS129 RESET# 30
VSS1131
VSS1232
DQ1033 DQ14 34
DQ1135
DQ1536
VSS1337 VSS14 38
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851 DQ23 52
DQ1953 VSS19 54VSS2055 DQ28 56
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261 DQS#3 62
DM363
DQS364
VSS2365 VSS24 66
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83 A11 84
A985
A786
VDD587 VDD6 88
A889
A690
CKE073 CKE1 74
VDD175
VDD276
NC177 A15 78
BA279
A1480
VDD381 VDD4 82
A591 A4 92
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105 VDD12 106
A10/AP107
BA1108
BA0109 RAS# 110
VDD13111
VDD14112
WE#113
S0#114
CAS#115 ODT0 116
VDD15117
VDD16118
A13119 ODT1 120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133 VSS30 134
DQS#4135
DM4136
DQS4137 VSS31 138
VSS32139
DQ38140
DQ34141 DQ39 142
DQ35143 VSS33 144
VSS34145
DQ44146
DQ40147 DQ45 148
DQ41149
VSS35150
VSS36151 DQS#5 152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165 DQ53 166
VSS41167
VSS42168
DQS#6169 DM6 170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175 DQ55 176
DQ51177
VSS45178
VSS46179 DQ60 180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185 DQS#7 186
DM7187
DQS7188
VSS49189 VSS50 190
DQ58191
DQ62192
DQ59193 DQ63 194
VSS51195
VSS52196
SA0197 EVENT# 198
VDDSPD199
SDA200
SA1201 SCL 202
VTT1203 VTT2 204
G1205 G2 206
C 1 4 8
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 4 8
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
C 1 4 0
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 4 0
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
C 1 4 7
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 4 7
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
C 1 3 5
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 3 5
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
R 8 3
1 0 K _ 0 4 0 2 _ 5 %
R 8 3
1 0 K _ 0 4 0 2 _ 5 %
1
2
C 1 5 1
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
C 1 5 1
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
1
2
R72
1K_0402_1%
R72
1K_0402_1%
1
2
C 1 5 0
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
@
C 1 5 0
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
@
1
2
C 1 5 2
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
C 1 5 2
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
1
2
R711K_0402_1%
R711K_0402_1%
1
2
R701K_0402_1%
R701K_0402_1%
1
2
C 1 5 3
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
@
C 1 5 3
1 U _ 0 4 0 2 _ 6 . 3 V 6 K
@
1
2
+ C149220U_6.3V_M
@
+ C149220U_6.3V_M
@
1
2
5 4 3 2 1
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5 4 3 2 1
D D
C C
B B
A A
DDR_B_D36
DDR_B_D63
DDR_B_MA15
DDR_B_DM6
DDR_B_D39
DDR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR_B_DQS7
DDR_B_D46
DDR_B_DQS#5
DDR_B_DM4
DDR_B_D44
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_MA6
DDR_B_DQS#7
DDR_B_D52
DDR_B_DQS5
DDR_B_D54
DDR_B_D45
DDR_B_D60
M_ODT2
DDR_B_D37
DDR_B_MA14
DDR_B_D55
DDR_B_MA4
DDR_B_D62
DDR_B_D53
DDR_B_D47
M_ODT3
M_CLK_DDR3M_CLK_DDR#3
DDR_B_D38
DDR_B_MA11
DDR_B_D61
DDR_B_MA2
SMB_CLK_S3SMB_DATA_S3
DDR_B_DQS6
DDR_B_D35
DDR_B_MA12
DDR_B_DQS4
DDR_B_D42
DDR_CKE2_DIMMB
DDR_B_D59
DDR_B_MA3
DDR_CS3_DIMMB#
DDR_B_WE#
DDR_B_D57
DDR_B_D51
DDR_B_D33
DDR_B_D58
DDR_B_DM5
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#6
DDR_B_D40
DDR_B_MA9
DDR_B_DQS#4
DDR_B_D49
DDR_B_BS2
DDR_B_DM7
DDR_B_MA1
DDR_B_BS0
DDR_B_CAS#
DDR_B_MA5
DDR_B_D56
DDR_B_D43
DDR_B_D34
DDR_B_D48
M_CLK_DDR2M _CLK_DDR#2
DDR_B_D32
DDR_B_MA13
DDR_B_D50
DDR_B_D41
DDR_B_DM6DDR_B_DM7
DDR_B_DM0DDR_B_DM1DDR_B_DM2DDR_B_DM3
DDR_B_DM4DDR_B_DM5
+VREF_CB
DDR_B_D5
DDR_B_D22
DDR_B_D14
DDR_B_DQS#0
DDR_B_D31
DDR_B_D12
DDR_B_D6
DDR_B_DQS0
DDR_B_DM2
DDR_B_DM1
DDR_B_D28
DDR_B_D4
DDR_B_D30
DDR_B_DQS3
DDR3_DRAMRST#
DDR_B_D29
DDR_B_D7
DDR_B_D13
DDR_B_D20DDR_B_D21
DDR_B_D15
DDR_B_D23
DDR_B_DQS#3
DDR_CKE3_DIMMB
DDR_B_D26
DDR_B_D2
DDR_B_D25
+VREF_DQ_DIMMB
DDR_B_D0
DDR_B_DM0
DDR_B_D19
DDR_B_DQS2
DDR_B_D10
DDR_B_D27
DDR_B_D3
DDR_B_D1
DDR_B_D16
DDR_B_DM3
DDR_B_D9
DDR_B_DQS#1
DDR_B_D24
DDR_B_D18
DDR_B_DQS#2
DDR_B_D11
DDR_B_D8
DDR_B_DQS1
DDR_B_D17
DDR3_DRAMRST#
DDR_B_DQS#[0..7]
DDR_B_D[0..63]
DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_CKE3_DIMMB
M_CLK_DDR3 M_CLK_DDR#3
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# M_ODT2
M_ODT3
SMB_DATA_S3 SMB_CLK_S3
DDR_B_BS2
DDR_CKE2_DIMMB
M_CLK_DDR2M_CLK_DDR#2
DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
DDR_CS3_DIMMB#
+0.75VS+3VS
+1.5V
+VREF_DQ_DIMMB
+1.5V
+0.75VS
+1.5V
+VREF_DQ_DIMMB
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OF ENGINEERINGDRAWING ISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. AND CONTAINSCONFIDENTIALAND TRADESECRET INFORMATION. THISSHEETMAY NOTBE TRANSFERED FROM THECUSTODY OF THECOMPETENTDIVISIONOF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THISSHEETNOR THEINFORMATION ITCONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DDRIII-SODIMM SLOT2
13 59Friday, November 26, 2010
2010/07/12 2012/07/11Com pal Electronics, Inc.
LA-6751P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OF ENGINEERINGDRAWING ISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. AND CONTAINSCONFIDENTIALAND TRADESECRET INFORMATION. THISSHEETMAY NOTBE TRANSFERED FROM THECUSTODY OF THECOMPETENTDIVISIONOF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THISSHEETNOR THEINFORMATION ITCONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DDRIII-SODIMM SLOT2
13 59Friday, November 26, 2010
2010/07/12 2012/07/11Com pal Electronics, Inc.
LA-6751P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THISSHEET OF ENGINEERINGDRAWING ISTHE PROPRIETARYPROPERTYOF COMPALELECTRONICS, INC. AND CONTAINSCONFIDENTIALAND TRADESECRET INFORMATION. THISSHEETMAY NOTBE TRANSFERED FROM THECUSTODY OF THECOMPETENTDIVISIONOF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BYCOMPAL ELECTRONICS, INC. NEITHER THISSHEETNOR THEINFORMATION ITCONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DDRIII-SODIMM SLOT2
13 59Friday, November 26, 2010
2010/07/12 2012/07/11Com pal Electronics, Inc.
LA-6751P
Layout Note:
Place near DIMM
1*0402 0.1uf 1*0402 2.2uf
3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VDDQ(1.5V) =
1*0402 2.2uf
VDDSPD (3.3V)=
For Arranale only +VREF_DQ_DIMMBsupply from a external 1.5V voltage divide
circuit.
07/17/2009
Layout Note:
Place near DIMM
Layout Note:
Place near DIMM
(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4
7/28 Update connect GND directly
C 1 6 5
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
C 1 6 5
1 0 U _ 0 6 0 3 _ 6 . 3 V 6 M
1
2
R861K_0402_1%
R861K_0402_1%
1
2
R9510K_0402_5%
R9510K _0402_5%
1 2
C 1 7 0
0 .1 U _ 0 4 0 2 _1 0 V 6 K
C 1 7 0
0 .1 U _ 0 4 0 2 _1 0 V 6 K
1
2
C 1 5 8
2 .2 U _ 0 6 0 3 _ 6 . 3 V 4 Z
C 1 5 8
2 .2 U _ 0 6 0 3�