lecture 3 – logic gate level minimization = a + b c + a b c f b c l = 5

82
Source: Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active in View Show mode) Lecture 3 – Logic Gate Level Minimization Lan-Da Van (范倫達), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2007

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Page 1: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

Source Charles Kime amp Thomas Kaminskicopy 2004 Pearson Education Inc

Terms of Use(Hyperlinks are active in View Show mode)

Lecture 3 ndash Logic Gate Level Minimization

Lan-Da Van (范倫達) Ph DDepartment of Computer ScienceNational Chiao Tung University

Taiwan ROCFall 2007

2Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Outline

Circuit Optimizationbull Two-Level Optimizationbull Map Manipulationbull Multi-Level Circuit Optimization

Additional Gates and Circuitsbull Other Gate Typesbull Exclusive-OR Operator and Gatesbull High-Impedance Outputs

3Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Optimization

Goal To obtain the simplest implementation for a given functionOptimization is a more formal approach to simplification that is performed using a specific procedure or algorithmOptimization requires a cost criterion to measure the simplicity of a circuitThree distinct cost criteria will be usedbull Literal cost (L)bull Gate input cost (G)bull Gate input cost with NOTs (GN)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Literal Cost

D

Literal ndash a variable or its complementLiteral cost ndash the number of literal appearances in a Boolean expression corresponding to the logic circuit diagramExamplesbull F = BD + A C + A L = 8

bull F = BD + A C + A + AB L = 11bull F = (A + B)(A + D)(B + C + )( + + D) L = 10

bull Which solution is best (first verify the equality)

DB CB B D C

B C

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Gate Input Cost

Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations (G - inverters not counted GN - inverters counted)

For SOP and POS equations it can be found from the equation(s) by finding the sum ofbull all literal appearancesbull the number of terms excluding terms consisting only of a single literal(G)

andbull optionally the number of distinct complemented single literals (GN)

Example which solution is best bull F = BD + A C + A G = 11 GN = 14bull F = BD + A C + A + AB G = 15 GN = 19bull F = (A + )(A + D)(B + C + )( + + D) G = 14 GN = 17

DB CB B D C

B D B C

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (12)

Example 1

F = A + B C +

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

10Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

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Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

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Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

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Lecture 3

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Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

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Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Lecture 3

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Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

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Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

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Lecture 3

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Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

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Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 2: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Outline

Circuit Optimizationbull Two-Level Optimizationbull Map Manipulationbull Multi-Level Circuit Optimization

Additional Gates and Circuitsbull Other Gate Typesbull Exclusive-OR Operator and Gatesbull High-Impedance Outputs

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Optimization

Goal To obtain the simplest implementation for a given functionOptimization is a more formal approach to simplification that is performed using a specific procedure or algorithmOptimization requires a cost criterion to measure the simplicity of a circuitThree distinct cost criteria will be usedbull Literal cost (L)bull Gate input cost (G)bull Gate input cost with NOTs (GN)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Literal Cost

D

Literal ndash a variable or its complementLiteral cost ndash the number of literal appearances in a Boolean expression corresponding to the logic circuit diagramExamplesbull F = BD + A C + A L = 8

bull F = BD + A C + A + AB L = 11bull F = (A + B)(A + D)(B + C + )( + + D) L = 10

bull Which solution is best (first verify the equality)

DB CB B D C

B C

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Lecture 3

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Gate Input Cost

Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations (G - inverters not counted GN - inverters counted)

For SOP and POS equations it can be found from the equation(s) by finding the sum ofbull all literal appearancesbull the number of terms excluding terms consisting only of a single literal(G)

andbull optionally the number of distinct complemented single literals (GN)

Example which solution is best bull F = BD + A C + A G = 11 GN = 14bull F = BD + A C + A + AB G = 15 GN = 19bull F = (A + )(A + D)(B + C + )( + + D) G = 14 GN = 17

DB CB B D C

B D B C

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Lecture 3

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Cost Criteria (12)

Example 1

F = A + B C +

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs

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Lecture 3

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Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

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Lecture 3

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Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

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Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

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Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

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Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

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Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

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Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

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Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 3: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

3Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Optimization

Goal To obtain the simplest implementation for a given functionOptimization is a more formal approach to simplification that is performed using a specific procedure or algorithmOptimization requires a cost criterion to measure the simplicity of a circuitThree distinct cost criteria will be usedbull Literal cost (L)bull Gate input cost (G)bull Gate input cost with NOTs (GN)

4Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Literal Cost

D

Literal ndash a variable or its complementLiteral cost ndash the number of literal appearances in a Boolean expression corresponding to the logic circuit diagramExamplesbull F = BD + A C + A L = 8

bull F = BD + A C + A + AB L = 11bull F = (A + B)(A + D)(B + C + )( + + D) L = 10

bull Which solution is best (first verify the equality)

DB CB B D C

B C

5Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Gate Input Cost

Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations (G - inverters not counted GN - inverters counted)

For SOP and POS equations it can be found from the equation(s) by finding the sum ofbull all literal appearancesbull the number of terms excluding terms consisting only of a single literal(G)

andbull optionally the number of distinct complemented single literals (GN)

Example which solution is best bull F = BD + A C + A G = 11 GN = 14bull F = BD + A C + A + AB G = 15 GN = 19bull F = (A + )(A + D)(B + C + )( + + D) G = 14 GN = 17

DB CB B D C

B D B C

6Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (12)

Example 1

F = A + B C +

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs

7Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

8Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

9Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

10Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 4: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

4Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Literal Cost

D

Literal ndash a variable or its complementLiteral cost ndash the number of literal appearances in a Boolean expression corresponding to the logic circuit diagramExamplesbull F = BD + A C + A L = 8

bull F = BD + A C + A + AB L = 11bull F = (A + B)(A + D)(B + C + )( + + D) L = 10

bull Which solution is best (first verify the equality)

DB CB B D C

B C

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Lecture 3

Logic amp Computer Design Fundamentals

Gate Input Cost

Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations (G - inverters not counted GN - inverters counted)

For SOP and POS equations it can be found from the equation(s) by finding the sum ofbull all literal appearancesbull the number of terms excluding terms consisting only of a single literal(G)

andbull optionally the number of distinct complemented single literals (GN)

Example which solution is best bull F = BD + A C + A G = 11 GN = 14bull F = BD + A C + A + AB G = 15 GN = 19bull F = (A + )(A + D)(B + C + )( + + D) G = 14 GN = 17

DB CB B D C

B D B C

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Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (12)

Example 1

F = A + B C +

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs

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Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

8Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

9Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

10Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 5: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Gate Input Cost

Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations (G - inverters not counted GN - inverters counted)

For SOP and POS equations it can be found from the equation(s) by finding the sum ofbull all literal appearancesbull the number of terms excluding terms consisting only of a single literal(G)

andbull optionally the number of distinct complemented single literals (GN)

Example which solution is best bull F = BD + A C + A G = 11 GN = 14bull F = BD + A C + A + AB G = 15 GN = 19bull F = (A + )(A + D)(B + C + )( + + D) G = 14 GN = 17

DB CB B D C

B D B C

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Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (12)

Example 1

F = A + B C +

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs

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Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

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Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

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Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

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Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 6: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

6Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (12)

Example 1

F = A + B C +

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs

7Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

8Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

9Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

10Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 7: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Cost Criteria (22)

Example 2

F = A B C +L = 6 G = 8 GN = 11F = (A + )( + C)( + B)L = 6 G = 9 GN = 12Same function and sameliteral costBut first circuit has bettergate input count and bettergate input count with NOTsSelect the former design

B C

A

ABC

F

C B

F

ABC

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

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Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

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Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

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Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

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Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

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Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

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Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 8: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

8Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Boolean Function Optimization

Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) is to reduce the circuit costWe choose gate input costBoolean algebra and graphical techniques are tools to minimize cost criteria valuesSome important questionsbull When do we stop trying to reduce the costbull Do we know when we have a minimum cost

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits firstIntroduce a graphical technique using Karnaugh maps (K-maps for short)

9Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

10Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 9: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Karnaugh Maps (K-map)

A K-map is a collection of squaresbull Each square represents a mintermbull The collection of squares is a graphical representation of a

Boolean functionbull Adjacent squares differ in the value of one variablebull Alternative algebraic expressions for the same function are

derived by recognizing patterns of squaresThe K-map can be viewed asbull A reorganized version of the truth tablebull A topologically-warped Venn diagram as used to visualize

sets in algebra of sets

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

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Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

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Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

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Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

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Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 10: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

10Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Some Uses of K-Maps

Provide a means forbull Finding optimum or near optimum

SOP and POS standard forms andtwo-level ANDOR and ORAND circuit implementations

for functions with small numbers of variablesbull Visualizing concepts related to manipulating

Boolean expressions andbull Demonstrating concepts used by computer-

aided design programs to simplify large circuits

11Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 11: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Two Variable Maps

A 2-variable Karnaugh Mapbull Note that minterm m0 and

minterm m1 are ldquoadjacentrdquoand differ in the value of thevariable y

bull Similarly minterm m0 andminterm m2 differ in the x variable

bull Also m1 and m3 differ in the x variable as well bull Finally m2 and m3 differ in the value of the

variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

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Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

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Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

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Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

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Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

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Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 12: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

12Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map and Truth Tables

The K-Map is just a different form of the truth tableExample ndash Two variable functionbull We choose abc and d from the set 01 to implement

a particular function F(xy)Function Table K-MapInput Values(xy)

Function ValueF(xy)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 13: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

13Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example F(xy) = x

For function F(xy) the two adjacent cells containing 1rsquos can be combined using the Minimization Theorem

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)yx(F =+=

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 14: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

14Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

K-Map Function Representation

Example G(xy) = x + y

For G(xy) two pairs of adjacent cells containing 1rsquos can be combined using the Minimization Theorem

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

( ) ( ) yxyxxyyxyx)yx(G +=+++=

Duplicate xy

reduce y reduce x

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 15: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

15Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps

A three-variable K-map

Where each minterm corresponds to the product terms

Note that if the binary value for an index differs in one bit position the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx

16Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

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Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 16: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Alternative Map Labeling

Map use largely involvesbull Entering values into the map andbull Reading off product terms from the mapAlternate labelings are useful

y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

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Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

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Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 17: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

17Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Functions

By convention we represent the minterms of F by a 1 in the map and leave the minterms of blankExample

Example

Learn the locations of the 8 indices based on the variable order shown (x most significantand z least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

a

b10 2

4

3

5 671 111

c

(2345)z)yF(x mΣ=

(3467)c)bG(a mΣ=

F

F(xyz)=

a bc

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 18: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

18Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares

By combining squares we reduce number of literals in a product term reducing the literal cost thereby reducing the other two cost criteriaOn a 3-variable K-Mapbull One square represents a minterm with three variablesbull Two adjacent squares represent a product term with two

variables (apply identities 714 one time)bull Four ldquoadjacentrdquo terms represent a product term with

one variable (apply identities 714 three times)bull Eight ldquoadjacentrdquo terms is the function of all ones (no

variables) = 1 (apply identities 714 seven times)

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

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Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

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Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

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Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

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Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

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Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

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Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

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3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

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Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 19: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

19Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Combining Squares Example

Example Let

Applying the Minimization Theorem three times

Thus the four terms that form a 2 times 2 square correspond to the term y

y=zyyz +=

zyxzyxzyxzyx)zyx(F +++=

x

y10 2

4

3

5 671 111

z

m(2367)F Σ=0

100 01 11 10

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

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Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

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Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

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Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

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Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

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Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

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Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

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Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

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Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

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Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

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Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

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Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

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Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

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Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

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Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

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Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

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Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 20: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

20Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (14)

Topological warps of 3-variable K-maps that show all adjacencies

Venn Diagram

Y Z

X

1376 5

4

2

0

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 21: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

21Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (24)

Example Shapes of 2-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ

22Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 22: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Maps (34)

Example Shapes of 4-cell Rectangles

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

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Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 23: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

23Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Three Variable Maps (44)

z)yF(x =

y

11

x

z

1 1

1

z

z

yx+

yx

K-Maps can be used to simplify Boolean functions bysystematic methods Terms are selected to cover theldquo1srdquoin the map

Example Simplify )(12357z)yF(x mΣ=

24Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 24: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Three-Variable Map Simplification

Use a K-map to find an optimum SOP equation for 7)(01246 Z)YF(X mΣ=

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z

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Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

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Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

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Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

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Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

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Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

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Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

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Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

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Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

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Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

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Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

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Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

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Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

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Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

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Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

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Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

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Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

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Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

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Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

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Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

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Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

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Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

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Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

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Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

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Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

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NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

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XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

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XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

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Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 25: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

25Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Maps

Map and location of minterms

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10

26Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 26: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four Variable Terms

Four variable maps can have rectangles corresponding to

bull A single 1 = 4 variables (ie Minterm)bull Two 1s = 3 variablesbull Four 1s = 2 variablesbull Eight 1s = 1 variablebull Sixteen 1s = zero variables (ieConstant 1)

27Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 27: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

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Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

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Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

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Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

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Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

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Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

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Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 28: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

28Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Maps

Example Shapes of Rectangles

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 29: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

29Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Four-Variable Map Simplification (12)

)810131524567(0Z)YXF(W mΣ=

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ

30Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

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Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 30: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

31415)(345791Z)YXF(W mΣ=

Four-Variable Map Simplification (22)

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

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Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

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Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

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Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 31: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

31Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Systematic Simplification

Implicant ndash a product term of which if the function has the value 1 for all mintermsA Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 ndash remove any literal rarr not a implicantA prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more mintermsPrime Implicants and Essential Prime Implicants can be determined by inspection of a K-MapA set of prime implicants covers all minterms if for each minterm of the function at least one prime implicant in the set of prime implicants includes the minterm

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 32: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

32Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example of Prime Implicants

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

38Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 33: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

33Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicant Practice

Find all prime implicants for

A

B

C

D

1

131415)101112(02389D)CBF(A mΣ=

1 1

11 1 1

11 1 1A

BCBD

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 34: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

34Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Another Example

Find all prime implicants for

bull Hint There are seven prime implicants

A

B

C

D

1 1 1

1 1

11 1 1

15)121314(02347D)CBG(A mΣ=

35Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 35: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Lecture 3

Logic amp Computer Design Fundamentals

Five Variable or More K-Maps

For five variable problems we use two adjacent K-maps It becomes harder to visualize adjacent minterms for selecting PIs You can extend the problem to six variables by using four K-Maps

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y

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Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 36: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

36Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Prime Implicants Selection Rule

Find all prime implicantsInclude all essential prime implicants in the solutionSelect a minimum cost set of non-essential prime implicants to cover all minterms not yet coveredbull Minimize the overlap among prime implicants as much

as possiblebull Make sure that each prime implicant selected includes

at least one minterm not included in any other prime implicant selected ndash avoid redundancy

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 37: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

37Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example

Simplify F(A B C D) given on the K-map

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

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Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 38: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

Concept mi = Mi

How to derive a POS using SOP derivationbull Derive F = mi+mj hellip+mnharr F = Mi sdot Mj hellip sdot Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)

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Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

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Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 39: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

39Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POSF =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

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Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 40: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

40Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Dont Cares in K-Maps

Sometimes a function table or map contains entries for which it is knownbull the input values for the minterm will never occur orbull The output value for the minterm is not used

In these cases the output value need not be definedbull Incompletely specified functions ndash functions that have unspecified

outputs (it can be 1 or 0)for some input combinationsInstead the output value is defined as a ldquodont carerdquoBy placing ldquodont caresrdquo ( an ldquoxrdquo entry) in the function table or map the cost of the logic circuit may be loweredExample 1 A logic function having the binary codes for the BCD digits as its inputs Only the codes for 0 through 9 are used The six codes 1010 through 1111 never occur so the output values for these codes are ldquoxrdquo to represent ldquodonrsquot caresrdquo

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 41: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

41Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example BCD ldquo5 or Morerdquo

The map below gives a function F1(wxyz) which is defined as 5 or more over BCD inputs With the dont cares used for the 6 non-BCD combinations

F1(wxyz) = wxz +w xy +wxy G =12Consider the input characteristics

F2(wxyz) = w + x z + x y G = 7This is much lower in cost than F2 where the ldquodont caresrdquo were treated as 0sz

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 42: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

42Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Donrsquot Care ndash Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

BA

C

D

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

POSSOP

F = D + AC

F = D ( A+C)F = CD + AB

F = CD + AD

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 43: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

43Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Selection Rule Example with Dont Cares

Simplify F(A B C D) given on the K-map Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 44: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

44Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Product of Sums

Find the optimum POS solution

bull Hint Use and complement it to get the result

131415)(391112D)CBF(A m +Σ=(146) dΣ

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 45: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

45Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multiple-Level Optimization

Multiple-level circuits - circuits that are not two-level (with or without input andor output inverters)Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuitsMultiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

F = ABC + ABD + ABCD F = AB(C + D + CD)

2 levels 4 gates 13 gate inputs 3 levels 3 gates 8 gate inputs

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

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Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 46: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

46Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformations

Factoring - finding a factored form from SOP or POS expressionDecomposition - expression of a function as a set of new functionsSubstitution of G into F - expression function F as a function of G and some or all of its original variablesElimination - Inverse of substitutionExtraction - decomposition applied to multiple functions simultaneously

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 47: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

47Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (16)

Algebraic FactoringF = + B + ABC + AC G = 16bull Factoring

F = ( + B ) + A (BC + C ) G = 18bull Factoring again

F = ( B + ) + AC (B + ) G = 12bull Factoring again

F = ( + AC) (B + ) G = 10

DCAA

A

A

C

C

D

CC D

D

D

A C D D

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 48: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

48Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (26)

Decompositionbull The terms B + and + AC can be defined as

new functions E and H respectively decomposing F

F = E H E = B + and H = + AC G = 10This series of transformations has reduced G from 16 to 10 a substantial savings The resulting circuit has three levels plus input inverters

ACD

D AC

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 49: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

49Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (36)

Substitution of E into Fbull Returning to F just before the final factoring step

F = ( B + ) + AC (B + ) G = 12bull Defining E = B + and substituting in F

F = E + ACE G = 10bull This substitution has resulted in the same cost as the

decomposition

A C DD

A CD

F = ACD + ABC + ABC + ACD F = ACE + ACE E =B + D

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 50: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

50Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (46)

Eliminationbull Beginning with a new set of functions

X = B + CY = A + BZ = X + C Y G = 10 bull Eliminating X and Y from Z

Z = (B + C) + C (A + B) G = 10bull ldquoFlatteningrdquo (Converting to SOP expression)

Z = B + C + AC + BC G = 12bull This has increased the cost but has provided an new

SOP expression for two-level optimization

A

A

A

A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 51: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

51Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (56)

Two-level Optimizationbull The result of 2-level optimization is

Z = B + C G = 4This example illustrates thatbull Optimization can begin with any set of equations not

just with minterms or a truth tablebull Increasing gate input count G temporarily during a

series of transformations can result in a final solution with a smaller G

A

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 52: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

52Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transformation Examples (66)

Extractionbull Beginning with two functions

E = + BD H = C + BCD G = 16 bull Finding a common factor and defining it as a function

F = + BDbull We perform extraction by expressing E and H as the

three functions

F = + BD E = F H = CF G = 10bull The reduced cost G results from the sharing of logic

between the two output functions

BA A

A

B

B

DD

D

BD

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 53: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

53Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this setbull AND OR NOT ndash a universal set

Universal gate - a gate type that can implement any Boolean functionbull NAND NORhellip

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

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Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 54: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

54Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Other Gate Types

Whybull Implementation feasibility and low costbull Power in implementing Boolean functionsbull Convenient conceptual representation

Gate classificationsbull Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s)

bull Complex gate - a gate that requires more than one primitive operation type for its description (XOR XNOR)

Primitive gates will be covered first

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 55: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

55Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Buffer

A buffer is a gate with the function F = X

In terms of Boolean function a buffer is the same as a connectionSo why use itbull A buffer is an electronic amplifier used to

improve circuit voltage levels and increase the speed of circuit operation

X F

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 56: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

56Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gate (13)

The basic NAND gate has the following symbol illustrated for three inputsbull AND-Invert (NAND)

NAND represents NOT AND i e the AND function with a NOT applied The symbol shown is an AND-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F =

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 57: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

57Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (23)

Applying DeMorgans Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR since inputs are inverted and then ORed together AND-Invert and Invert-OR both represent the NAND gate Having both makes visualization of circuit function easierA NAND gate with one input degenerates to an inverter

XYZ

ZYX)ZYX(F ++=

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 58: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

58Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NAND Gates (33)

The NAND gate is the natural implementation for the simplest and fastest electronic circuitsThe NAND gate is a universal gate as shown in the following NAND usually does not have an operation symbol defined sincebull the NAND operation is not associative andbull we have difficulty dealing with non-associative mathematics

x xy xy xyxy=x+y

x

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 59: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

59Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Two-level NAND Gates (12)

A function of sum-of-products form is easy to convert to NAND gatesbull F = AB + CD rarr F = AB + CD rarr F = AB sdotCD

AB

CD

F

AB

CD

F

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 60: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

60Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Multilevel NAND Gates (22)

The procedures to convert to multilevel NAND gates circuitsbull Convert all AND gates to NAND gates with AND-

NOT graphic symbolsbull Convert all OR gates to NAND gates with NOT-OR

graphic symbolsbull Complement the input literal if the signal has single

bubble and insert a NOT gate for the output signal with single bubble

AB

CD

BC

B

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 61: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

61Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (14)

The basic NOR gate has the following symbol illustrated for three inputsbull OR-Invert (NOR)

NOR represents NOT-OR i e the OR function with a NOT applied The symbol shown is an OR-Invert The small circle (ldquobubblerdquo) represents the invert function

XYZ

ZYX)ZYX(F ++=

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 62: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

62Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (24)

Applying DeMorgans Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND since inputs are inverted and then ANDed together OR-Invert and Invert-AND both represent the NOR gate Having both makes visualization of circuit function easierA NOR gate with one input degenerates to an inverter

XYZ

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 63: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

63Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (34)

The NOR gate is another natural implementation for the simplest and fastest electronic circuitsThe NOR gate is a universal gateNOR usually does not have a defined operation symbol sincebull the NOR operation is not associative andbull we have difficulty dealing with non-associative

mathematics

x x xy x+y xyx+y=xsdoty

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 64: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

64Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

NOR Gate (44)

Example

A

B

D

B

A

CEE

A B

B A

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 65: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

65Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (14)

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuitsThe XOR function may bebull implemented directly as an electronic circuit (truly a gate) orbull implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR functionBy our definition XOR and XNOR gates are complex

gates

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 66: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

66Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (24)

Uses for the XOR and XNORs gate includebull Adderssubtractorsmultipliersbull Countersincrementersdecrementersbull Parity generatorscheckers

Definitionsbull The XOR function is bull The eXclusive NOR (XNOR) function otherwise

known as equivalence is

Strictly speaking XOR and XNOR gates do no exist for more than two inputs Instead they are replaced by odd and even functions

YXYXYX +=oplus

YXYXYX +=oplus

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 67: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

67Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (34)

Operator Rules XOR XNOR

The XOR function meansX OR Y but NOT BOTH

Why is the XNOR function also known as the equivalence function denoted by the operator equiv ltXNOR (X X)=1gt

X Y

0 0 10 1 01 0 01 1 1

or XequivY(XoplusY)X Y XoplusY

0 0 00 1 11 0 11 1 0

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 68: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

68Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XORXNOR (44)

The XOR function can be extended to 3 or more variables For more than 2 variables it is called an odd function or modulo 2 sum (Mod 2 sum) not an XOR

The complement of the odd function is the even functionThe XOR identities

== X1XX0X oplusoplus1XX0XX =oplus=oplus

XYYX oplus=oplusZYX)ZY(XZ)YX( oplusoplus=oplusoplus=oplusoplus

+++=oplusoplus ZYXZYXZYXZYXZYX

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 69: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

69Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Symbols For XOR and XNOR

XOR symbol

XNOR symbol

Symbols exist only for two inputs

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 70: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

70Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

XOR Implementations

The simple SOP implementation uses the following structure

A NAND only implementation is

X

Y

X Y

X

Y

X Yxy = xy + xx

= x(x+y)= xxy

yx = yx + yy= y(x+y)= yxy

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 71: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

71Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Odd and Even Functions

The odd and even functions on a K-map form ldquocheckerboardrdquo patternsThe 1s of an odd function correspond to minterms having an index with an odd number of 1sThe 1s of an even function correspond to minterms having an index with an even number of 1sImplementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult so we use ldquotreesrdquo made up of bull 2-input XOR or XNORs bull 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 72: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

72Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Odd Function Implementation

Design a 4-input odd function F = X Y Zwith 2-input XOR gatesFactoring F = (X Y) ZThe circuit

+ +

+ +

XY

Z

oplus W

WF

oplusW

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 73: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

73Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Example Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gatesFactoring F = (W X) (Y Z)The circuit

+ + +

+ + +

WX

YF

Z

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 74: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

74Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (12)

Logic gates introduced thus farbull have 1 and 0 output values bull cannot have their outputs connected together andbull transmit signals on connections in only one direction

Three-state logic adds a third logic value Hi-Impedance (Hi-Z) giving three states 0 1 and Hi-Z on the outputs The presence of a Hi-Z state makes a gate output as described above behave quite differentlybull ldquo1 and 0rdquo become ldquo1 0 and Hi-Zrdquobull ldquocannotrdquo becomes ldquocanrdquo andbull ldquoonly onerdquo becomes ldquotwordquo

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 75: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

75Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Hi-Impedance Outputs (22)

What is a Hi-Z valuebull The Hi-Z value behaves as an open circuitbull This means that looking back into the circuit the output

appears to be disconnectedbull It is as if a switch between the internal circuitry and the

output has been openedHi-Z may appear on the output of any gate but we restrict gates tobull a 3-state buffer orbull a transmission gateeach of which has one data input and one control input

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 76: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

76Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Buffer

For the symbol and truth table IN is the data input and EN the control inputFor EN = 0 regardless of the value on IN (denoted by X) the output value is Hi-ZFor EN = 1 the output value follows the input valueVariations bull Data input IN can be inverted bull Control input EN can be invertedby addition of ldquobubblesrdquo to signals

Symbol

IN

EN

OUT

Truth TableEN IN OUT0 X Hi-Z1 0 01 1 1

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 77: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

77Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Resolving 3-State Values on a Connection

Connection of two 3-state buffer outputs B1 and B0 to a wire OUTAssumption Buffer data inputs can take on any combination of values 0 and 1Resulting Rule At least one buffer output value must be Hi-Z WhyHow many valid buffer output combinations existWhat is the rule for n 3-state buffers connected to wire OUTHow many valid buffer output combinations exist

Resolution Table

B1 B0 OUT

0 Hi-Z 0

1 Hi-Z 1

Hi-Z 0 0

Hi-Z 1 1

Hi-Z Hi-Z Hi-Z

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 78: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

78Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

3-State Logic Circuit

Data Selection Function If s = 0 OL = IN0 else OL = IN1Performing data selection with 3-state buffersSince EN0 = S and EN1 = S one of the two buffer outputs is always Hi-Z plus the last row of the table never occurs

IN0

IN1

EN0

EN1

SOL

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 79: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

79Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (12)

The transmission gate is one of the designs for an electronic switch for connecting and disconnecting two points in a circuit

(a)

X YTG

C

C

(c)C = 0 and C = 1

X Y

(b)

X YC = 1 and C = 0

(d)

X

C

TG Y

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 80: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

80Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Transmission Gates (22)

In many cases X can be regarded as a data input and Y as an output C and C with complementary values applied is a control input With these definitions the transmission gate provides a 3-state output bull C = 1 Y = X (X = 0 or 1)bull C = 0 Y = Hi-Z

Care must be taken when using the TG in design however since X and Y as input and output are interchangeable and signals can pass in both directions

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 81: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

81Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Circuit Example Using TG

Exclusive OR F = A C

The basis for the function implementation is TG-controlled paths to the output

(b)

A

00

1

1

C

01

0

1

TG1

No pathPath

No path

Path

TG0

PathNo path

Path

No path

F

01

1

0

(a)

C

A

F

TG0

TG1

+

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use
Page 82: Lecture 3 – Logic Gate Level Minimization = a + b c + a b c f b c l = 5

82Logic amp Computer Design Fundamentalscopy 2004 Pearson Education Inc

Modified by Lan-Da Van CSNCTU Logic amp Computer Design Fundamentals

Lecture 3

Logic amp Computer Design Fundamentals

Terms of Use

copy 2004 by Pearson EducationInc All rights reservedThe following terms of use apply in addition to the standard Pearson Education Legal NoticePermission is given to incorporate these materials into classroom presentations and handouts only to instructors adopting Logic and Computer Design Fundamentals as the course text Permission is granted to the instructors adopting the book to post these materials on a protected website or protected ftp site in original or modified form All other website or ftp postings including those offering the materials for a fee are prohibited You may not remove or in any way alter this Terms of Use notice or any trademark copyright or other proprietary notice including the copyright watermark on each slideReturn to Title Page

  • Outline
  • Circuit Optimization
  • Literal Cost
  • Gate Input Cost
  • Cost Criteria (12)
  • Cost Criteria (22)
  • Boolean Function Optimization
  • Karnaugh Maps (K-map)
  • Some Uses of K-Maps
  • Two Variable Maps
  • K-Map and Truth Tables
  • K-Map Function Representation
  • K-Map Function Representation
  • Three Variable Maps
  • Alternative Map Labeling
  • Example Functions
  • Combining Squares
  • Combining Squares Example
  • Three-Variable Maps (14)
  • Three-Variable Maps (24)
  • Three-Variable Maps (34)
  • Three Variable Maps (44)
  • Three-Variable Map Simplification
  • Four Variable Maps
  • Four Variable Terms
  • Four-Variable Maps
  • Four-Variable Maps
  • Four-Variable Map Simplification (12)
  • Four-Variable Map Simplification (22)
  • Systematic Simplification
  • Example of Prime Implicants
  • Prime Implicant Practice
  • Another Example
  • Five Variable or More K-Maps
  • Prime Implicants Selection Rule
  • Selection Rule Example
  • Product-of-Sums Simplification
  • Product-of-Sums Simplification
  • Dont Cares in K-Maps
  • Example BCD ldquo5 or Morerdquo
  • Donrsquot Care ndash Another Example
  • Selection Rule Example with Dont Cares
  • Example Product of Sums
  • Multiple-Level Optimization
  • Transformations
  • Transformation Examples (16)
  • Transformation Examples (26)
  • Transformation Examples (36)
  • Transformation Examples (46)
  • Transformation Examples (56)
  • Transformation Examples (66)
  • Universal
  • Other Gate Types
  • Buffer
  • NAND Gate (13)
  • NAND Gates (23)
  • NAND Gates (33)
  • Two-level NAND Gates (12)
  • Multilevel NAND Gates (22)
  • NOR Gate (14)
  • NOR Gate (24)
  • NOR Gate (34)
  • NOR Gate (44)
  • XORXNOR (14)
  • XORXNOR (24)
  • XORXNOR (34)
  • XORXNOR (44)
  • Symbols For XOR and XNOR
  • XOR Implementations
  • Odd and Even Functions
  • Example Odd Function Implementation
  • Example Even Function Implementation
  • Hi-Impedance Outputs (12)
  • Hi-Impedance Outputs (22)
  • 3-State Buffer
  • Resolving 3-State Values on a Connection
  • 3-State Logic Circuit
  • Transmission Gates (12)
  • Transmission Gates (22)
  • Circuit Example Using TG
  • Terms of Use