lecture 3. combinational logic 1 prof. taeweon suh computer science education korea university 2010...
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Lecture 3. Combinational Logic 1
Prof. Taeweon SuhComputer Science Education
Korea University
2010 R&E Computer System Education & Research
Korea Univ
Introduction
• A logic circuit is composed of Inputs Outputs Functional specification
• Relationship between inputs and outputs
Timing specification• Delay from inputs to outputs
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inputs outputsfunctional spec
timing spec
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Circuits
• Nodes Inputs: A, B, C Outputs: Y, Z Internal: n1
• Circuit elements E1, E2, E3
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A E1
E2
E3B
C
n1
Y
Z
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Types of Logic Circuits
• Combinational Logic Outputs are determined by current values of inputs Thus, it is memoryless
• Sequential Logic Outputs are determined by previous and current values
of inputs Thus, it has memory
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inputs outputsfunctional spec
timing spec
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Rules of Combinational Composition
• A circuit is combinational if Every node of the circuit is either designated as an
input to the circuit or connects to exactly one output terminal of a circuit element
The circuit contains no cyclic paths• Every path through the circuit visits each circuit node at
most once Every circuit element is itself combinational
• Select combinational logic?
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Boolean Equations
• The functional specification of a combination logic is usually expressed as a truth table or a Boolean equation Truth table is in a tabular form Boolean equation is in a algebraic form
• Example: S = F(A, B, Cin)
Cout = F(A, B, Cin)
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Truth Table
Boolean equation
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Terminology
• The complement of a variable A is A A variable or its complement is called literal
• AND of one or more literals is called a product or implicant Example: AB, ABC, B
• OR of one or more literals is called a sum Example: A + B
• Order of operations NOT has the highest precedence, followed by AND, then
OR• Example: Y = A + BC
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Minterms
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• A minterm is a product (AND) of literals involving all of the inputs to the function
• Each row in a truth table has a minterm that is true for that row (and only that row)
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Sum-of-Products (SOP) Form
• The function is formed by ORing the minterms for which the output is true Thus, a sum (OR) of products (AND terms)
• All Boolean equations can be written in SOP form
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A B Y0 00 11 01 1
0101
minterm
A BA BA B
A B
Y = F(A, B) = AB + AB
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Maxterms
• A maxterm is a sum (OR) of literals involving all of the inputs to the function
• Each row in a truth table has a maxterm that is false for that row (and only that row)
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Product-of-Sums (POS) Form
• The function is formed by ANDing the maxterms for which the output is FALSE Thus, a product (AND) of sums (OR terms)
• All Boolean equations can be written in POS form
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Y = F(A, B) = (A + B)(A + B)
A + BA B Y
0 00 11 01 1
0101
maxterm
A + BA + BA + B
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Boolean Equation Example
• You are going to the cafeteria for lunch You won’t eat lunch (E: eat)
• If it’s not open (O: open)• If they only serve corndogs (C: corndogs)
• Write a truth table and boolean equations (in SOP and POS) for determining if you will eat lunch (E)
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O C E0 00 11 01 1
0010
minterm
A BA BA B
A B
A + BO C E
0 00 11 01 1
0010
maxterm
A + BA + BA + B
1. SOP (sum-of-products)
2. POS (product-of-sums)
E = OC
E = (O + C)(O + C)(O + C)
O C E
0 00 11 01 1
0010
0010
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When to Use SOP and POS?
• SOP produces the shortest equations when the output is true on only a few rows of a truth table
• POS is simpler when the output is false on only a few rows of a truth table
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Boolean Algebra
• We just learned how to write a boolean equation given a truth table But, that expression does not necessarily lead to
the simplest set of logic gates
• One way to simplify boolean equations is to use boolean algebra Set of axioms and theorems It is like regular algebra, but in some cases simpler
because variables can have only two values (1 or 0)
Axioms and theorems obey the principles of duality:
• ANDs and ORs interchanged, 0’s and 1’s interchanged
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Boolean Axioms
• Axioms are not provable
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Boolean Theorems of One Variable
• The prime (’) symbol denotes the dual of a statement
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Boolean Theorems of One Variable
• T1: Identity Theorem B 1 = B B + 0 = B
• T2: Null Element Theorem B 0 = 0 B + 1 = 1
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1 =
=
B
0B
B
B
0 =
=
B
1B
1
0
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Boolean Theorems of One Variable
• Idempotency Theorem B B = B B + B = B
• T4: Identity Theorem B = B
• T5: Complement Theorem B B = 0 B + B = 1
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B =
=
B
BB
B
B
= BB
B =
=
B
BB
1
0
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Boolean Theorems of Several Variables
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Super-important!
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Proof of Consensus Theorem
• Prove the consensus theorem
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Simplifying Boolean Expressions: Example 1
• Y = AB + AB = B (A + A) T8 = B (1) T5’ = B T1
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Simplifying Boolean Expressions: Example 2
• Y = A (AB + ABC) = A (AB (1 + C)) T8 = A (AB (1)) T2’ = A (AB) T1
= (AA)B T7 = AB T3
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DeMorgan’s Theorem
• Powerful theorem in digital design
Y = AB = A + B
Y = A + B = A B
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AB
Y
AB Y
AB
Y
AB Y
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Bubble Pushing
• Pushing bubbles backward (from the output) or forward (from the inputs) changes the body of the gate from AND to OR or vice versa
• Pushing a bubble from the output back to the inputs puts bubbles on all gate inputs
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AB
YAB
Y
AB
YAB
Y
• Pushing bubbles on all gate inputs forward toward the output puts a bubble on the output and changes the gate body
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Bubble Pushing
• What is the Boolean expression for this circuit?
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AB
YCD
AB
YCD
Y = AB + CD
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Bubble Pushing Rules
• Begin at the output of the circuit and work toward the inputs
• Push any bubbles on the final output back toward the inputs
• Working backward, draw each gate in a form so that bubbles cancel
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AB
C
D
Y
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From Logic to Gates
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• Schematic A diagram of a digital circuit showing the elements
and the wires that connect them together Example: Y = ABC + ABC + ABC
BA C
Y
minterm: ABC
minterm: ABC
minterm: ABC
A B C
Any Boolean equation in the SOP form can be drawn like above
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Circuit Schematic Rules
• Inputs are on the left (or top) side of a schematic• Outputs are on the right (or bottom) side of a
schematic• Whenever possible, gates should flow from left to right• Straight wires are better to use than wires with
multiple corners
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BA C
Y
minterm: ABC
minterm: ABC
minterm: ABC
A B C
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Circuit Schematic Rules (cont.)
• Wires always connect at a T junction• A dot where wires cross indicates a connection
between the wires• Wires crossing without a dot make no connection
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wires connectat a T junction
wires connectat a dot
wires crossingwithout a dot do
not connect
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Multiple Output Circuits
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0
A1 A0
0 00 11 01 1
0
00
Y3 Y2 Y1 Y0
0000
0011
0100
A3 A2
0 00 00 00 0
0 0 0 1 0 00 10 11 01 10 0
0 10 10 11 0
0 11 01 01 10 00 1
1 01 01 11 1
1 01 11 11 1
0001
1110
0000
0000
1 0 0 01111
0000
0000
0000
1 0 0 01 0 0 0
A0
A1
PRIORITYCiIRCUIT
A2
A3
Y0
Y1
Y2
Y3
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Priority Circuit Logic
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A1 A0
0 00 11 01 1
0000
Y3 Y2 Y1 Y0
0000
0011
0100
A3 A2
0 00 00 00 0
0 0 0 1 0 00 10 11 01 10 0
0 10 10 11 0
0 11 01 01 10 00 1
1 01 01 11 1
1 01 11 11 1
0001
1110
0000
0000
1 0 0 01111
0000
0000
0000
1 0 0 01 0 0 0
A3A2A1A0Y3
Y2
Y1
Y0
• Probably you want to write boolean equations for Y3, Y2, Y1, Y0 in terms of SOP or POS and minimize the logic
• But in this case it is not that difficult to come up with simplified boolean equations by inspection
Y3 = A3
Y2 = A3 A2
Y1 = A3 A2 A1
Y0 = A3 A2 A1 A0
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Don’t Cares (X)
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A1 A0
0 00 11 01 1
0000
Y3 Y2 Y1 Y0
0000
0011
0100
A3 A2
0 00 00 00 0
0 0 0 1 0 00 10 11 01 10 0
0 10 10 11 0
0 11 01 01 10 00 1
1 01 01 11 1
1 01 11 11 1
0001
1110
0000
0000
1 0 0 01111
0000
0000
0000
1 0 0 01 0 0 0
A1 A0
0 00 11 XX X
0000
Y3 Y2 Y1 Y0
0001
0010
0100
A3 A2
0 00 00 00 1
X X 1 0 0 01 X
Y3 = A3
Y2 = A3 A2
Y1 = A3 A2 A1
Y0 = A3 A2 A1 A0
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Contention: X
• Contention: circuit tries to drive the output to 1 and 0 So, you should not design a digital logic creating a contention!
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A = 1
Y = X
B = 0
Note• In truth table, the symbol “X” denotes “don’t care”• In circuit, the same symbol “X” denotes “unknown or illegal
value”
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Floating: Z
• Output is disconnected from the input if not enabled We say output is floating, high impedance, open, or high Z
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E A Y0 0 Z0 1 Z1 0 01 1 1
A
E
Y
Tristate Buffer
An implementation Example
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Where Is Tristate Buffer Used for?
• Tristate buffer is used when designing hardware components sharing a communication medium called “shared bus” Many hardware components can be attached on a shared bus Only one component is allowed to drive the bus at a time
• The other components put their outputs to the floating
• What happen if you don’t use the tristate buffer on shared bus?
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Hardware Device 0
Hardware Device 1
Hardware Device 2
Hardware Device 3
Hardware Device 4
Hardware Device 5
shared bus