lecture 15
DESCRIPTION
Lecture 15. OUTLINE The MOS Capacitor Energy band diagrams Reading : Pierret 16.1-16.2, 18.1; Hu 5.1. MOS Capacitor Structure. MOS capacitor (cross-sectional view). Most MOS devices today employ: d egenerately doped polycrystalline Si (“poly-Si”) as the “metallic” gate-electrode material - PowerPoint PPT PresentationTRANSCRIPT
Lecture 15
OUTLINE• The MOS Capacitor
– Energy band diagrams
Reading: Pierret 16.1-16.2, 18.1; Hu 5.1
Semiconductor
MOS Capacitor Structure
• Most MOS devices today employ:o degenerately doped polycrystalline
Si (“poly-Si”) as the “metallic” gate-electrode material
n+-type for “n-channel” transistors p+-type, for “p-channel” transistors
o SiO2 as the gate dielectric band gap = 9 eV r,SiO2 = 3.9
o Si as the semiconductor material p-type, for “n-channel” transistors n-type, for “p-channel” transistors
MOS capacitor (cross-sectional view)
EE130/230A Fall 2013 Lecture 15, Slide 2
GATE
+_
xo
VG
Bulk Semiconductor Potential, F
• p-type Si:
• n-type Si:
FiF EbulkEq )(
0)/ln( iAF nNq
kT
0)/ln( iDF nNq
kT
Ec
EF Ev
EiqF
EcEF
Ev
Ei
|qF|
Lecture 15, Slide 3EE130/230A Fall 2013
Special Case: Equal Work FunctionsM = S
Lecture 15, Slide 4EE130/230A Fall 2013
R. F. Pierret, Semiconductor Device Fundamentals, Fig. 16.2
General Case: Different Work Functions
E0
E0
E0 E0
Lecture 15, Slide 5EE130/230A Fall 2013
R. F. Pierret, Semiconductor Device Fundamentals, Fig. 18.1
MOS Band Diagrams: Guidelines• Fermi level EF is flat (constant with x) within the semiconductor
– Since no current flows in the x direction, we can assume that equilibrium conditions prevail
• Band bending is linear within the oxide– No charge in the oxide => dE/dx = 0 so E is constant
=> dEc/dx is constant
• From Gauss’ Law, we know that the electric field strength in the Si at the surface, ESi, is related to the electric field strength in the oxide, Eox:
) (
3 3 ε
ε
surfacetheatSi
c
oxide
cSiSi
ox
Siox dx
dE
dx
dEso E E E
Lecture 15, Slide 6EE130/230A Fall 2013
MOS Band Diagram Guidelines (cont’d)• The barrier height for conduction-band electron flow from the
Si into SiO2 is 3.1 eV– This is equal to the electron-affinity difference (Si and SiO2)
• The barrier height for valence-band hole flow from the Si into SiO2 is 4.8 eV
• The vertical distance between the Fermi level in the metal, EFM, and the Fermi level in the Si, EFS, is equal to the applied gate voltage (assuming that the Si bulk is grounded):
FMFSG EEqV
Lecture 15, Slide 7EE130/230A Fall 2013
MOS Equilibrium Band Diagram
SiO2
p-type SiEFSEC=EFM
EC
EV
EV
metal oxide semiconductor
Lecture 15, Slide 8
n+ poly-Si
EE130/230A Fall 2013
• The flat-band voltage, VFB, is the applied voltage which results in no band-bending within the semiconductor.– Ideally, this is equal to the work-function difference between the gate
and the bulk of the semiconductor: qVFB = M S
Flat-Band Condition
Lecture 15, Slide 9EE130/230A Fall 2013
Voltage Drops in the MOS System• In general, where
qVFB = MS = M – S
Vox is the voltage dropped across the oxide(Vox = total amount of band bending in the oxide)
sis the voltage dropped in the silicon (total amount of band bending in the silicon)
soxFBG VVV
)()( surfaceEbulkEq iiS
Lecture 15, Slide 10
• For example: When VG = VFB, Vox = s = 0, i.e. there is no band bending
EE130/230A Fall 2013
MOS Operating Regions (n-type Si)
• Inversion– VG < VT
Surface inverted to p-type
• Accumulation– VG > VFB
Electrons accumulated
at Si surface
• Depletion– VG < VFB
Electrons depleted from Si surface
Decrease VG toward more negative values the gate electron energy increases relative to that in the Si
Lecture 15, Slide 11
decrease VG decrease VG
EE130/230A Fall 2013 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 16.5
VG = VFB VG < VFB VT > VG > VFB
Lecture 15, Slide 12
increase VG increase VG
MOS Operating Regions (p-type Si)
EE130/230A Fall 2013 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 16.6