lecture 13 - university of california, berkeleyee105/sp08/lectures/lecture13.pdf · ee105 spring...
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![Page 1: Lecture 13 - University of California, Berkeleyee105/sp08/lectures/lecture13.pdf · EE105 Spring 2008 Lecture 13, Slide 15 Prof. Wu, UC Berkeley Miller’s Theorem • If A v is the](https://reader030.vdocuments.us/reader030/viewer/2022040215/5ed8348f0fa3e705ec0e07e5/html5/thumbnails/1.jpg)
EE105 Spring 2008 Lecture 13, Slide 1 Prof. Wu, UC Berkeley
Lecture 13
OUTLINE
• Frequency ResponseGeneral considerationsHigh-frequency BJT modelMiller’s TheoremFrequency response of CE stage
Reading: Chapter 11.1-11.3
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EE105 Spring 2008 Lecture 13, Slide 2 Prof. Wu, UC Berkeley
Review: Sinusoidal Analysis
• Any voltage or current in a linear circuit with a sinusoidal source is a sinusoid of the same frequency (ω).– We only need to keep track of the amplitude and phase, when
determining the response of a linear circuit to a sinusoidal source.
• Any time‐varying signal can be expressed as a sum of sinusoids of various frequencies (and phases).
Applying the principle of superposition:– The current or voltage response in a linear circuit due to a time‐varying input signal can be calculated as the sum of the sinusoidal responses for each sinusoidal component of the input signal.
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EE105 Spring 2008 Lecture 13, Slide 3 Prof. Wu, UC Berkeley
High Frequency “Roll‐Off” in Av
• Typically, an amplifier is designed to work over a limited range of frequencies.– At “high” frequencies, the gain of an amplifier decreases.
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EE105 Spring 2008 Lecture 13, Slide 4 Prof. Wu, UC Berkeley
Av Roll‐Off due to CL • A capacitive load (CL) causes the gain to decrease at high frequencies.– The impedance of CL decreases at high frequencies, so that it shunts some of the output current to ground.
⎟⎟⎠
⎞⎜⎜⎝
⎛−=
LCmv Cj
RgAω1||
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EE105 Spring 2008 Lecture 13, Slide 5 Prof. Wu, UC Berkeley
Frequency Response of the CE Stage
• At low frequency, the capacitor is effectively an open circuit, and Av vs. ω is flat. At high frequencies, the impedance of the capacitor decreases and hence the gain decreases. The “breakpoint” frequency is 1/(RCCL).
2 2 2
1
1
1
1
CL
v m
CL
m C
C L
m Cv
C L
Rj CA g
Rj C
g Rj R Cg RA
R C
ω
ω
ω
ω
= −+
−=
+
=+
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EE105 Spring 2008 Lecture 13, Slide 6 Prof. Wu, UC Berkeley
Amplifier Figure of Merit (FOM)
• The gain‐bandwidth product is commonly used to benchmark amplifiers. – We wish to maximize both the gain and the bandwidth.
• Power consumption is also an important attribute.– We wish to minimize the power consumption.
( )
LCCT
CCC
LCCm
CVV
VICR
Rg
1
1
nConsumptioPower BandwidthGain
=
⎟⎟⎠
⎞⎜⎜⎝
⎛
=×
Operation at low T, low VCC, and with small CL superior FOM
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EE105 Spring 2008 Lecture 13, Slide 7 Prof. Wu, UC Berkeley
Bode Plot
• The transfer function of a circuit can be written in the general form
• Rules for generating a Bode magnitude vs. frequency plot:– As ω passes each zero frequency, the slope of |H(jω)| increasesby 20dB/dec.
– As ω passes each pole frequency, the slope of |H(jω)| decreases by 20dB/dec.
L
L
⎟⎟⎠
⎞⎜⎜⎝
⎛+⎟
⎟⎠
⎞⎜⎜⎝
⎛+
⎟⎟⎠
⎞⎜⎜⎝
⎛+⎟⎟
⎠
⎞⎜⎜⎝
⎛+
=
21
210
11
11)(
pp
zz
jj
jj
AjH
ωω
ωω
ωω
ωω
ωA0 is the low-frequency gainωzj are “zero” frequenciesωpj are “pole” frequencies
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EE105 Spring 2008 Lecture 13, Slide 8 Prof. Wu, UC Berkeley
Bode Plot Example
• This circuit has only one pole at ωp1=1/(RCCL); the slope of |Av|decreases from 0 to ‐20dB/dec at ωp1.
• In general, if node j in the signal path has a small‐signal resistance of Rj to ground and a capacitance Cj to ground, then it contributes a pole at frequency (RjCj)‐1
LCp CR
11 =ω
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EE105 Spring 2008 Lecture 13, Slide 9 Prof. Wu, UC Berkeley
Pole Identification Example
inSp CR
11 =ω
LCp CR
12 =ω
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EE105 Spring 2008 Lecture 13, Slide 10 Prof. Wu, UC Berkeley
High‐Frequency BJT Model
• The BJT inherently has junction capacitances which affect its performance at high frequencies.Collector junction: depletion capacitance, CμEmitter junction: depletion capacitance, Cje, and also
diffusion capacitance, Cb.
jeb CCC +≡π
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EE105 Spring 2008 Lecture 13, Slide 11 Prof. Wu, UC Berkeley
BJT High‐Frequency Model (cont’d)
• In an integrated circuit, the BJTs are fabricated in the surface region of a Si wafer substrate; another junction exists between the collector and substrate, resulting in substrate junction capacitance, CCS.
BJT cross-section BJT small-signal model
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EE105 Spring 2008 Lecture 13, Slide 12 Prof. Wu, UC Berkeley
Example: BJT Capacitances• The various junction capacitances within each BJT are explicitly shown in the circuit diagram on the right.
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EE105 Spring 2008 Lecture 13, Slide 13 Prof. Wu, UC Berkeley
Transit Frequency, fT• The “transit” or “cut‐off” frequency, fT, is a measure of the intrinsic speed of a transistor, and is defined as the frequency where the current gain falls to 1.
π
πCgf m
T =2
Conceptual set-up to measure fT
in
inin Z
VI =
inmout VgI =
in
mT
inTminm
in
out
Cg
CjgZg
II
=⇒
=⎟⎟⎠
⎞⎜⎜⎝
⎛==
ω
ω11
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EE105 Spring 2008 Lecture 13, Slide 14 Prof. Wu, UC Berkeley
Dealing with a Floating Capacitance
• Recall that a pole is computed by finding the resistance and capacitance between a node and GROUND.
• It is not straightforward to compute the pole due to Cμ1in the circuit below, because neither of its terminals is grounded.
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EE105 Spring 2008 Lecture 13, Slide 15 Prof. Wu, UC Berkeley
Miller’s Theorem
• If Av is the voltage gain from node 1 to 2, then a floating impedance ZF can be converted to two grounded impedances Z1 and Z2:
1 2 1 11 1
1 1 2
1 1F F
F v
V V V VZ Z Z ZZ Z V V A−
= ⇒ = = =− −
1 2 2 22 2
2 1 2
1 11F FF
v
V V V VZ Z Z ZZ Z V V A
−= − ⇒ = − = =
− −
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EE105 Spring 2008 Lecture 13, Slide 16 Prof. Wu, UC Berkeley
Miller Multiplication
• Applying Miller’s theorem, we can convert a floating capacitance between the input and output nodes of an amplifier into two grounded capacitances.
• The capacitance at the input node is larger than the original floating capacitance.
vAA −≡0
( ) F
F
v
F
CAjACj
AZZ
001 1
11
1
1 +=
+=
−=
ωω
F
F
v
F
CAjA
Cj
A
ZZ⎟⎠⎞⎜
⎝⎛ +
=+
=−
=
00
211
111
1
11 ω
ω
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EE105 Spring 2008 Lecture 13, Slide 17 Prof. Wu, UC Berkeley
Application of Miller’s Theorem
( ), , ,
,
1 Dominant Pole since 1
111
p in p in p outS m C F
p out
C Fm C
R g R C
R Cg R
ω ω ω
ω
= ⇒ >+
=⎛ ⎞+⎜ ⎟
⎝ ⎠
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EE105 Spring 2008 Lecture 13, Slide 18 Prof. Wu, UC Berkeley
Small‐Signal Model for CE Stage
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EE105 Spring 2008 Lecture 13, Slide 19 Prof. Wu, UC Berkeley
… Applying Miller’s Theorem
( )( ),
,
11
Dominant pole1
11
p inThev in m C
p out
C outm C
R C g R C
R C Cg R
μ
μ
ω
ω
=+ +
⇒
=⎛ ⎞⎛ ⎞
+ +⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠
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EE105 Spring 2008 Lecture 13, Slide 20 Prof. Wu, UC Berkeley
Direct Analysis of CE Stage
• Direct analysis yields slightly different pole locations and an extra zero:
( ) ( )( ) ( )
( )
1
2
11
1
mz
pm C Thev Thev in C out
m C Thev Thev in C outp
Thev C in out in out
gC
g R C R R C R C C
g R C R R C R C C
R R C C C C C C
μ
μ μ
μ μ
μ μ
ω
ω
ω
=
=+ + + +
+ + + +=
+ +
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EE105 Spring 2008 Lecture 13, Slide 21 Prof. Wu, UC Berkeley
I/O Impedances of CE Stage
( )( )[ ] πμπω
rCrRgCj
ZoCm
in ||1
1++
≈ [ ] oCCS
out rRCCj
Z ||||1+
=μω