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ECE2030

Introduction to Computer Engineering

Lecture 3: Switches and CMOS

Prof. Hsien-Hsin Sean Lee

School of Electrical and Computer Engineering

Georgia Tech

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Basic Switch

A path exists when the Switch Control is closed

If (Open) OUTPUT = unknown ; Switch is open (OFF)

Else OUTPUT = INPUT ; Switch is closed (ON)

INPUT OUTPUT

Switch Control

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The Analogy of A Transistor

Cross Section

An N-Channel Metal-Oxide Semiconductor Field Effect Transistor (MOSFET)

INPUT OUTPUT

Switch Control (Gate)

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Transistor Characteristics

Cut-off Region Vgs Vt 0 No current (Ids) between drain and source

Linear (or Ohmic) Region 0 < Vds < Vgs Vt

Ids is a function of Vgs and Vds Ids = *[(Vgs-Vt)*VdsVds*Vds/2]

Saturation Region 0 < Vgs Vt < Vds

Ids is independent of Vds

Ids = (/2)*(Vgs-Vt)2

= process factor * (W/L)

Vt : Threshold voltage, a function ofmaterials, doping, insulator thickness, etc.

Gate

Drain

Source

IdsVds

Vgs

N-type MOS Transistor

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Transistor Characteristics

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Switches in Series

INPUT

OUTPUT

S1

S2

Truth Table

S1 S2 PATH?

OFF OFF

OFF ON

ON OFF

ON ON

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Switches in Series

INPUT

OUTPUT

S1

S2

Truth Table (OFF/ON=0/1)

S1 S2 PATH?

OFF OFF NO

OFF ON NO

ON OFF NO

ON ON YES

What Function ??

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Switches in Series

INPUT

OUTPUT

S1

S2

Truth Table (OFF/ON=0/1)

S1 S2 PATH?

0 0 0

Function = ??

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Switches in Series

INPUT

OUTPUT

S1

S2

Truth Table (OFF/ON=0/1)

S1 S2 PATH?

0 0 0

0 1 0

Function = ??

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Switches in Series

INPUT

OUTPUT

S1

S2

Truth Table (OFF/ON=0/1)

S1 S2 PATH?

0 0 0

0 1 0

1 0 0

Function = ??

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Switches in Series

INPUT

OUTPUT

S1

S2

Truth Table (OFF/ON=0/1)

S1 S2 PATH?

0 0 0

0 1 0

1 0 0

1 1 1

Function = LogicAND

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Switches in Parallel

INPUT

OUTPUT

S1

Truth Table

S1 S2 PATH?

OFF OFF NO

OFF ON YES

ON OFF YES

ON ON YES

S2

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Switches in Parallel

INPUT

OUTPUT

S1

Truth Table

S1 S2 PATH?

0 0 0

0 1 1

Function =??

S2

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Switches in Parallel

INPUT

OUTPUT

S1

Truth Table

S1 S2 PATH?

0 0 0

0 1 1

1 0 1

Function =??

S2

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Switches in Parallel

INPUT

OUTPUT

S1

Truth Table

S1 S2 PATH?

0 0 0

0 1 1

1 0 1

1 1 1

Function = Logic OR

S2

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Transmission Degradation using

Pass Transistor

Vdd - VtVdd

Vdd (1)

Vdd - 2VtVdd

Vdd

Vdd

Vout = Vdd- N*VtStill 1??

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CMOS Signal Transfer Property

Gate Path

0 Closed

1 Open

Gate

Drain

Source

Gate

Source

Drain

Gate Path

0 Open

1 Closed

pMOS

nMOS

Transmits 1 wellTransmits 0 poorly

Transmits 0 wellTransmits 1 poorly

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CMOS Transmission Gate

Transmit signal from INPUT to OUTPUT when

Gate is closed

Gate (complementary of Gate)

Source Drain

Gate

INPUT OUTPUT

Gate pMOS nMOS OUTPUT

0 OFF OFF Z

1 ON ON INPUT

Z: High-Impedance State,consider the terminal is floating

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High Impedance

When a path exists

Impedance is low to

allow ample flow of

current

When no path

Impedance is high

allowing almost nocurrent flow between

two terminals

Gate=1

DrainSource

> 100M

Closed

Gate=0

DrainSource

Open

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Transmission Gates

Gate = 1

0 0

Gate = 0

Transmit Logic 0

Gate = 1

1 1

Gate = 0

Transmit Logic 1

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Transmission Gate Symbol

Gate

Gate

INPUT OUTPUT

Gate

Gate

INPUT OUTPUT