Krishnaiyan Thulasiraman

Professor and Hitachi Chair

School of Computer Science

University of Oklahoma

200 Felgar Street, Room 114

Norman, OK 73019

U.S.A.

(405) 325-0566 (Office)

(405) 325-4042 (Department)

(405) 325-4044 (Fax)

thulasi@ou.edu (Email)

http://cs.ou.edu/~thulasi/

CITIZENSHIP : United States and Canada

EDUCATION:

PhD Electrical Engineering,

Indian Institute of Technology. Madras, India

M. S. (Engineering) Electrical Engineering,

University of Madras, Madras, India

B. E. Electrical Engineering,

University of Madras, Madras, India

1968

1965

1963

FACULTY APPOINTMENTS: Hitachi Chair Professor, School of Computer Science,

University of Oklahoma, Norman, Oklahoma

Chair Electrical and Computer Engineering,

Concordia University, Montreal, Canada

Professor, Electrical and Computer Engineering, Concordia University, Montreal, Canada

Professor, Mechanical Engineering (Industrial Engineering),

Concordia University, Montreal, Canada

Professor/ Assoc. Professor, Electrical Engineering,

Technical Univ. of Nova Scotia, Halifax, Canada

Professor, Computer Science,

Indian Institute of Technology, Madras, India

Associate Professor, Computer Science,

Indian Institute of Technology, Madras, India

Assistant Professor, Computer Science,

Indian Institute of Technology, Madras, India

Aug 94–date

Jun 93–May 94

Sep 84–Aug 94

Sep 82–Aug 84

Sep 81–Aug 82

Jan 77–Sep 81

Aug 74–Jan 77

May 73–Jul 74

Assistant Professor, Electrical Engineering,

Indian Institute of Technology, Madras, India

Lecturer, Electrical Engineering,

Indian Institute of Technology, Madras, India

Associate Lecturer, Electrical Engineering,

Indian Institute of Technology, Madras, India

Aug 68–May 73

Oct 66–Aug 68

Sep 65–Oct 66

VISITING FACULTY POSITIONS:

Sateesh Kumar Singh Chair Professor, Sri Chandrasekharendra Saraswathi

Mahavidyalaya , Kancheepuram

Visiting Professor, Department of Electrical and Computer Engineering,

University of Waterloo, Ontario, Canada (Sabbatical)

Gopalakrishnan Chair and Professor in CS Indian Institute of Technology,

Madras, India

Visiting Professor Chuo University, Japan (with Professor Shinoda and

supported by the International Research Exchange Program of the Chuo

University)

Visiting Professor Coordinated Sciences Lab., University of Illinois, Urbana-Champaign Champaign (Sabbatical with Professor Steve Kang and Professor

Ibrahim Hajj)

Visiting Scientist Nortel Networks, Ottawa, Canada

Visiting Scientist Bell Northern Research Lab., Verdun, Quebec, Canada.

Guest Professor University of Karlsruhe, Karlsruhe, Germany (with Professor

Mlynski and supported by the German National Science Foundation).

Visiting Scientist Centre de Recherche en, Informatique de Montreal, Montreal, Canada (Sabbatical).

Visiting Professor Tokyo Institute of Technology, Tokyo, Japan (with

Professor Kajitani supported by a Senior Fellowship of the Japan Society for

Promotion of Science).

Visiting Professor Concordia University, Montreal, Canada

Visiting Assoc. Professor Concordia University, Montreal, Canada

Postdoctoral Fellow Concordia University, Montreal, Canada

June-July 2009

June-Dec. 2007

Jun-Aug 2004

May-Jun 2001

Aug-Dec 2000

May–Aug 2000

Jan 91–May 91

Sep 90–Dec 90

Jun 90–Aug 90

Mar 88–Jul 88

Jan 79–Dec 79

May 75–Jul 76

Sep 70–Jun 72

ADJUNCT FACULTY POSITIONS: Professor , David Cheriton School of Computer Science, University of Waterloo,

Canada.

Professor, University of Arkansas, Little Rock, USA.

Professor , Systems and Computer Engineering, Carleton University, Ottawa,

Canada.

HONORS and AWARDS:

Sateesh Kumar Singh Chair Professor, Sri Chandrasekharendra Saraswathi Mahavidyalaya ,

Kancheepuram, June-July 2009.

2008 Distinguished Alumnus Award, Indian Institute of Technology, Madras, India. (Citation

attached)

2007 Fellow of the American Association for Advancement of Science.

Citation: For distinguished contributions for over four decades to diverse areas in the field of

circuits, systems, and computing, emphasizing graph-theoretic modeling and algorithmic

approaches.

2006 IEEE Circuits and Systems Society Technical Achievement Award.

Citation: For sustained and outstanding technical contributions for more nearly four decades to

graph theoretic foundations of circuits, systems and computing emphasizing theoretical and algorithmic aspects and bridging theory and practice in diverse areas of applications ranging from

classical circuit theory to modern areas such as VLSI physical design, VLSI testing, and fault

tolerance in WDM optical networks; For sustained leadership efforts in promoting graph theory

based research through research publications, text books, monographs and CAS society technical

committee/editorial/conference activities

Hitachi Chair in Computer Science, University of Oklahoma, Norman. 1994 – date

Endowed Gopalakrishnan Chair Professorship in Computer Science and Engineering

(Endowed), Indian Institute of Technology, Madras, India, Dec. ’04-Jan.’05 and June –Aug.’05.

Elected member of the European Academy of Sciences since 2002. Citation: “For an Outstanding and Lasting Contribution to the Development of Novel Algorithms and Computer

Science Education”.

IEEE CAS Society Golden Jubilee Medal, 1999 for “Outstanding Contributions to Circuits and

Systems”.

Elected Fellow of the IEEE in December 1989, for “Contributions to Applications of Graph

Theory.”

Award of Guest Professorship for Research at the University of Karlsruhe by the German

National Science Foundation (Sept. 90 – Dec. 90).

Award of Senior Research Fellowship by the Japan Society for Promotion of Science for

research at the Tokyo Institute of Technology, Tokyo (March –July 1988).

BOOKS: K. Thulasiraman and M. N. Swamy, “Graphs: Theory and Algorithms”, Wiley-Inter-science,

1992(420 pages).

M. N. Swamy and K. Thulasiraman, “Graphs, Networks and Algorithms”, Wiley-Inter-science,

1981. (This book has been translated into Russian and Chinese.) ( 590 pages). See attached for

reviews of this book.

Have signed a contract with CRC Press for a 2-volume “Handbook of Graph Algorithms and

Applications” (about 2500 Pages) for publication in the series edited by Sartaj Sahni. Details of

this proposed project are included at the end of this biography.

BOOK CHAPTERS: K. Thulasiraman, “Graphs and Vector Spaces” Chapter in the Handbook of Graph Theory edited

by Jonathan Gross and Jay Yellen of Columbia University, CRC Press, 2003.

K. Thulasiraman, “Circuit Theory”, Encyclopedia of Physical Science and Technology,

Academic Press, Third Edition, Vol.2, 2002.

K. Thulasiraman, “Circuit Theory” Section Editor, (Five Chapters), Handbook of Electronic

Engineering, Academic Press, Oct. 2000.

K. Thulasiraman and M. N. S. Swamy, “Circuit Analysis: A Graph Theoretic Foundation”,

Chapter in Handbook of Electronic Engineering, Academic Press, October 2000.

K. Thulasiraman, “Signal Flow Graphs”, Chapter in Circuits and Filters Handbook, CRC Press,

June 1995. Also in “Mathematics of Circuits and Filters” Ed. W. K. Chen, CRC Press.

K. Thulasiraman “Graph Theory”, Chapter in Circuits and Filters Handbook, CRC Press, June 1995. Also in “Mathematics of Circuits and Filters” Ed. W. K. Chen, CRC Press.

Monograph:

K. Thulasiraman, “ Algorithmic Graph Theory, Discrete Optimization and Fault Tolerance in

Networks”, Monograph containing selected works of Thulasiraman covering the topics of his lectures at

the Indian Institute of Technology, Madras, India delivered during his visit to the IIT as endowed

Gopalakrishnan Chair Professor in Computer Science, June-July 2005.

Journal Special Issue:

K. Thulasiraman and Narsingh Deo (Editors), “Computational Graph Theory and Applications”, Special Issue of the IEEE Transactions on Circuits and Systems, March 1988.

Patent:

Ravi Ravindran, Guo-Qiang Wang and Krishnaiyan Thulasiraman, “Distributed Quality of Service

Routing” U.S. Patent #7,499,404, March 2009.

Conference Proceedings:

Technical Program Chair and Editor of the Proceedings of the IEEE International Symposium

on Circuits and Systems (ISCAS 1993), Chicago, 1993.

Technical Program Chair and Editor of the Proceedings of the IEEE International Symposium

on Circuits and Systems (ISCAS 1999), Orlando, 1999.

EDITORSHIPS: Deputy Editor-in-Chief of the IEEE Transactions CAS-I, January 2004-December 2005.

Founding member of the editorial board of “AKCE International Journal of Graphs and Combinatorics”, published from Madurai, India, 2004- to date.

Associate Editor, IEEE Trans. on Circuits and Systems, 1999–2001.

Founding Regional Editor, Journal of Circuits, Systems, and Computers (Publisher: World

Scientific Publishing Company, Singapore) (1990–2002).

Editor, Proceedings of the IEEE International Symposium on Circuits and Systems, Orlando, June

1999.

Editor, Proceedings of the IEEE International Symposium on Circuits and Systems, Chicago, May

1993.

Associate Editor, IEEE Trans. Circuits and Systems, 1989–91.

Guest Editor of a special issue of the IEEE Transactions on Circuits and Systems on

“Computational Graph Theory: Algorithms and Applications”, (Co-editor: Professor Narsingh

Deo, Dept. of Computer Science, University of Central Florida, Orlando, Florida, U.S.A.), March

1988.

Associate Editor, Canadian Electrical Engineering Journal, (1985 – 87).

PROFESSIONAL SOCIETY MEMBERSHIPS:

Fellow, IEEE.

Fellow, American Association for Advancement of Science.

Member of the ACM.

Member, European Academy of Sciences.

Member of the IEEE Circuits and Systems Society, Computer Society, Communications Society, and Information Theory Society.

MAJOR PROFESSIONAL ACTIVITIES: (Excluding Journal Editorships)

Inaugural address, Platinum Jubilee Annual Conference of the Indian Mathematical

Society, December 2009.

Invited Speaker, India-Taiwan Conference on Discrete Mathematics, Taipei, November

2009.

Member, Technical Program Committee INFOCOM 2010.

Member , Technical Program Committee, ANTS 2009, New Delhi, India.

Member, 2009 IEEE Circuits and Systems Society Technical Achievement Award Committee.

Member, 2006 IEEE Circuits and Systems Society Mac Van Valkenburg Award Committee.

NSF Panelist, 2005.

NSF Panelist, 2004.

Deputy Chair, Constitution and Byelaws Committee, 2003-to date.

Distinguished Lecturer, IEEE CAS Society, 2003 and 2004.

Honorary/Founding Member, RESMIQ (Formerly GRIAO), Institute for Microelectronics

Research, Montreal, Canada, since 1992.

Founder and Founding Chair, IEEE Circuits and Systems Society Technical Committee on “Graph Theory and Computing”, since September 2001.

Member, IEEE Fellows Committee of the IEEE Circuits and Systems Society, 2001 and 2002.

Member, Administrative Restructuring Committee of IEEE CAS Society, 2000-2001.

Chair, Committee on Constitution and Bylaws, IEEE CAS Society, 2000-2001.

Member, Adminstrative Restructuring Committee of IEEE CAS Society, 2000-2001.

Vice President, Administration, IEEE CAS Society 1998, 1999.

Member, Board of Governors, IEEE CAS Society, 1998, 1999.

Technical Program Chair, IEEE International Symposium on Circuits and Systems,

Orlando, 1999.

Member, Nomination Committee, IEEE CAS Society, 1997.

Member, Steering Committee, IEEE International Symposium on Circuits and Systems, Chicago,

1993.

Technical Program Chair, IEEE International Symposium on Circuits and Systems,

Chicago, 1993.

UNDP consultant to I.I.T. Bombay for their Computer Networking project. (June– July 1992).

Member, Technical Program Committee, IEEE International Symposium on Circuits and Systems.

Almost every year since 1984.

Member, Canadian Computer Engineering Education Committee (1989– 1991).

Member, Canadian Delegation for the Workshop on “Distributed and Parallel Systems” organized

by the Jacques Cartier Research Center, Lyons, France, Dec. 1989.

Finance Chair, Member, Steering Committee, IEEE International Symposium on Circuits and

Systems, 1984.

Member, Education Committee of IEEE Circuits and Systems Society, (1984 – 86).

Organized and chaired a special session on “Algorithmic Graph Theory” at the IEEE International

Symposium on Circuits and Systems, Kyoto, Japan, 1985.

RESEARCH HISTORY: My research has been primarily in Graphs, Networks, Algorithms and Applications.

My earliest research (Master’s Thesis, 1965), was on the application of graph theory to the analysis of

power networks – short circuit and load flow studies – using a network reduction –restoration technique.

For my Ph. D. work (I.I.T., Madras, 1965-68), I pursued studies on application of graph theory to the n-port resistance network problem. At that time this problem – now considered classical – was engaging the

attention of several leading circuit theorists – Guillemin, Lempel, Cederbaum, Frisch, Boesch, Biorci etc.

My Ph. D. research and the research of my students (1972, 1975) resulted in several significant

contributions to the n-port network problem. The contributions involved a good mix of graph theory, circuit

theory and applied mathematics. During the period 1972 – 75, I also contributed to other topics in network

theory such as active n-port network synthesis, network sensitivity theory, state variable analysis etc.

It is very gratifying to recall that Abraham Lempel at Technion, Israel is considered a leader in Information

Theory, Frisch at Columbia is one of the earliest researchers in telecommunication networks and founded

the Network Analysis Corporation in the 1970’s and Frank Boesch founded in the 1970’s the prestigious

journal “Networks” published by John Wiley. Late Professor Guillemin of MIT is considered the father of modern circuit theory. Professor Cederbaum, now in his 90’s and also at Technion, is one of the pioneering

researchers in graph theoretic applications.

During the period 1970 – 72, when I did my Post-Doctoral work at Concordia University, Montreal,

Canada, I directed my research more towards algorithmic, structural and combinatorial issues in graph

theory. The research in structural graph theory was then motivated by applications to reliability and

vulnerability studies of communication networks. On my return to I.I.T. Madras in 1972, (after post-

doctoral work) I was transferred to the Department of Computer Science and Engineering at the I.I.T. Since

then my research has been primarily on Computational Graph Theory and Combinatorial Optimization with

a focus on applications. As a founding faculty of the CS faculty at the IIT, I was involved in development

of graduate curriculum in CS and building the research programs. I served as graduate program director for the eight years I served there.

During the years 1975– 80, I spent a good deal of my time completing the book “Graph, Networks and

Algorithms” (coauthored with M.N.S. Swamy of Concordia University and published by Wiley-

Interscience, 1981). This book (about 600 pages long), consists of three parts. Part I contains a substantial

amount of information on what my be called “Foundations of Graph Theory.” Part II develops a number of

results in electrical network theory as extensions of results in graph theory. It also deals with several graph-

theoretic results discovered by circuit theorists. Part III, on Algorithmic Graph Theory, gives a very

detailed and rigorous account of a number of graph algorithms and their analysis. This book’s coverage

thus spans three disciplines – graph theory, computer science, and electrical network and system theory. It

has received very good reviews (attached at the end) from several noted scholars belonging to these

disciplines. We carried out a substantial revision of this book. The new book titled “Graphs: Theory and Algorithms” appeared in February 1992. I believe that this book contained all the fundamentals of graph

theory and algorithms that one would encounter in most applications.

In 1981, I moved to Canada. After spending a year at the Technical University of Nova Scotia, Halifax and

two years at the Industrial Engineering division of the Mechanical Engineering Department at Concordia, I

moved to the Department of Electrical and Computer Engineering in 1984. Since then I have developed

strong interests in inter-disciplinary research.

While in Canada I have participated in the establishment of several interdisciplinary research centers. I am

a Honorary /Founding Member, RESMIQ (Formerly GRIAO), Institute for Microelectronics Research,

Montreal, Canada, since 1992.

I moved to the USA in Aug. 1994 as Hitachi Chair professor in the School of Computer Science at the

University of Oklahoma, Norman.

For my contributions to Graph Theory and Applications, I was elected in 1989 Fellow of the IEEE. I was

awarded the Golden Jubilee Medal by the IEEE Circuits Society for Outstanding Contributions Circuits and

Systems. More recently, I was elected member of the European Academy of Sciences “for an Outstanding

and Lasting Contribution to the Development of Novel Algorithms and Computer Science Education”.

Since 1982, the focus of my research has been on Graph Theory, Discrete Optimization and Computing

emphasizing applications in the general area of Networks, Distributed/Parallel Systems and VLSI.

Distributed Fault Location for Integrated Network Management.

Fault Tolerant Interconnection Network Design.

Identifying Codes for Fault Tolerance

Communication Protocol Engineering.

Protection and Restoration in Optical Networks.

Survivable Logical Topology Design

Virtual Private Networks: Topology Abstraction and Resource Optimization

QoS Routing in Communication Networks.

Multimedia Protocol.

Marked Graph Models of Concurrent Systems and Network Programming.

Multiperiod Network Planning.

Evolutionary Computation for Combinatorial Optimization (Tabu Search, Simulated Annealing

and Genetic Algorithm).

VLSI Physical Design.

Parallel/Distributed Computing for Network Optimization and VLSI CAD.

System level Diagnosis: Graph Models and Algorithms.

Probabilistic Diagnosis and VLSI Testing.

Multilevel Cooperative Search for Graph Partitioning.

Planar Embedding and Maximal Planarization of Graphs.

Spanning Tree Counting and Enumeration Algorithms

RESEARCH COLLABORATION: Over the years several visiting scientists and post-doctoral fellows have collaborated with me in my research.

Professors/Researchers Min Xu, Chinese Academy of Sciences, Beijing.

Xiaodong Hu, Chinese Academy of Sciences, Beijing

C. Hadjicsotis, Coordinated Sciences Laboratory, University of Illinois, Urbana-Champaign.

Guoliang Xue, Department of Electrical and Computer Science, Arizona State University,

Phoenix.

F. Glover, University of Colorado, Boulder.

Baher Haroun, Texas Instruments, Dallas.

D.A. Mlynski, University of Karlsruhe, Karlsruhe, Germany.

Jens Lienig, Drisden University, Germany.

D. Sotteau, University of Paris, Paris.

Y. Kajitani, Tokyo Institute of Technology, Tokyo.

S. Ueno, Tokyo Institute of Technology, Tokyo.

Dong Xiang, Tsinghu University, Beijing.

J. Opatrny, Computer Science, Concordia University, Montreal.

B.T. Smith, Applied Math, Ecole Polytechnique, Montreal.

M.N.S. Swamy, Electrical Engineering, Concordia University, Montreal.

Lixin Tao, Computer Science, Concordia University, Montreal.

Michel Toulouse, University of Manitoba, Winnipeg, Canada.

S. Akl, Computer Science, Queen’s University, Kingston, Canada.

V.K. Agarwal, Electrical Engineering, McGill University, Montreal, Canada (Now CEO, Logic

Vision, Santa Clara, since 1994).

Changcheng Huang, Carleton University, Ottawa, Canada.

Ravi Ravindran, Nortel Networks, Ottawa, Canada.

Anindya Das, University of Western Ontario, London, Canada.

Ming - Shan Su, South Eastern Oklahoma State University, Durant, Oklahoma.

VISITING SCIENTISTS and POST-DOCTORAL FELLOWS:

Lavanya Sivakumar, IIT Madras, Feb. – May 2009.

Min Xu, Chinese Academy of Sciences, Beijing, August –December 2006.

C. Pandurangan, I.I.T, Madras, India July 2004.

Michel Toulouse,1997-1999 ( now University of Manitoba, Winnipeg, Canada)

Dong Xiang, Academia Sinica, Sept. 1994 - 1995. (now at Tsinghua University, Beijing)

Safir, University of Paris, Aug. 1992 - Nov. 1994.

Jesse Chen, University of Texas, Dallas, Sept. 1992-Aug. 1993.

S. Gao, University of Saarlandes, Saarbrucken, Germany, Aug. 1991-1993.(NSERC International

Post-Doctoral Fellow 1991 - 1993)

J. Lienig, Aug., 1991 - Feb. 1995.(now at Dresden University)

S. Srinivas, Oct. 1990 - Sept. 1992 (now at Dallhousie University, Halifax, Canada)

N. Srinivasan, Madras University, Aug., 1990 - July 1991.

V. Krishnamoorthy, Anna University, Madras, Sept. 1985 - Sept. 1987, May 1990 - June 1990.

Y. Zhao, Concordia University, Montreal, Sept. 1989-Aug. 1992.

H. Miyano, Tokyo Institute of Technology, Tokyo, June 1989- Sept. 1989.

M. R. Sridharan, I.I.T., Kanpur, India, Sept., 1988-Sept. 1989.

K. Krithivasan, I.I.T., Madras, April, 1987-Sept. 1987.

K. B. Lashmanan, SUNY, Brockport, June 1986 - May 1988.

RECENT/CURRENT RESEARCH: Distributed Fault Location for Integrated Network Management.

System Level Testing: Graph Models and Algorithms.

Multimedia Transport protocol.

Distributed Multi-Level Co-operative Search.

QoS Oriented Route Selection.

Protection and Restoration Issues in Optical Networks.

Identifying Codes for Fault Tolerance

Topology Aggregation and Bandwidth Allocation in Virtual Private Networks.

Survivable Logical Topology Design for IP over WDM Optical Networks.

RESEARCH GUIDANCE: PhD Thesis

Muhammad Javed, “ Survivable Logical Design for IP over WDM Optical Networks”, School of

Computer Science, University of Oklahoma, April 2009.

S. Ravi Ravindran” Topology Abstraction as Service to IP Virtual Private Neworks”, Systems and

Computer Engineering Department, Carleton University , Ottawa, Canada, March 2009, Co-

advisor: Professor Huang

Ying Xiao, “QoS Paths Selection in Communication Networks: Approximation Algorithms Based

on Mathematical Programming Techniques” Fall 2005.

Ming Shan Su, “Multilevel Adaptive Distributed Diagnosis for Fault Location in a Network of

Processors and Design of a Distributed Network Fault Detection System Based on the SNMP

Protocol, School of Computer Science, University of Oklahoma, December 2001. Seth Noble, “Development and Testing of a New Transport Protocol for Multimedia Application”,

School of Computer Science, University of Oklahoma, 1999.

Chad Lamb, “Graph Models and Systems Level Testing”, Dept. of ECE, University of Oklahoma,

1997.

T. Ramalingam, “Test Case Generation and Fault Diagnosis Methods for Communication

Protocols Based on FSM and EFSM Models”, Electrical and Computer Engineering, Concordia

University, Montreal, Canada, Nov. 1994.

R. Chalasani, “Parallel Network Optimization on a Shared Memory Multiprocessor and

Application in VLSI Layout Compaction and Wire Balancing”, Electrical and Computer

Engineering, Concordia University, Montreal, Canada, May 1994.

K. Huang, “System Level Diagnosis and Wafer Testing,” Electrical and Computer Engineering, McGill University, Montreal, Canada, February 1993. (Co-supervisor: V.K. Agarwal, McGill

University, Montreal).

Das, “Diagnosability and Diagnosis of Sparsely Interconnected Multiprocessor Systems”,

Electrical and Computer Engineering, Concordia University, Montreal, Canada, November, 1989.

(Co-supervisor: V.K. Agarwal, McGill University, Montreal)

Patrick Rioux, “Minimum Cost Sizing of Rearrangeable Networks with Multiperiod Demands,”

Electrical and Computer Engineering, Concordia University, Montreal, Canada, Feb., 1988. (Co-

supervisor: B.T. Smith, Ecole Polytechnic, Montreal).

Marc A. Comeau, “Reachability and Sequencing Problems on Marked Graphs and State Graphs: Algorithms Based on Network Programming,” Electrical Engineering, Concordia University,

Montreal, Canada, June 1986.

R. Jayakumar, “Design and Analysis of Graph Algorithms: Spanning Tree Enumeration, Planar

Embedding, and Maximal Planarization,” Electrical Engineering, Concordia University, Montreal,

Canada, June 1984.

M.G.G. Naidu, “Studies in Resistance n-port Networks and Graphs,” Electrical Engineering

Department, I.I.T., Madras, India, 1975.

P. S. Reddy, “Analysis and Synthesis of K- and Y- Matrices of n-port Networks,” Electrical

Engineering Department, I.I.T. Madras, India, 1972.

Recent Master‟s Theses

Ravi Ravindran, “Distributed and Sequential Heuristics for QoS Routing in Communication

Networks”, School of Computer Science, University of Oklahoma, December 2000.( Now at

Nortel Networks, Ottawa, Canada).

I am presently co-advising Ravindran for PhD at Carleton University, Canada.

Venkateswaran S. Chandsrasekharapuram, “ Networked Computing for the Maximum Flow problem”, School of Computer Science, University of Oklahoma, 1997.( Now at Motorola,

Chicago)

MJAOR RESEARCH GRANTS:

NSF Medium ITR Collaborative Research Grant Project “Diagnosis and

Assessment of Faults, Misbehavior and Threats in Distributed Dynamic Environments”(with University of Illinois, MIT, Boston and Yale ) Total: $1.1

Million

NSF ITR Collaborative Research Grant Project: Fault Tolerance in WDM

Optical networks: Multiple Failure Recovery and Multilayer Survivability

(with ASU). Total: 325,000

Hitachi Research Funds ( 1994 to date)

Research and Education Grant from NORTEL, Canada; Project: “Performance

Evaluation of QoS Oriented Route Schemes", (1998-99)

Seed Grant for the “Center for Information Technology and Computing”,

University of Oklahoma, (1995)

NSERC Strategic Grant for the project “Parallel CAD for VLSI Physical

Design”, (1991 - 94)

FCARC Grant (15 researchers), (1992-95)

Researcher: MICRONET, Canadian Center of Excellence in Microelectronics

funded by NSERC (one of six members of a subproject on ULSI-based Systems Architecture), (1990-94)

140,000

162,000

400,000

60,000

25,000*

430, 000*

270,000*

800,000*

Micronet Project: “Distributed CAd for VLSI Design” (with B. Haroun and Y.

Savaria), (1994-95)

NSERC Operating Grant, (1981 - 94) (approx.)

FCAR Program Soutien Aux equipes De Recherche (with J.F. Hayes, M. Comeau and Mehmat Ali), (1992 - 95)

NSERC Co-operative Research and Development Grant for the project

“Design and Performance Evaluation of Distributed Algorithms for Network

Optimization Problems” (with M. Comeau and El-Hakeem. Collaborating

Company: BNR),(1988 -91)

FCAR Grant for the project “Distributed Protocol Design and a VLSI Based

System Architecture for Network Optimization Problems." (with M. Comeau

and N. Dimopoulos), (1986 - 89)

FCAR Team Grant, (1984 - 86)

Member, FCAR Actions Structurantes Team on “VLSI”, (1985 - 90)

Member, FCAR Actions Structurantes Team on “Telematique”, (1985- 90)

*.,1 Both projects were declared successful in 1990. This resulted in the award of

three faculty positions to Concordia University by the province of Quebec.

* There is no University overhead charge on these grants.

35,000*

250,000*

159,000*

330,000*

93,000*

24,000*

70,000*1

170,000*1

TEACHING INTERESTS:

I have extensive experience in teaching and curriculum development in different areas of Electrical

Engineering Computer Science and Industrial Engineering.

Computer Science:

Discrete Mathematics/Applied Algebra.

Computational Graph Theory.

Computational Methods in Discrete Optimization.

Advanced Discrete Optimization and Networks.

Algorithm Design and Analysis.

Topics in Networks and Distributed Systems (Optical Networks, Wireless Networks, QoS,

Distributed Computing, Performance Evaluation etc).

Distributed Computing and Fault Tolerance.

Electrical and Computer Engineering:

Electrical Circuit Analysis.

Electrical Circuit Design.

Systems Theory.

Signal Processing.

Digital Logic and Digital Systems Testing.

Industrial Engineering:

Probability, Statistics and Reliability.

Linear Optimization

INVITED LECTURES:

Inaugural address. Platinum Jubliee conference of the Indian Mathematical Sociwety,

December 2009.

Invited Speaker, India-Taiwan Conference on Discrete Mathematics, Taipei, November

2009.

Department of Electrical Engineering, University of North Texas , Denton, USA, November 2007.

Department of Computer Science, University of Windsor, Windsor, Ontario, Canada, March 2008

Department of Computer Science, I.I.T Madras, June 2005-July 2005. Department of Electrical Engineering, Tokyo Institute of Technology, Tokyo, Japan, May 2005.

Department of Electrical Engineering, Chuo University, Tokyo, Japan, May 2005.

Department of Computer Science, Tohoku University, Sendai, Japan, May 2005.

Department of Computer Science, I.I.T Madras, December 2004-January 2005.

University of North Texas, Denton, October 2004.

School of Engineering, University of California, Santa Cruz, USA, November 2003.

Department of Electrical and Computer Engineering, University of Manitoba, Winnipeg, Canada,

March 2002.

Department of Electrical and Communication Engineering, Tokyo Institute of Technology, June

2001.

Department of Information Engineering, Niigata University, Japan, May 2001.

Department of Computer Science, Aizu University, June 2001.

Department of Electrical Engineering, Chuo University, Tokyo, June 2001.

Department of Electrical Engineering, Kyushu University, June 2001.

Coordinated Sciences Laboratory, University of Illinois, Urbana-Champaign, November, 2000.

Nortel Networks, Ottawa, Oct. 1999.

University of Oklahoma, May 1993.

Dept. Of Comp. Science, I.I.T., Bombay, July 1992.

Dept. of Comp. Science, Univ. of Southern Louisiana, March 1992.

Dept. of Comp. Science, University of Ohio, Athens, May 1991.

Dept. of Mathematics, Technical Univ. of Berlin, Germany, December 1990.

GMD, Fokus, Berlin, Germany, December 1990.

Dept. of Comp. Science, Univ. of Twente, Holland, November 1990.

Dept. of Comp. Science, Utretcht Univ., Holland, November 1990.

Dept. of Comp. Science, Univ. of Saarlandes, Saarbrucken, Germany, October 1990.

Dept. of Comp. Science, Univ. of Paderborn, Paderborn, Germany, October 1990.

Dept. of Comp. Science, Queen’s Univ., Kingston, Canada, November 1988.

Dept. of Comp. Science, I.I.T., Bombay, August 1988.

Dept. of Comp. Science, I.I.T., Madras, August 1988.

Dept. of Comp. Science, Anna Univ., Madras, August 1988.

Dept. of Comp. Science, Univ. of Hong Kong, July, 1988.

Dept. of Applied Mathematics, Hiroshima Univ., Japan, May 1988.

Dept. of Elect. Engineering, Tohoku University, Japan, May 1988.

Dept. of Elect. Engineering, Osaka Univ., Japan, May 1988.

Dept. of Elect. Engineering, Fukui Univ., Japan, April 1988.

Dept. of Elect. Engineering, Nigata Univ., Japan, April 1988.

South East Asian Conference on Combinatorics, Univ. of Singapore, May 1983.

Dept. of Elect. Engineering, I.I.T., Madras, August 1984.

Dept. of Comp. Science, Univ. of Toronto, December 1982.

Dept. of Comp. Science, Clarkson College of Technology, Potsdam, New York, May 1979.

Dept. of Comp. Science, Univ. of Oklahoma, Norman, Oklahoma, April 1979.

Dept. of Mathematics, Western Illinois Univ., Macomb, Illinois, March 1979.

Dept. of Comp. Science, Univ. of Toronto, Ontario, April 1976.

Dept. of System Design, Waterloo Univ., Ontario, May 1976.

Dept. of Comp. Science, Indian Institute of Tech., Kanpur, March 1973.

Dept. of Elect. Engineering, Osmania Univ., India, February 1973.

Dept. of Elect. Engineering, Tokyo Institute of Tech., Tokyo, May 1972.

Dept. of Elect. Engineering, Univ. of Tokyo, May 1972.

ACADEMIC ADMINISTRATION and COMMITTEE MEMBERSHIPS:

Member, University Tenure Committee, 2002-2005.

Member, Graduate Council, University of Oklahoma, 2008-2011

Member, Dean’s Senior Professors Advisory Committee, 2008-2009.

Chair, International Relations Committee, School of CS, University of Oklahoma, 2008- to date.

Chair, Graduate Committee, School of Computer Science, University of Oklahoma, 2001-2004.

Member, University Appeals Board, University of Oklahoma, 2001-2003.

Member, Search Committee for the Williams Telecommunications Professorship, University of

Oklahoma, 2000-2001.

Chair, Director Search Committee, School of Computer Science, University of Oklahoma, 1998-

1999.

Member, Faculty Senate, University of Oklahoma, 1995 – 1998.

Member, Hugh’s Professor Search committee, 1998.

Member, search committee for director for MS in Telecomputing, (Electrical, Computer Science,

Industrial Engineering and Business), University of Oklahoma, 1998.

Chair, Graduate Committee, School of Computer Science, University of Oklahoma, (1995 - to

1998).

Member, Committee A, School of Computer Science, University of Oklahoma, (1995 - 1997).

Member, Dean’s Senior Faculty Advisory Committee, University of Oklahoma, (1995).

Member, Search Committee for Associate Dean for Research, (1995).

Member, College of Engineering Curriculum Committee, University of Oklahoma, (1994 - to

date).

Director, Center for Information Technology and Computing, (1995-to date).

Member, Faculty Search Committee, School of Computer Science, University of Oklahoma, (1994

- 1995).

Acting Director, CENSIPCOM, Center for Signal Processing and Communications, Feb. 1994 -

May 1994.

Chair, Dept. of Electrical & Computer Engineering, Concordia University, Montreal, June 1993 -

May 1994.

Member, Engineering and Computer Science Faculty Executive Committee, Concordia

University, June 1993 - May 1994.

Member, FRDP Evaluation Committee, Concordia University, Montreal, 1994.

Member, Senate Research Committee, Sept. 1992 - May 1994.

Member, Engineering and Computer Science Faculty Council, 1991 - May 1994.

Chair, Intensive Courses Committee, GRIAO, Montreal.

Member, Executive Committee, and a founding member of GRIAO, Inter University Research

Center in High Performance Architectures and VLSI, (1990 - May, 1993).

Member, Office of the Research Services Review Committee, (1991 - 1992).

Member, Senate Academic Services Committee, (1989 - 1990, 1991 - 1992).

Chair, Engineering and Computer Science Graduate Studies Committee, Concordia University,

Montreal, (1989 - 1991).

Chair, Graduate Curriculum Revision Committee, Department of Electrical and Computer

Engineering, Concordia University, Montreal, (1986 - 1987).

Graduate Program Director, Department of Electrical and Computer Engineering, Concordia

University, Montreal, (1986 - 1988).

Member, Engineering and Computer Science Graduate Studies Committee, Concordia University, Montreal, (1986 - 1988).

Member, ECFC, Concordia University, Montreal, (1983 - 1985).

Member, Search Committee for Computer Science Chair, Concordia University, Montreal, (Sept.

1983 - Jan. 1984).

Member, Search Committee for Computer Science Chair, Concordia University, Montreal, (Sept.,

1982 - Feb., 1983).

Member, Senate of the Indian Institute of Tech., Madras, India, (1974 - 1981).

Coordinator, Computer Science Graduate Program, (Admissions, Course Scheduling, Project,

Summer Training, Seminars, etc.,) I.I.T. Madras, (1973 - 1981).

Member, Undergraduate Curriculum Committee, I.I.T., Madras, India, (1976 - 1978).

Seminar Coordinator, Department of Electrical Engineering, India Institute of Tech., Madras,

(1968 - 1970).

LIST OF JOURNAL AND SELECTED CONFERENCE PUBLICATIONS:

The following publications cover research topics listed below.

Fault Diagnosis and Diagnosability System Level Diagnosis: Graph Models and Centralized Algorithms.

Probabilistic Diagnosis and VLSI Testing.

Distributed Diagnosis and Network Monitoring.

Fault Tolerant Routing.

Telecommunication Networks.

QoS Path(s) Selection Protection and Restoration in Optical Networks.

Communication Protocol Testing.

Alarm Placement and Vertex Identification in Sensor Networks.

Abstraction for Virtual Private Networks. Communication Network Planning.

Fault Tolerant Graphical Design and Extremal Problems.

Design of Graphs for Fault Tolerance.

Extremal Graphs Problems.

Parallel and Distributed Computing/Architectures.

Depth First Search.

Shortest Paths.

Synchronizer Design.

Minimum Cost Flows.

Graph Partitioning.

VLSI Physical Design

Routing. Parallel

CAD.

Meta Heuristics for Combinatorial Optimization

Simulated Annealing. Tabu Search.

Genetic Algorithms.

Cooperative Search.

Planar Graphs.

Planar Embedding.

Planarization.

Reachability on Marked Graphs.

Maximum Weight Markings.

Submarking Reachability.

Optimum Firing Sequences.

0-1 Marked Graphs.

Graph Isomorphism/Coding.

Counting and Enumeration.

Analysis of Char's Spanning Tree Enumeration Algorithm.

Spanning Tree Counting.

Similarity of Graphs.

Mathematical Theory of Multiport Resistance Networks.

Graphs, Vector Space, and Electrical Circuits.

Graphs and Vector Spaces. A-Matrix Realization.

Active Networks.

Sensitivity Invariants.

NOTE: Conference papers published later as journal papers are not listed

separately.

Krishnaiyan Thulasiraman, Muhammad Javed and Guoliang (Larry) Xue,

"Primal Meets Dual: A Generalized Theory of Logical Topology

Survivability in IP-over-WDM Optical Networks", Second International

Conference on Communication Systems and Networks, Bangalore,

India , Jan. 2010.

Krishnaiyan Thulasiraman, Muhammad Javed, Tachun Lin and Guoliang

(Larry) Xue, "Logical Topology Augmentation for Guaranteed Survivability

under Multiple Failures in IP-over-WDM Optical Networks", IEEE ANTS

2009, New Delhi, India, Dec. 2009.

Ravishankar Ravindran, Changcheng Huang and Krishnaiyan Thulasiraman,

"VPN Topology Abstraction Service using Centralized Core Capacity

Sharing Scheme", IEEE ANTS 2009, Dec. 2009.

Krishnaiyan Thulasiraman, "Duality in Graphs and Logical Topology

Survivability in Layered Networks" India-Taiwan Conference on Discrete

Mathematics, NTU, Nov. 2009.

Min Xu, K. Thulasiraman and Xiao Dong Hu, “Conditional Diagnosability

of Matching Composition Networks Under the PMC Model” IEEE

Transactions on Circuits and Systems, Part: Brief, December 2009.

Krishnaiyan Thulasiraman, Muhammad Javed and Guoliang (Larry) Xue,

"Circuits/Cutsets Duality and a Unified Algorithmic Framework for

Survivable Logical Topology Design in IP-over-WDM Optical Networks",

INFOCOM 2009, April 2009.

Guoliang Xue, Weiyi Zhang, Jian Tang and Krishnaiya Thulasiraman,"Polynomial

Time Approximation Algorithms for Multi-Constrained QoS Routing", IEEE/ACM

Transactions on Networking, June 2008, pp.656-669.

Weiyi Zhang, Guoliang Xue, Jian Tang and Krishnaiyan Thulasiraman,"Faster

Algorithms for Constructing Recovery Trees Enhancing QoP and QoS",

IEEE/ACM Transactions on Networking , June 2008, pp.642-655.

Muhammad Javed, Krishnaiyan Thulasiraman and Guoliang (Larry) Xue,

"Logical Topology Design for IP-over-WDM Networks: A Hybrid Approach

for Minimum Protection Capacity", ICCCN, Aug. 2008.

Min Xu, Krishnaiyan Thulasiraman and Xiao-Dong Hu, “Identifying Codes

of Cycles of Odd orders” European Journal of Combinatorics, February

2008, pp.1717-1720

Muhammad Javed, Krishnaiyan Thulasiraman and Guoliang (Larry) Xue,

"Lightpaths Routing for Single Link Failure Survivability in IP-over-WDM

Networks", Journal Of Communication and Networks. Dec. 2007 9:394-

401.

Guoliang Xue, Weiyi Zhang, Tie Wang, and Krishnaiyan Thulasiraman ," On the

Partial path Protection Scheme for WDM Optical Networks and Polynomial Time Computability of Primary and Secondary Paths ", Journal of Industrial and

Management Optimization, Vol. 3, No. 4, Nov. 2007.

Ravi Ravindran, Changcheng Huang and Krishnaiyan Thulasiraman, “Managed

Dynamic VPN Service: Core Capacity Sharing Schemes for Improved VPN Performance” IEEE International Conference on Communications, 2007,

pp.211-216.

Dong Xiang, Kaiwei Li, Hideo Fujiwara and Krishnaiyan Thulasiraman,

“Constraining Transition Propagation for Low Power Scan Testing Using a

Two-Stage Scan Architecture”, IEEE Transactions on Circuits and

Systems, Part II: Briefs, May 2007, pp. 450-454.

Guoliang Xue, Arunabha Sen, Weiyi Zhang, Jian Tang, and Krishnaiyan

Thulasiraman, "Finding a path subject to many additive QoS constraints"

IEEE/ACM Transactions on Networking, Vol. 15, February, 2007, pp.201- 211.

K. Thulairaman, Min Xu, Ying Xiao and Xiaodong Hu, "Vertex Identifying Codes for Fault Isolation in Communication Networks", Proceedings of the International

Conference on Discrete Mathematics and Applications (ICDM 2006),

Bangalore, December 2006.

Muhammad Javed, Krishnaiyan Thulasiraman, Matthew Gaines and Guoliang Xue,

"Survivability Aware Routing of Logical Topologies: On Thiran-Kurant Approach,

Evaluation and Enhancements", IEEE Globecom 2006.

Guoliang Xue, Weiyi Zhang, Jian Tang, and Krishnaiyan Thulasiraman, "An

Improved Algorithm for Optimal Lightpath Establishment on a Tree Topology",

IEEE Journal of Selected Areas in Communication- Optical Communication

Networks (IEEE JSAC-OCN), Vol.24, August 2006, pp.45-56.

Ying Xiao, Krishnaiyan Thulasiraman and Guoliang Xue, "QoS Routing in

Communication Networks: Approximation Algorithms Based on the Primal

Simplex Method of Linear Programming", IEEE Transactions on Computers,

July 2006. Also in Ying Xiao, K.Thulasiraman and Guoliang Xue, "The Primal

Simplex Approach to the QoS Routing Problem", Proc. First International

Conference on Quality of Service in Heterogeneous Wired/Wireless Networks (QShine) 2004, pp. 120-129.

Ying Xiao, K. Thulasiraman and Guoliang Xue, "Constrained Shortest Link-

Disjoint Paths Selection: A Network Programming Based Approach",IEEE

Transactions in Circuits and Systems, Vol 53, May 2006, pp 1174-1187. Also, a

Preliminary Version in Proc. Allerton Conference on Communication,

Control and Computing, University of Illinois, Urabana Champaign, October

2004.

Guoliang Xue, Arunabha Sen, Weiyi Zhang, Jian Tang, and Krishnaiyan

Thulasiraman, "Finding a path subject to many additive QoS constraints" Accepted

by IEEE/ACM Transactions on Networking, 2006.

Ying Xiao, C. Hadjicostis, and K.Thulasiraman, "The d-Identifying Codes Problem for Vertex Identification in Graphs: Probablistic Analysis and an Approximation

Algorithm", Accepted for COCOON 2006 (12th Annual International

Computing and Combinatorics Conference), Taipei, August 2006.

Ravi S. Ravindran, C. Huang, K.Thulasiraman, "A Dynamic Managed VPN

Service: Architecture And Algorithms",Accepted for the ICC International

Conference on Communications 2006.

Ying Xiao, K. Thulasiraman and Guoliang Xue, “GEN-LARAC: A Generalized

Approach for the Constrained Shortest Path Problem Under Multiple Additive

Constraints”, Presented at ISAAC (International Symposium on Algorithms and Computation), Sanya, China, December 2005. Appeared in Springer Verlag

Lecture Notes in Computer Science Series (LNCS-3827).

Ying Xiao, K. Thulasiraman and Guoliang Xue, “The Constrained Shortest Path Problem: Algorithmic Approaches and an Algebraic Study with Generalization”

AKCE International Journal of Graphs and Combinatorics 2, No 2 pp. 63-86,

Nov 2005. Also, a Preliminary Version in Proc. Allerton Conference on

Communication, Control and Computing, University of Illinois, Urbana-

Champaign, October 2003.

Dong Xiang, Jia-Guang Sun, Jie Wu and Krishnaiyan Thulasiraman, “Fault

Tolerant Routing in Meshes/Tori Using Planarly Constructed Fault Blocks”, ICPP

2005, Oslo.

K. Thulasiraman, Ying Xiao and G. Guoliang Xue, “Recent Advances in QoS

Routing”, ISCAS 2005, Kobe, Japan.

Ravi Ravindran Changcheng Huang and K. Thulasiraman, “Topology Abstraction

as VPN Service”, ICC 2005, Seoul, May 2005.

G. Xue, W. Zhang, J. Tang and K. Thulasiraman, “Establishment of Survivable Connections in WDM Networks Using Partial Path Protection” ICC 2005.

Weiyi Zhang, Guoliang Xue, Jiang Tang and K. Thulasiraman, “Linear Time

Construction of Redundant Trees for Recovery Schemes Enhancing QoP and

QoS”, INFOCOM 2005, Miami, March 2005.

Ying Xiao, K. Thulasiraman and Guoliang Xue, "Approximation and Heuristic

Algorithms for Delay Constrained Paths Selection under Inaccurate State

Information", Proc. The First International Conference on Quality of Service in

Heterogeneous Wired/Wireless Networks (Qshine) 2004, Dallas, pp. 130-137.

Guoliang Xue, Li Chen and K. Thulasiraman, “Quality of Service and Quality of

Protection Issues in Preplanned recovery Schemes using Redundant Trees” IEEE

Journal of Selected Areas in Communication (JSAC), Vol.21, October 2003,

pp. 13432-1345. Also see Globecom 2002 and ICC 2002.

R. Ravindran and K. Thulasiraman, "QoS Routing in Communication Networks",

Proc. of CIT 2002 Orissa, India. pp. 191-202. See also R. Ravindran, K. Thulasiraman, G. Luo, K. Huang , A. Das and Guoliang Xue, “QoS Routing in

Communication Networks: Heuristics and Approximation Schemes with a

Comparative Performance Study”, Special Session on Computational Graph

Theory for Computer and Communication Systems at ISCAS, 2002.

Quyang, M. Toulouse, K. Thulasiraman, F. Glover, and J. S. Deogun, “MultiLevel

Cooperative Search for the Circuit/Hypergraph Partitioning Problem”, IEEE

Trans. on CAD of Integrated Circuits and Systems, vol.21, June 2002, pp. 685-693. See also M. Toulouse, K. Thulasiraman and F. Glover, “Multi-Level

Cooperative Search: A New Paradigm for Combinatorial Optimization and an

Application to Graph Partitioning", International European Parallel Processing

Conference, Vol. 1685, Lecture Notes in Computer Science, 1999, pp. 533-542.

Ming Shan Su and K.Thulasiraman, “A Scalable Online Multilevel Distributed

Network Fault Detection/Monitoring System Based on the SNMP Protocol”,

Proc.IEEE Globecom 2002.

Guoliang Xue and K. Thulasiraman, “Computing Shortest Network under a Fixed Topology” IEEE Transactions on Computers, Vol. 51, September 2002, pp.

1117-1120.

Ming Shan Su, “Multilevel Adaptive Distributed Diagnosis for Fault Location in a Network of Processors and Design of a Distributed Network Fault Detection

System Based on the SNMP Protocol”, Based on the Ph.D. thesis, School of

Computer Science, University of Oklahoma, December 2001. See also

Proceedings of the Allerton Conference on Communication, Control and

Computing, October 2001. See also K.Thulasiraman, Ming Shan Su and Vakul

Goel, “The Multilevel Paradigm for Distributed Fault Location in Networks with

Unreliable Processors”, ISCAS 2003, Thailand.

C. C. Lamb, L. S. DeBrunner, A. Das, and K. Thulasiraman, "Distributed

Diagnosis for Multiprocessor Systems using Extended Local Neighborhoods",

IEEE Midwest Symposium on Circuits and Systems, August 2000.

M. Toulouse, T. Crainic, and K. Thulasiraman, “Global Optimization Properties of

Parallel Cooperative Search Algorithms: A Simulation study”, Parallel

Computing, Vol. 26, 2000, pp. 91-92.

T. Ramalingom, A. Das and K. Thulasiraman, “A Matroid–Theoretic Solution to an

Assignment Problem in Communication Protocol Testing”, IEEE Trans. on

Computers, 49(4):317-330, April 2000.

Seth Noble, “Development and Testing of a New Transport Protocol for Multimedia Application”, Ph.D. thesis, School of Computer Science, University

of Oklahoma, 1999.

K. Thulasiraman, K. Huang, A. Das, and V. K. Agarwal, “Correct Diagnosis of Almost All Faulty Units in a Multiprocessor System", ISCAS 1999.

K. Huang, V.K. Agarwal and K. Thulasiraman, “Diagnosis of Clustered Faults and

Wafer Testing”, IEEE Trans. on IC/CAD, Vol. 17, Feb. 1998, pp. 136-148. See

also K. Huang, V.K. Agarwal and K. Thulasiraman, “Wafer Probing with Imperfect Comparison”, Proc. Intl. Symp. on Fault Tolerant Computing,

Boston, July 1992.

J. Opatrny, D. Sotteau, N. Srinivasan and K. Thulasiraman, “DCC Linear Congruential Graphs: A New Class of Interconnection Networks”, IEEE Trans.

Computers, Vol. 45, Feb. 1996, pp. 156-164.

S. Gao, and K. Thulasiraman, "An Improved Rectilinear Steiner Tree Algorithm for Terminals Located on a Convex Polygon".

M. Kaufmann, S. Gao, and K. Thulasiraman, "An Algorithm for Steiner Trees in

Grid Graphs and its Application to Homotopic Routing", Journal of Circuits,

Systems and Computers. Vol. 6, 1996, pp. 1-14.

J. Lienig and K. Thulasiraman, “GASBOR: A New Genetic Algorithm for Switch-

Box Routing in Integrated Circuits”, Journal of Circuits, Systems and

Computers. Vol. 6, 1996, pp. 356-373. See also J. Lienig and K. Thulasiraman,

“GASBOR: A Genetic Algorithm for Switch-Box Routing in Integrated Circuits”,

Proc. AI „94 Workshop on Evolutionary Computation, Armidale, Australia,

1994, pp. 199-212.

T. Ramalingom, K. Thulasiraman and A. Das, “Context Independent Unique State

Identification Sequences for Testing Communication Protocols Modeled as Extended Finite State Machines” Computer Communication, Vol. 18, No. 5,

1995, pp. 329-337.

A, Safir, B. Haroun, B. and K. Thulasiraman, "Floorplanning with Datapath Optimization", ISCAS Vol 1, May 1995 pp. 41 – 44

K. Huang, V. K. Agarwal and K. Thulasiraman, “A Diagnosis Algorithm for

Constant Degree Structures and Application to VLSI Circuit Testing”, IEEE

Trans. on Parallel and Distributed Systems, Vol. 6, April 1995, pp. 363-372.

R. P. Chalasani and K. Thulasiraman, “Parallel Computing for Network

Optimization: A Cluster Based Approach for the Dual Transshipment Problem”,

Proc. Seventh IEEE Symposium on Parallel and Distributed Processing, San

Antonio, 1995. pp. 66-73.

T. Ramalingam, K. Thulasiraman and A. Das, “On Testing and Diagnosis of

Communication Protocols Based on the FSM Model”, Computer

Communications, Vol. 18, No. 5, 1995, pp. 329-337.

T. Ramalingam, K. Thulasiraman and A. Das, “Fault Detection and Diagnosis

Capabilities of Test Selection Methods for FSM-Based Protocols”, Computer

Communications, Vol. 18, No. 2, 1995, pp. 113-122.

T. Ramalingam, A. Das and K. Thulasiraman, “A Unified Test Case Generation

Method for the EFSM Model using Context Independent UIO Sequences”,

Proceedings International Workshop on Protocol Test Systems, Evry, France,

September 1995, pp. 289-306.

S. Gao and K. Thulasiraman, “A Parallel Algorithm for Floorplanning with

Integrated Global Routing”, International Conference on High Performance

Computing, December 1995, pp. 457-462.

S. Khanna, S. Gao and K. Thulasiraman, “Parallel Hierachical Global Routing for

General Cell Layout”, Proceedings Fifth Great Lakes Symposium on VLSI,

1995, pp. 212-215.

R. P. Chalasani, K. Thulasiraman and M. A. Comeau, “Integrated VLSI Layout

Computation and Wire Balancing on a Shared Memory Multiprocessor:

Evaluation of a Parallel Algorithm”, Proc. International Symp. on Parallel

Architectures, Algorithms and Networks, (ISPAN), December, 1994,

Kanazawa, Japan, pp. 49-56.

Das, K. Thulasiraman and V. K. Agarwal, “Diagnosis of t/t+1-Dianosable Systems”, SIAM Journal on Computing, Vol. 23, October 1994, pp. 895-905.

T. Ramalingam, A. Das and K. Thulasiraman, “A Generalization of the Multiple

UIO-Sequence Method of Test Selection for FSM-Based Protocols”, International

Workshop on Protocol Test Systems, Tokyo, November 1994, pp. 209-224.

J. Lienig and K. Thulasiraman, “A Genetic Algorithm for Channel Routing in VLSI

Circuits”, Evolutionary Computation, Vol. 1, No. 4, 1994, pp. 293-331. Also see

Proc. Seventh Intl. Conf. on VLSI Design, Calcutta, January 1994, pp. 133-

136.

Safir, B. Haroun and K. Thulasiraman, “A Floorplanner Driven by Structural and

Timing Constraints”, Proc. IEEE Intl. Symp. Circuits and Systems, London,

May 1994.

M. K. Kaufmann, S. Gao and K. Thulasiraman, “On Steiner Minimal Trees in Grid Graphs and Its Application to VLSI Routing”, Proc. 5th Intl. Symposium on

Algorithms and Computations, 1994, pp. 351-359.

K. Thulasiraman, R. P. Chalasani, P. Thulasiraman and M. A. Comeau, “Parallel Network Primal-Dual Method on a Shared Memory Multiprocessor and A Unified

Approach to VLSI Layout Compaction and Wire Balancing”, Proc. IEEE VLSI

Design „93, Bombay, Jan. 1993.

Das, K. Thulasiraman, V. K. Agarwal and K. B. Lakshmanan, “Multiprocessor

Fault Diagnosis Under Local Constraints”, IEEE Trans. on Computers, Vol. 42,

No. 8, Aug. 1993, pp. 984-988. Also see A. Das, K. Thulasiraman, K. B.

Lakshmanan and V.K. Agarwal, "System Level Diagnosis with Local Constraints",

IEEE International Symp. on Circuits and Systems, Portland, Oregon, May

1989.

K. Thulasiraman, A. Das and V. K. Agrawal, “Distributed Fault Diagnosis of a Ring of Processors”, Parallel Processing Letters, Vol. 3, No. 2, 1993, pp. 195-

204

K. Thulasiraman, R. P. Chalasani and M. A. Comeau, “Parallel Network Dual Simplex Method on a Shared Memory Multiprocessor”, Proc. 5th IEEE Symp. on

Parallel and Distributed Processing, Dallas, December 1993, pp. 408-415.

K. Huang, A. Das, V. K. Agarwal and K. Thulasiraman, "A Class of 2-Step

Diagnosable Systems: Degree of Diagnosability and a Diagnosis Algorithm",

ISCAS 1992.

S. Srinivas, K. Thulasiraman and M.N.S. Swamy, “A MIN-based Reconfigurable

Architecture for de Bruijn Structures”, International Journal of High Speed

Electronics, Vol. 3, 1992, pp. 279-296.

Y. Zhao, L. Tao, K. Thulasiraman and M.N.S. Swamy, “Simulated Annealing and

Tabu Search Algorithms for Multiway Graph Partition”, Journal of Circuits,

Systems and Computers, Vol. 2, No. 2, 1992, pp. 159-185.

J. Lienig, K. Thulasiraman and M.N.S. Swamy, “Routing Algorithms for Multi-

Chip Modules”, Proc. European Design Automation Conf., Hamburg, 1992,

pp. 286-291.

Khasnabish, M. Ahmadi, M. Shridhar, and K. Thulasiraman, "A Naturally

Intelligent Lightwave Communication Network", GLOBECOM 1991 Phoenix,

AZ

Das, K. Thulasiraman and V. K. Agarwal, “Diagnosis of t/s-Diagnosable

Systems”, Journal of Circuits, Systems and Computers, Vol. 1, No. 4, 1991, pp.

353-371. See also 3rd Intl. Workshop on Graph-Theoretic Concepts in

Computer Science, June 1990.

V. Krishnamoorthy, K. Thulasiraman and M. N. S.Swamy, “Incremental Distance

and Diameter Sequences of a Graph: New Measures of Network Performance”,

IEEE Transactions on Computers, Vol.39, Feb. 1990, pp.230-237.

V. Krishnamoorthy, K. Thulasiraman and M. N. S. Swamy, “Minimum Order

Graphs with Specified Diameter, Connectivity and Regularity”, Networks

Journal, Vol. 19, 1989, pp. 24-46.

K. B. Lakshmanan, K. Thulasiraman and M. Comeau, “An Efficient Distributed

Protocol for the Single Source Shortest Path Problem In Networks with Negative

Weights”, IEEE Trans. on Software Engineering, Vol. 15, May 1989, pp. 639-

644.

R. Jayakumar, K. Thulasiraman and M. N. S. Swamy, “O(N2) Algorithms for

Graph Planarization”, IEEE Trans. on Computer-Aided Design of Integrated

Circuits and Systems, Vol. CAD-8, March, 1989, pp. 257-267.

R. Jayakumar, K. Thulasiraman and M. N. S. Swamy, “MOD-CHAR: An

Implementation of Char‟s Spanning Tree Enumeration Algorithm and its

Complexity Analysis”, IEEE Trans. on Circuits and Systems, Vol. CAS-36, Feb.

1989, pp. 219-228.

P. Rioux, B. T. Smith, and K. Thulasiraman, "A Simplex Solution to the Minimum

Cost Nonsimultaneous Multicommodity Flow Problem", Center for Research on

Transportation. Based on “Minimum Cost Sizing of Rearrangeable Networks with

Multiperiod Demands”, Ph.D. thesis, Electrical and Computer Engineering,

Concordia University, Montreal, Canada, Feb., 1988. (Co-supervisor: B.T.

Smith, Ecole Polytechnic, Montreal).

M. A .Comeau and K. Thulasiraman, “Structure of the Submarking Reachability

Problem and Network Programming”, IEEE Transactions on Circuits and

Systems, Vol. CAS-35, Jan. 1988, pp. 89-100. See also K. Thulasiraman and M. A. Comeau, “Structure of the Submarking Reachability Problem and Network

Programming”, Proc. IEEE Intl. Symp. on Circuits and Systems, Philadelphia,

May 1987.

K. Thulasiraman and M. A. Comeau, “Structure of a Reachability Problem for

(0,1) Capacitated Marked Graphs”, IEEE Trans. on Circuits and Systems, Vol.

CAS-34, April 1987, pp. 430-431.

K. Thulasiraman, R. Jayakumar and M. N. S. Swamy, “Planar Embedding: Linear-Time Algorithms for Vertex Placement and Edge Ordering”, IEEE Trans.

on Circuits and Systems, Vol. CAS-35, March 1988, pp. 334-344. Also see K.

Thulasiraman, R. Jayakumar and M. N. S. Swamy, “Planar Embedding: A Linear Time-Algorithm for Vertex Placement and Edge Ordering”, Proc. IEEE

Intl. Symp. on Circuits and Systems, San Jose, May 1986..

K. B. Lakshmanan and K. Thulasiraman, "On the Use of Synchronizers for Asynchronous Communication Networks", Workshop on Distributed Algorithms,

Amsterdam July 1987

Y. Kajitani, H. Miyayo, S. Ueno, and K. Thulasiraman, "On the Optimal

Synchronizer for Asynchronous Distributed Networks", Proc. Tech. Group on

CAS, IEICE, Nov 1988.

K. Thulasiraman and M. A. Comeau, “Maximum-Weight Markings in Marked

Graphs: Algorithms and Interpretations Based on the Simplex Method”, IEEE

Trans. on Circuits and Systems, Vol. CAS-34, December 1987, pp. 1535-

1545.Also see IEEE International Symposium on Circuits and Systems, Kyoto,

Japan, June 1985.

K. B. Lakshmanan, N. Meenakshi and K. Thulasiraman, “A Time-Optimal

Message-Efficient Distributed Algorithm for Depth-First Search”, Information

Processing Letters, Vol. 25, No. 2, May 1987, pp. 103-109.

M. A. Comeau, K. Thulasiraman and K. B. Lakshmanan, “An Efficient

Asynchronous Distributed Protocol to Test Feasibility of the Dual Transshipment

Problem”, 25th Allerton Conference on Communication, Control and

Computing, University of Illinois, Urbana- Campaign, September 1987.

K. Thulasiraman, R. Jayakumar and M. N. S. Swamy, “On Maximal Planarization

of Non-Planar Graphs”, IEEE Trans. on Circuits and Systems, Vol. CAS-33,

Aug. 1986, pp. 843- 844. Also see K. Thulasiraman, R. Jayakumar and M. N. S.

Swamy, “An Optimal Algorithm for Maximal Planarization of Non-Planar

Graphs”, Proc. IEEE Intl. Symp. on Circuits and Systems, San Jose, May

1986.

K. Thulasiraman, P. S. Reddy and M. G. G. Naidu, “Similarity of Graphs and

Enumeration of Distinct nth Order Symmetric Sign Patterns”, Canadian

Electrical Engineering Journal, Vol. 10, Jan. 1985, pp. 9-14. See also Proc.

IEEE Intl. Symp. on Circuits and Systems, Rome, 1983.

K. Thulasiraman, “On Description and Realization of Resistance n-port

Networks”, IEEE Trans. on Circuits and Systems, Vol. CAS-32, March 1985,

pp. 296-297.

R. Jayakumar, K. Thulasiraman and M. N. S. Swamy, “Complexity of Computation

of a Spanning Tree Enumeration Algorithm”, IEEE Transactions on Circuits and

Systems, Vol. CAS-31, October 1984,pp.853-860.Also see R. Jayakumar and K. Thulasiraman, “Analysis of a Spanning Tree Enumeration Algorithm”, Springer

Verlag Lecture Notes on Mathematics, Vol. 882, 1982, pp. 281-290.

M. A. Comeau and K. Thulasiraman, “Algorithms on Marked Directed Graphs”, Canadian Electrical Engg. Journal, Vol. 9, 1984, pp. 72-79. Also see Proc.

IEEE Intl. Symp. on Circuits and Systems, Newport Beach, May 1983.

K. Thulasiraman, R. Jayakumar and M. N. S. Swamy, “Graph Theoretic Proof of a

Network Theorem and Some Consequences”, Proc. IEEE, June 1983, pp. 771-

772.

K. Thulasiraman and M. A. Comeau, “On Determining a Computable Ordering of

a Digital Network”, Proc. IEEE, Vol. 71, November 1983, pp. 1323-1324.

K. Thulasiraman and M. N. S. Swamy, “A Theorem in the Theory of Determinants

and the Number of Spanning Trees of a Graph”, Canadian Electrical Engg.

Journal, Vol. 8, 1983, pp. 147-52.

P. K. Rajan and K. Thulasiraman, “On an Extremal Problem in Graph Theory and

Its Applications”, Proc. IEEE International Symposium on Circuits and

Systems, Tokyo, July 1979, pp. 445-448

K. Thulasiraman, M. N. S. Swamy and P. S. Reddy, “(N+P)-node Realizability of Y-Matrices of (N+1)-node Resistance Networks”, International Journal of

Circuit Theory and Applications, Vol. 6, 1978, pp. 253-263.

P. S. Reddy and K. Thulasiraman, “Synthesis of the K-Matrix of (N+3)-node

Resistive n-port Networks”, Z. Elektr. Inform. U. Energietechnik, Leipzig, 1978,

pp. 86-92.

M. G. G. Naidu, P. S. Reddy and K. Thulasiraman, “Continuously Equivalent

Realizations of 3rd-order Paramount Matrices”, International Journal of Circuit

Theory and Applications, Vol. 5, 1977, pp. 403-408.

M. G. G. Naidu, P. S. Reddy and K. Thulasiraman, “On the Number of

Conductances Required for Realizing Y and K Matrices”, International Journal

of Circuit Theory and Applications, Vol. 5, 1977, pp. 219-225.

K. N. Venkataraman and K. Thulasiraman, “An Algorithm for Coding Undirected

Graphs”, IEEE International Symposium on Information Theory, Cornell

University, August 1977.

M. G. G. Naidu, P. S. Reddy and K. Thulasiraman, “(n+2)-node Resistive n-port

Realizability of Y-Matrices”, IEEE Trans.on Circuits and Systems, Vol. CAS-

23, May 1976, pp. 254- 261.

M. G. G. Naidu, P. S. Reddy and K. Thulasiraman, “Synthesis of Resistive Networks from Third Order Paramount Matrices”, IEEE Trans.on Circuits and

Systems, Vol. CAS-22, Dec. 1975, pp. 937-943.

M. G. G. Naidu, K. Thulasiraman and M. N. S. Swamy, “The n-port Resistive Network Synthesis from Prescribed Sensitivity Coefficients”, IEEE Trans. On

Circuits and Systems, Vol. CAS-22, June 1975, pp. 482-485.

P. S. Reddy and K. Thulasiraman, “Analysis and Synthesis of the K and Y Matrices of Resistive n-port Networks”, Z. Elektri. Inform. U. Energietechnik, Leipzig 5,

1975, pp. 81-96.

P. K. Rajan and K. Thulasiraman, “K-Sets of a Graph and Vulnerability of

Communication Nets”, Matrix and Tensor Quarterly, 1974, pp.77-86.

P. K. Rajan and K.Thulasiraman, “ K-Sets of a Graph and Vulnerability of

Communication Nets”, Matrix and Tensor Quarterly, 1974, pp.63-66.

P. A. Ramamoorthy and K. Thulasiraman, "Active RC n-port Network Synthesis Using Nullators and Norators”, IEEE Trans. on Circuit Theory, Vol. CAS-21,

March 1974, pp. 206-209.

M. N. S. Swamy, C. Bhushan and K. Thulasiraman, “Sensitivity Invariants for

Linear Time- invariant Networks”, IEEE Trans. on Circuit Theory, Vol. CT-20,

January 1973, pp. 21-24.

P. A. Ramamoorthy, K. Sankar Rao and K. Thulasiraman, “Synthesis of Rational

Voltage Transfer Matrices Using Minimum Number of Capacitors with Operational Amplifiers”, Proc. IEEE International Symposium on Circuit

Theory, April 1973, pp. 294-297.

P. S. Reddy and K. Thulasiraman, “Synthesis of (n+2)-node Resistive n-Port Networks”, IEEE Trans. on Circuit Theory, Vol. CT-19, January 1972, pp. 20-

25. Also see K. Thulasiraman and P. S. Reddy, “Synthesis of (n+2)-node Resistive

n-port Networks”, Proc. IEEE International Symposium on Circuit Theory,

1970.

M. N. S. Swamy, C. Bhushan and K. Thulasiraman,“Sensitivity Invariants for

Nonlinear Networks”, IEEE Trans. on Circuit Theory, Vol. CT-19, November

1972, pp. 599-606..

M. N. S. Swamy, C. Bhushan and K. Thulasiraman,“Sensitivity Invariants for

Active Lumped/Distributed Networks”, Electronics Letters, January 1972, pp.

26-27. See also ISCAS 1972

M. N. S. Swamy, C. Bhushan and K. Thulasiraman, “Simple Sensitivity Formulas

in Terms of Immittance Parameters”, Electronics Letters, March 1972, pp. 153-

154.

M. N. S. Swamy and K. Thulasiraman, “Inverse of a Non-Singular Submatrix of a

Reduced Incidence Matrix”, Matrix and Tensor Quarterly, March 1972, pp.

106-108.

M. N. S. Swamy, C. Bhushan and K. Thulasiraman, “Bounds on the Sum of

Element Sensitivity Magnitudes for Network Functions”, IEEE Trans. on Circuit

Theory, Vol. CT-19, Sept. 1972, pp. 502-504. See also M. N. S. Swamy, C.

Bhushan and K. Thulasiraman, “Bounds on the Sum of Element Sensitivity Magnitudes for Network Function”, Proc. IEEE International Symposium on

Circuit Theory, 1972.

M. N. S. Swamy, and K. Thulasiraman, “A Sufficient Condition for the Synthesis of the K-Matrix of n-Port Networks”, IEEE Trans. on Circuit Theory, Vol. CT-19,

July 1972, pp. 378-380.

M. N. S. Swamy, and K. Thulasiraman, “Realization of the A-Matrix of RLC Networks”, IEEE Trans. on Circuit Theory, Vol. CT-19, Sept. 1972, pp. 515-

518. See also M. N. S. Swamy, and

K. Thulasiraman, “Realization of the A-matrix of RLC Networks”, Proc. IEEE

International Symposium on Circuit Theory, 1971.

K. Thulasiraman and M. N. S. Swamy, “Relationship Between Cutset and Node-

Pair Transformation Matrices”, Electronics Letters, May 1971, pp. 276-277.

K. Thulasiraman, and M. N. S. Swamy, “On a Theorem in Graph Theory”, Matrix

and Tensor Quarterly, September 1971, pp. 31-32.

K. Thulasiraman and M. N. S. Swamy. “Unimodular Property of Fundamental

Cutset and Circuit Matrices”, Matrix and Tensor Quarterly, December 1971,

pp. 65-67.

P. S. Reddy and K. Thulasiraman, “Synthesis of K-Matrix of (n+1)-node Resistive

n-port Networks”, Proc. Asilomar Conference on Circuits and Systems,

November pp. 588- 590, 1971. See also Proc. Asilomar Conference on Circuits

and Systems, 1971.

M. N. S. Swamy and K. Thulasiraman, “Synthesis of Multivariable Networks”,

Proc. Asilomar Conference on Circuits and Systems, November 1971, pp. 571-

575.

P. S. Reddy and K. Thulasiraman, “Synthesis of the K-matrix of an N-port Network

and its Application to Y-matrix Synthesis”, Proc. IEEE Intl. symp. on Circuit

Theory, 1970.

P. S. Reddy, V. G. K. Murti and K. Thulasiraman, “Realization of Modified Cut-

Set Matrix and Applications”, IEEE Trans. on Circuit Theory, Vol. CT-17,

November 1970, pp. 475-486. See also Proc. IEEE Intl. Symp. on Circuit

Theory, 1969.

K. Thulasiraman and V. G. K. Murti, “The Modified Circuit Matrix of an n-port

Network and its Applications”, IEEE Trans. on Circuit Theory, Vol. CT-16,

February 1969, pp. 2-7.

K. Thulasiraman and V. G. K. Murti, “Synthesis Application of the Modified Cutset

Matrix", Proc. IEE, London, Vol. 115, Sept. 1968, pp. 1269-1274.

K. Thulasiraman and V. G. K. Murti, “The Modified Cutset Matrix of an n-port

Network”, Proc. IEE London, Vol. 115, Sept. 1968, pp. 1263-1268. See also

Proc. International Symposium on Circuit Theory, 1968.

V. G. K. Murti and K. Thulasiraman, “Synthesis of a Class n-port Networks”,

IEEE Trans. on Circuit Theory, Vol. CT-15, March 1968, pp. 54-64.

Eswaran and K. Thulasiraman, “Synthesis of a Class of Resistive 3-port

Networks”, International Journal of Electronics, 1968 Vol 24 pp. 597-603.

K. Thulasiraman and V. G. K. Murti, “Pseudo-Series Combination of n-port

Networks”, Proc. IEEE, Vol. 56, June 1968, pp. 1143-1144

K. Thulasiraman and V. G. K. Murti, “Parallel Connection of n-port Networks”,

Proc. IEEE, Vol. 55, July 1967, pp. 1216-1217.

K. Thulasiraman and V. G. K. Murti, “Comments on „On Equivalence of Resistive

n-Port Networks"”, IEEE Trans. on Circuit Theory, Vol. CT-14, September

1967, pp. 357-359.

S. Srinivasan, V. N. Sujeer and K. Thulasiraman, “Application of Equivalence

Technique in Linear Graph Theory to Restoration Process in a Power System”,

Journal of the Institution of Engineers, (India), Vol. XLVII, No. 10, June 1967,

pp. 526-543.

S. Srinivasan, V. N. Sujeer and K. Thulasiraman, “Application of Equivalence

Technique in Linear Graph Theory to Reduction Process in a Power System”,

Journal of the Institution of Engineers, (India), vol. XLVI, No. 12 June 1966,

pp. 528-549

BOOK REVIEWS:

“GRAPHS, NETWORKS AND ALGORITHMS” BY M. N. S. SWAMY AND

K. THULASIRAMAN WILEY INTERSCIENCE, 1981.

Review # 1

George J. Minty,

Mathematics Department Indiana University.

Review 1. Personal Communication:

Mathematics Department Indiana University

April 19, 1986

Professors

M. N. S. Swamy and

K. Thulasiraman

c/o Prof. M. N. S. Swamy

Dean of

Engineering and Computer Science

Concordia University

Montreal, Canada

Gentlemen,

The recent profusion of books on Graph Theory has been such that I do not make a strong effort to look

into each and every one of them when it appears. Most of them seem motivated by the thought "If there's

any mathematics course that should appeal to the Computer Science students, Graph Theory is it; so there

should be money in writing an 'Elementary Graph Theory' book. Since my book will be Elementary, I can

write my book by the cut,- and-paste method out of the books I learned the subject from." I do not enjoy

seeing new books of this kind coming onto the market.

It was therefore for me a very distinct pleasure when I ran across your book Graphs, Networks and

Algorithms the other day, a book of fine scholarship, well-informed on recent developments in the

subject whose exposition is of such good quality that it could also serve as a "beginners' text". It is

also a surprise to see such a book written by a couple of engineers. (The usual failing of engineers as

authors in mathematics is that they are unable to distinguish the mathematics from the physics--they think

of an "electrical current distribution" as a laboratory concept and of Kirchhoff's Laws as "experimental

facts " , blinded to the idea that a current can also be "defined " and Kirchhoff' s laws taken as "axioms"--a

very necessary approach in order that one can see electrical network theory as mathematics which has

applications going beyond electrical networks themselves!).

Let me congratulate you on a very fine job of scholarship and writing. I sincerely hope your book

enjoys the popularity it deserves. I am learning something by reading it--for example, I have always

seen the "Theorem of the Greedy Algorithm" mentioned in connection with the names of Rado and

Edmonds, and had not realized that Gale and Welsh were also early discoverers of it.

I have a couple of (very minor) criticisms which touch on your treatment of my own work.

(1) Despite your obvious slant toward applications to electrical network theory, you have missed a great opportunity to point out the usefulness of some of the material in the context of "nonlinear networks". My

paper "Solving Steady State Nonlinear Networks of 'Monotone' Elements" (I.R.E. Transactions on Circuit

theory, Vol.CT-8, pp.99-104)is easily accessible to the general reader, and its material has been presented

in standard works ( e .g., Berge and Ghouila-Houri, "Programming , Games and Transportation Networks" ,

Berge's "Graphs and Hypergraphs", Lawler's book which is well known to you, and Rockafellar's "Network

Flows and Monotropic Optimization".) It seems a pity that you missed an opportunity to mention it.

You mention the book of Ford & Fulkerson as the "standard work" on a certain subject. It is by now quite

obsolete; the above mentioned book of Rockafellar covers the subject far better (at least, from my point of

view).

The "no-gain property of resistive networks", attributed by you to Wolaver 1970 (who apparently saw it in the context of linear networks) is in fact also valid for networks of nonlinear (monotone) resistances. For

the case of a single current-source or voltage-source it appears in my 1960 paper "Monotone Networks"

(Proc. Royal Society of London vol. A257, pp. 194-208), and the multi-source theorems are rather obvious

to those who understand the method of proof given there (which is, to be sure, not as easy as Wolaver’s

method).

A sidelight on this subject which you may find of interest, although it is not directly relevant to your book,

is that my work on nonlinear electrical networks of 1960-61 was the direct inspiration for the "Method of

Monotone Operators", lately enormously popular in the area of Nonlinear Functional Analysis (with

applications to nonlinear partial differential equations, nonlinear integral equations, etc.) For a reference,

see: Some Topics in Nonlinear Functional Analysis, by Mohan C. Joshi and Ramendara K. Bose, Wiley/Halstead Press 1985, Chapter 3 ( particularly, p.40).

Please do not regard the above "criticisms" as serious ones. On the whole, I find your scholarship

absolutely remarkable.

Very sincerely yours,

Sd.

(Prof.) George J. Minty

P.S. to Prof. Swamy: I have enclosed a copy of this 1etter for Prof. Thulasiraman. I think it will be more

certain of reaching him if you would enclose it with your next correspondence with him.

Yet another postscript: I think the first publication pointing out the probable applicability of matroid theory

to problems of electrical network synthesis was mine--see "On the Duality Principle of Electrical Network

Theory" in P. Rosenstiehl (ed.), Theorie de Graphes (proceedings of a meeting held in Rome, Italy), Dunod

(Paris) and Gordon & Breach (U.S.), 1967. I am happy to say that I was probably the instrument of

introducing both Lawler and Weinberg to Matroid Theory. (In 1960-64, they were professors of Electrical

Engineering at the University of Michigan, while I was in the Mathematics Department there.)

Review # 2

Basil R. Myers,

Proceeding of the IEEE, vol. 70, no. 7, pp. 781-782, July 1982. Reprinted from IEEE Circuits and Systems Magazine, vol. 4, no. 2, June 1982.

Graphs, Networks, and Algorithms – M.N.S. Swamy and K. Thulasiraman (New York: Wiley, 1981, 592

pp.) Reviewed by Basil R. Myers, Department of Electrical Engineering, University of Maine, Orono, ME

00469.

This substantial book is broken up as follows: Part I - chapters 1-10, 300 pp.-graph theory; Part II - chapters 11-13 – electrical network theory; Part III – chapters 14-15, 153 pp. – algorithmic theory.

Part I gives a broader, more aesthetic introduction to the theory of finite graphs than is usually

found in textbooks which, like this one, include electrical engineers among their intended readers.

Part I constitutes an admirable textbook in itself on finite graph theory, which should be acceptable

to the purist as well as the reader who is not. As noted by the authors in their preface, it includes

presentation (along classical, well-developed lines) on trees, Hamiltonian and Euler graphs, planarity,

connectivity, matching and coloring, and an introduction to the rapidly expanding theory of matroids and

its applications to electrical network theory and combinational optimization problems. Part I is

particularly easy to read, understand, and absorb. Hence, it can be highly recommended as course

material for students and as a personal library reference source for those who have any interest in or

curiosity about graph theory and its application to electrical engineering and computer science.

1. Notation is standard, and the authors do a superb job of blending engineering terminology

with the mathematics, without blemish to the mathematics, when called for in reference to

applications. At the outset in chapter 1, for example, they have defined the engineering term

“short-circuiting” or “identifying” in graph-theoretic term, as an operation on a graph, thus

eliminating the sort of fuzziness that can arise in thinking of such an operation in physical

terms. The text is not flawless; for example the authors’ definition of a circuits, p. 10, allows

circuits of order 1 (that is, trivial graphs with one edge) and 2 (that is, two parallel edges), whereas

it is generally more convenient and more often the case to restrict the order of a circuit to be at

least 3.

2. Each chapter in this book ends in a section which recommends articles and topics for further

reading and study, followed by a wealth of exercises and a list of both the important classical

references and those of recent years which dictate the present state of the art. The exercises

generally range in difficulty and challenge from the routine to those that are anything but. The

authors have also used some of the exercises very effectively as vehicles to introduce further

concepts or results not discussed in the text. For example, the concepts of a traversal matroid, a

Fano matroid, and a gammoid are all introduced in chapter 10’s exercises, rather than in the text.

3. A hypercritic might complain that there is no treatment of probabilistic graphs in the book, and

that Ramsey’s name is noticeably absent from the list of references. Many of the results from

Ramsey’s theory are, in fact, interspersed through out the book, and so this reviewer does not find

that the book is of less consequence because of such omission.

Part II is a concise presentation of classical, basic electrical network theory which every serious

student of circuits and systems should have at his fingertips. Topics include the application of the

principal partition of a graph to mixed-variable analysis, the no-gain property of resistance networks,

realization of circuit and cutset matrices of resistance networks, topological (graph-theoretic) formulas for

network functions, and Tellegen’s important theorem and the beauty of its application to the computation

of network sensitivities. This material will be perhaps the least stirring of the three parts of the book to

those who do not have much interest in or passion for electrical network theory, more so because it is

unavoidably heavy on matrix theory. This material does, however, bring out the beauty of the well-

known matrix-tree theorem of graph theory in facilitating the derivation of network functions. The

authors have noted in their preface that “Tellegen‟s theorem … is essentially graph-theoretic in

nature, …. It is surprising that such an important theorem lay dormant for so many years ….”

Part III, algorithmic graph theory, though only two chapters, constitutes an important feature of this

book, and is what makes it different from others which deal with graph theory and its applications. This material is of primary interest to the computer scientist. But today’s practical problems are generally

complex; when formulated on a graph-theoretic basis, the extraction of useful solutions depends upon the

efficiency of the computer algorithms used to obtain them. Thus, this material is requisite to the

background of those concerned with applications, and therefore very much a part of the compass of

this book.

As stated in the preface, chapter 14 is given to algorithms for the analysis of graphs and chapter 15 to

optimization problems. Topics include algorithms for reducibility of flow graphs, dominators, shortest

paths, matchings, optimum binary search trees, network flows, optimum branchings, Hopcroft and Karp’s

analysis of a bipartite matching algorithm, and Edmonds and Karp’s analysis of Ford and Fulkerson’s

labeling algorithm.

The authors’ comment, again in the preface, that “A major omission from this book is a discussion of NP-

complete problems. However, this topic is beyond the scope of this book,” should not bother anyone.

Indeed, this comment is adequately compensated for a brief discussion of NP-completeness in the section.

“Further reading,” at the end of chapter 14.

The material in the two chapters of Part III is supported and supplemented by an extensive and up-to-date

list of references; the reader should find the exercises at the end of each chapter anything but disappointing.

This is a very readable, valuable, and authoritative book, which encompasses a wealth of much-

needed material. The authors are clearly masters of their respective technical arts and have a unique

ability and effectiveness in communicating that mastery to others through the written work.

Review # 3

Earl Glen Whitehead, Jr,

SIAM Review, January 1983

Graphs, Networks and Algorithms by M.N.S.Swamy and K.Thulasiraman, John-Wiley,

New York, 1981, xviii+592 pp. 37.50.

This book is composed of three parts, as suggested by title. Each of these parts could have been a book

by itself. I prefer to think of this work as being a merger of three books. Because of the vast amount of

material, it would take two or three semesters to teach most of the topics covered. This first part is Graph

Theory. This part contains a through discussion of most of the topics usually covered in a graph theory text.

(Emphasis is placed on those topics which will be applied in the second and third parts. There are ten chapters in the first part: they are titled Basic Concepts, Trees, Cutsets and Circuits, Eulerian and

Hamiltonian Graphs, Graphs and Vector Spaces, Directed Graphs, Matrices of a Graph, Planarity and

Duality, Connectivity and Matching, Covering and Coloring and Matroids. There is an excellent

discussion of 1-isomorphism and 2-isomorphism of graphs. This isomorphism discussion is the best

that I have found in the many graph theory texts that I have read. Duality is presented in such a way

that the reader sees its importance to electrical network theory from the outset. There is an excellent

discussion of how to construct a graph (if such a graph exists) having a specified degree sequence.

The chapter titled matroid is the best chapter on matroids that I have found in any book.

The second part of the book is Electrical Network Theory. There are three chapters in this part: they are

titled Graphs and Networks, Resistance N-Port Networks, and Network Functions and Network Sensitivity.

I feel that the reader would need at least an undergraduate background in electrical engineering to be able to understand most of the material in this part. I do not have this background; I obtained very little from

reading this part. From what I understood, the authors were developing electrical network theory by

applying some of the theorems of graph theory presented in the first part of this book. One of my electrical

engineering friends pointed out that the chapter on n-port networks is the most difficult chapter of the three

chapters on electrical networks.

The third of the book is Algorithmic Graph Theory. There are two chapters in this part: they are titled

Algorithmic Analysis and Algorithmic Optimization. On page 427, the authors make the following

observation: “Graphs which arise in the study of real-life problems are very large and complicated.

Analysis of such graphs in an efficient manner, therefore, involves the design of efficient computer

algorithms.” Algorithms considered in this part of the book include algorithms for constructing the transitive closure of a directed graph, finding a transitive orientation (if it exists) of an undirected graph,

depth-first searching in both undirected and directed graphs, determining biconnected components of an

undirected graph, determining strongly connected components of a directed graph, studying certain aspects

of program graphs, determining shortest paths in weighted graphs, finding maximal matchings in graphs,

and finding a maximal flow in a transport network. On p.569, the authors list 14 algorithm topics for further

study. Each of the 15 chapters in the book ends with a list of many references. For example, the

Algorithmic Optimization chapter has 108 references. These numerous references make it possible

to further explore topics which interest the reader.

In conclusion, I found that reading this book from cover to cover took a very long time. The authors

packed a lot of information into it. The first part of this book is acceptable to a wide audience. The

second and third parts of this book are accessible to experts, namely, electrical engineers and

computer scientists, respectively.

Review # 4

Narsingh Deo,

Mathematical Reviews 1982.

Review of J605 305

XT138's L

Swamy, M. N. S. and Thulasiraman, K.

Graphs, networks, and algorithms.

John Wiley & Sons, Inc.

New York, NY, 1981.

Classification: O 5 C 99 , 94 C 15 IX+592 pp. $37.50

ISBN: 0-47-03503-3

REVIEWER: Narsingh Deo (Pullman,

Wash.)

263

Starting with Gustav Kirchhoff, electrical engineers have been responsible for a great deal of

research in graph theory and for enhancing its popularity in and out of the classroom. One of the

earliest English textbooks in graph theory (with emphasis on applications to electrical networks) was

written by two electrical engineers -Sundaram Seshu and Myril Reed (Linear Graphs and Electrical

Networks, Addison-Wesley, 1961). In the intervening 20 years, an impressive amount of work has been

done in applied graph theory, not only by electrical engineers but also by researchers in computer science

and operations research. A substantial portion of the activity of the past two decades has been in

algorithmic graph theory, which is a direct outcome of the widespread availability of the computer.

This book, written by two professors of electrical engineering and computer science, describes in a lucid

and clear-cut fashion the theory of finite graphs and its "natural" and immediate applications to the study of electrical networks. It is organized into three parts. Part I provides an introductory treatment of the most

basic graph-theoretic concepts: trees, paths, cutsets and cycles, Eulerian and Hamiltonian graphs; matrices

and vector spaces associated with graphs; planarity and duality; coloring, covering, matching, and

connectivity. There is also a chapter on matroids and their relationship to greedy algorithm. It is unusual

and refreshing to see an entire chapter on matroids in a book of this type. With only a small amount

of additional effort, matroids provide a good deal of insight into networks. Part I (consisting of the

first 300 pages) provides the theoretical foundation for the later parts.

Part II demonstrates the role of graph theory as an important analytical tool in the study of electrical

networks. It includes sections on the principal partition of a graph; a proof of the no-gain property of

resistance networks; several results in the theory of resistance networks; and a network for realizing cutset and circuit matrices. The conc1uding chapter in this part develops topological formulas for network

functions and Tellegen's theorem, together with its application to computing network sensitivity. This

reviewer was pleased to see that the authors included Tellegen's theorem --the graph-theoretic

significance of which is often missed by many.

The third part of the book highlights computational aspects of graph-theoretic problems. It consists of two

chapters --one on algorithmic analysis and one on algorithmic optimization. Among the algorithms

presented are those for flow graph reducibility, dominators, shortest paths, matchings, optimum binary

search trees, network flows and optimum branchings. A comment on the style of describing the algorithms:

it is this reviewer's opinion that a structured Algol/Pascal-like style of presenting the f1ow-charts- would

have been more readable and easier to implement and analyze, than the classical step-by-step presentation

used in these two chapters.

It would have been of general interest to many readers to see a brief explanation of the notion of NP-

completeness, chiefly because of its central importance to the concept of an "efficient" algorithm. Although

the authors have mentioned in the preface that this was beyond the scope of the book, this reviewer does

not see why a brief treatment of NP-completeness should be beyond the scope of a complete and a

reasonably advanced-level textbook such as this.

Each chapter is well laid out and contains a set of problems. It also includes a remarkably complete set

of references. Since the number of references is so large, the authors have wisely included a section in

each chapter to guide the reader through a selected subset of the references. The book has a subject

index and an author index --both are done well. The book is attractively printed and appears to be largely

free of misprints.

To conclude, Graphs, Networks and Algorithms is a valuable contribution because of its clear-cut

exposition of graph-theoretical results together with its description of the applications of these results

in electrical networks and computer science. It can serve as an excellent introductory textbook as

well as a useful reference book for electrical engineers, computer scientists and operations

researchers.