jan24-26, 2008bnm2008 atami, japan1 belle upgrade: tracking and vertexing t.kawasaki(niigata-u)

Jan24-26, 2008 BNM2008 Atami, Japan 1

Belle upgrade:Tracking and Vertexing

T.Kawasaki(Niigata-U)


Introduction• High luminosity B factory

– High precision measurement with high statistics to search the new physics in B decays

• Many modes which are sensitive to new physics need– High Hermeticity – Good efficiency on Low momentum & Ks daughter tracking,

DB

KB

KKKKKB

S

SSS

,,

,,00

000 (tCPV)(tCPV)

Ks vertexing

Hermeticity


Requirements for sBelle Tracker

• Robust against high beam background

• We assume ×20 BG @2×1035

• Occ ~8% @the first layer of Belle SVD(r=2cm)• Fine segmentation• Fast pulse shaping & time slice information

• High trigger rate• Need high speed & deadtime free readout

• More tracking efficiency– Hermeticity– Shallow angle tracking. Low momentum tracking– Ks reconstruction

• Better Resolution (At least competitive performance as current SVD)– Thin sensor ( refer the next talk for material effect)⇒– Small BP radius

Belle SVD Hit finding eff. vs. Occ.

Occupancy

15%

By Fujiyama(TIT)


Super Belle detector (LoI ‘04)

SC solenoid1.5T

New readout and computing systems

Aerogel Cherenkov counter + TOF counter

/ KL detection 14/15 lyr. RPC+Fe tile scintillator

CsI(Tl) 16X0 pure CsI (endcap)

“TOP” + RICH

Tracking + dE/dx small cell + He/C2H6remove inner lyrs.

use fast gas

Si vtx. det. 4 lyr. DSSD 2 pixel/striplet lyrs. + 4 lyr. DSSD


Super Belle Vertex Tracker(LoI ‘04)

(cm)

r =150mm

Aim 1cm radius beam pipe

(cm

)

Two thin pixel layer

Slanted layer to keep acceptance, optimize incident angle and save detector size

6 sensor layers to make low momentum tracking

17°


Upgrade Schedule

Stop Belle on the end of 2008 (JPY)

Start sBelle operation from the beginning of 2012

Along to the current upgrade schedule

We need REALISTIC upgrade plan for T=0 operation in 2012 ( with ~1035 )Further upgrade can be done after getting higher luminosity　　

2007 2008 2009 2010 2011 2012Stop Belle

Start sBelle

Reconstruction of detector takes 3 years⇒ 　 We have only 1 year for R&D work!!

KEKB&Belle upgradeR&D

（ 1cm beampipe, Thin Monolithic Pixel sensor …… needs further R&D work ）


Central Drift Chamber• Large cover area in radius

– 88~863 mm 　⇒ 172~1118 mm• Inner part replaced by Si Tracker

– 50 58 layers⇒• Small cell to reduce occupancy

– ⇒ 2.5mm– 8k ⇒ 　 15k sense wires

• Same gas mixture :He + C2H6

• Fast FADC readout

CDC

•Occupancy esitimation

–Hit rate : ~100kHz ~5kHz(current) x 20

–Maximum drift time : 80-300nsec Shorter than the current one

–Occupancy : 1-3% 100kHz X 80-300nsec = 0.01-0.03

•Momentum resolution(SVD+CDC)

Pt/Pt = (0.11~0.19)Pt 0.30/[%] :possible thanks to large cover in radius


Silicon Vertex Tracker• Occupancy estimation

– Assuming Occ Tp, channel area, 1/r∝ 2

– Current SVD VA1(Tp=800ns): ~8%@ 1st layer 　　　 L =2×1035 8% × 20BG = ⇒ 160%!

• Ex)APV25 (developed for CMS Si Tracker)– Tp=50ns Factor ⇒ 16 reduction is possible

Shaper

・ 160 pipeline FIFO

⇒ pulse shape scan with 40MHz Clk

• Further BG reduction is possible

by Pulse shape and timing information

•32 step FIFO as event queues

•Deadtime free readout@ 10kHz trigger rate

0 100 200 ns ⇒ Standard rectangle DSSD is OK


SVT upgrade Strategy

• T=0 option (2012) for L = ~1035 – Keep beampipe radius of 1.5cm same as current one– Current SVD configuration + 2 outer layers = 6layers

• Improve Ks efficiency. Replace CDC inner layers• Similar design DSSD can be used

– Fast Shaping(~50ns) + Timeslice on FE chip

• Further upgrade for L >1035

– Smaller beampipe radius (r =1cm or less)– Innermost (thin) Pixel layers

• Improve impact parameter resolution


Study on Detector configuration

CDC

SVDSVD

CDC

SVDSVD

SVD L1-L4 @ r = 2.0, 4.35, 7.0, 8.8 cmCDC r= 8.8 ~ 86.3cm

SVD Add L5&L6 @ r = (13), 14cmCDC r=16.0 ~ 112.0cm

Put 5&6 layer

Modify the current Belle simulator Use L4 ladder structure as L5&6 layer No sensor at forward region

Belle sBelle

Evaluate new detector configurationwith TRACKERR calculation & GEANT3 full simulation


Impact Parameter resolution

r-direction z directionCalculated by TRACKERR

Occupancy effects. Degradation of intrinsic resolution is included. Efficiency loss is NOT included

Beampipe radius is importantCompetitive performance as the current SVD

LoI ‘04sBelleSVD2(now)

For

0.2GeV 0.5GeV 1.0GeV 2.0GeV

sin0 1.4

0.02

0.01

[cm]

0.03[cm]


Momentum resolution

resolution resolutionCalculated by TRACKERR

Competitive performance as the current SVDMore layer doesn’t worsen momentum resolution

LoI ‘04sBelleSVD2(now)

For

0.2GeV 0.5GeV 1.0GeV 2.0GeV

sin0 1.4

0.02

0.01

[rad][/MeV]

0.3

0.1

Refer the next talk about a material effect


Ks reconstruction : 5th layer position

=0.68

Move 5th layer to outer

More Ks but poor B vtx resolution

Eff. Ks Ks Vtx resolution

)K(KB S* 00 GEANT3

Full simulationby Shinomiya(Osaka)

eff12sin

Ks

e- e+Beam profile

B vertex: Ks pseudo track+ Beam profile

Relative luminosity to measure Acp

Require SVD hitson 2 layers


Requirement on S/N ratio

Noise performance depends on FE chip

VA1 @ Tp = 1s

enc [e-]= 180+ 7.5/Cd[pF]

⇒ Leakage current dominates

APV25 @ Tp = 50ns

enc [e-]= 246 + 36/Cd[pF]

⇒Detector capacitance is crucial

・ Assuming signal=MIP@300m Si・ Noise determined by 　　　 Sensor Leakage current 　　　 Detector Capacitance

3DSSDs are readouted via FLEX ⇒Chain readout makes 　　　 large detector capacitance

3DSSDs:~60pF 　　 630e- 　 ⇒ 2500e-

sBelleBelle

(calculate Cd component only)


Effect of poor S/N ratio on the outer layers

M.E. (Matching Efficiency)

= Prob.(SVD hits are found on at least 2 SVD layers)

Noise

M.E.

All Layers Only 5&6 Layers

S/N degradation on the outer layer doesn’t affect to M.E. so much

CDCM.E.

SVT

Kalman filteringExtrapolate track from CDC

Noise 10 ×Typ.

10 ×Typ.

But, In case of Ks daughter track… 　

GEANT3Full sim.

Increase noise


r of Ks decay vertex

Matching efficiency for KsM

atch

ing

effi

cien

cy

Noise x 2

Noise x 4

normal

0

1.0

0 10 20 [cm]

SVD Matched track

r of Ks decay vertex

0 10 20 [cm]

SKB

M.E. for Ks daughters are affected by S/N degradationLose 20% (SVT) events with 4 times worse S/N

L3L4

L5

L3 L4 L5

Noise x 4normal

GEANT3Full simBy Nakagawa(Niigata)

Increase Noise on L5&L6 only


BG effect on physics analysis

• Major loss comes from low tracking efficiency for slow particles• Efficiency loss on high multiplicity event is serious

– Moreover a pulse shape information CDC by FADC readout can save efficiency– Gain by SVD standalone tracker is not included

B Eff Ratio-1

Nominal 56.8 % 0.0 %

×5 BG 56.0 % -1.5 %

×20 BG 49.0 % -13.8 %

With 40% shorter shaping

×20 BG 51.4 % -9.5 %

)()(/ SKJ )( 3KD,DDDD s***

B Eff Ratio-1

Nominal 6.48% 0.0 %

×5 BG 5.69% -12.2 %

×20 BG 2.28% -64.9 %

With 40% shorter shaping

×20 BG 3.86% -40.5 %

By Ozaki Preliminary

Total performance of CDC + SVD


Key technology for upgrade• Timeslice Information/Full Pipeline readout

– Pipeline in FE chip (APV25, VA-modified, own ASIC)

• Practical implementation scheme in a limited space– Ladder assembling. Mechanical Support structure– Cooling/Cabling scheme

• Save S/N for outer layer.– FLEX readout. Chip on sensor– Sensor development

• Low noise & Large area sensor is desirable• Thin (less material) Thick (more signal)

• Pixel sensor (Option for future upgrade) – Thin & Fast readout. Monolithic device?

No more HPK DSSD. Micron? SINTEF? New activities in India, Korea


Status of R&D Activity • We have been working to prepare Pipeline readout sensor module

Hybrid card with 4 APV25 chipsOperated with 40MHz clock (Princeton)

FADC: 40MHz digitizationOnline sparsification with FPGA

Confirm the capability of online sparsification algorithmThe result will come soon

Beamtest done in KEK in Nov 2007in KEK Fuji testbeam line 3GeV electron

(Vienna)


Chip on sensor with FLEX hybrid

Proposal by Vienna group

No Cooling Cooling with 13 water℃

Readout each DSSDby putting thinned FE chip on sensor

Cooling with water through carbon fiber tube (low material and good thermal

conduction)


Schedule for CDC/SVT upgrade

2007 2008 2009 2010 2011 2012Stop Belle Start sBelle

Design

NOT official one

CDC

SVT

Test

End Plate

Machining

Wire

strin

ging

Cosmic

Test

Installa

tion

&Final Test

Cablin

g/Tubing

Sensor ProductionDesign Test

Assemblin

g

Final Test

Installa

tion

R&D

R&D

Endring

&Beampipe


Summary

• We have started activity for the practical detector design for Belle upgrade– CDC

• Same gas mixture as Belle• Better resolution with larger coverage in radius• Reduce BG Occ. with small cell and time digitization

– SVT• R=1.5cm Beampipe + 6 DSSD layers• Employ Standard DSSD with short shaping (=50ns) for T=0• Competitive resolution as the current SVD• R&D of Pixel sensor should continue for the further upgrade

• Please join!! Any contributions are welcome!


Pixel sensor R&DItems to be achieved for High

luminosity B factory

1. Readout Speed2. Radiation Hardness3. Thin Detector4. Full-sized detector

・ MAPS is the unique solution.・ Development of MAPS (Monolithic Active Pixel sensor) 　 is in world wide competition (ex:CAPS(Hawaii), SOIPIX (KEK))・ It looks promising but needs more R&D for a few years Progresses in the coming a few years are very important.

20052.5mmx2.5mm 32x32 cells chip

2006 5mmx5mm 128x128 cells chip

SOIPIXKEK-OKI


Backups


Bkg & TRG rate in future

KEKB SuperB

Luminosity(1034cm-2sec-1)

~1 80

HER curr. (A)

LER curr. (A)vacuum (10-7Pa)

1.2

1.6

~1.5

4.1

9.4

5

Bkg increase - x 20

TRG rate (kHz)phys. origin

Bkg origin

0.40.2

0.2

1410

4Synchrotron radiationBeam-gas scattering (inc. intra-beam scattering)Radiative Bhabha

SVD CDC PID / ECL KLM

KEKBBkg

x10 Bkg

x20 Bkg


Hit rate

10KHz

Apr.-5th ,2005IHER = 1.24AILER = 1.7ALpeak = 1.5x1034cm-2sec-1

ICDC = 1mA

Main

Inner

Small cell


Simulation Study for Higher Beam Background

by K.Senyo.

MC +BGx1 MC+BGx20


Hit rate at layer 35 　410I**2 + 1400*I + 80

0

200

400

600

800

1000

1200

1400

1600

0 0.2 0.4 0.6 0.8 1

HER Beam Current(A)

Hit

rat

e(H

z)

740I**2 + 470*I + 80

0

500

1000

1500

2000

2500

3000

0 0.5 1 1.5 2

LER Beam Current(A)H

it R

ate

(Hz)

IHER = 4.1A Hit rate = 13kHzILER = 9.4A Hit rate = 70kHz

Dec., 2003 : ~5kHzNow : ~4kHz

Dec.,2003

In total 83kHz

HER LER


CDC : Main parameters

Present FutureRadius of inner boundary (mm) 77 160Radius of outer boundary (mm) 880 1140Radius of inner most sense wire (mm) 88 172Radius of outer most sense wire (mm) 863 1120Number of layers 50 58Number of total sense wires 8400 15104Effective radius of dE/dx measurement (mm) 752 978Gas He-C2H6 He-C2H6

Diameter of sense wire (m) 30 30


Intrinsic Resolution vs. Occupancy

Intrinsic Resolution

Occupancy

residual residual

occupancy < 0.04 occupancy 0.3

At high occupancy,

cluster shape is 'distorted'

reconstructed cluster energy to be off

the residual distribution to be widened

S.Fratina


Hit Efficiency vs. Occupancy

Layer1 Layer2

Layer3 Layer4

hit or not?

21

3 4

Layer No.

0% 30%Occupancy

1.0

0.6

Efficiency

Higher Occupancy ~ Lower Hit Efficiency

• Signal + background hitswider 'distorted' cluster

• Wrongly associated background cluster

Y.Fujiyama


Occupancy (%)

1

10

100

1000

0 2 4 6

Radius (cm)

SVD1(1usec)SVD2(500nsec)

Occupancy problem at innermost layer• Estimate occupancy at Super B

– Occupancy at SVD2• At most, 10% in r =20mm for 1034/cm2/s

– Assuming 　 Occ. = luminosity/r2

• r =15mm for 1035/cm2/s occupancy = 200%

Factor 40 of reduction is needed!!

• How can we reduce Occ.?– Assuming Occ. = sensitive area* shaping time – Short shaping time

• Tp=100ns is possible (Factor 8) (SVD2:VA1TA, Tp=800ns)

– Strip area should be small.• Area=pitch*length short strip• How to shorten a strip length by 1/5?

5%

L=1035/cm2/s

SVD2(800nsec)

Jan24-26, 2008 BNM2008 Atami, Japan 3470mm

Striplet design• To shorten strip length, we propose new

type of DSSD– Arrange strips in 45 degrees. Strip le

ngth is shortened– Small triangle dead region exists.

• About 7 % in Layer1

– Striplet can survive up to 2×1035/cm2

/s (1036 needs pixel type sensor!)

ZZ

rφrφ

Tp=50ns

Striplet

5%

Dead region

14mm

10mm

SVD2(800nsec)S-VTX(100nsec)

U

V


Prototype Striplet Sensor (HPK)2.

75m

m74.1mm

10.5

mm

8.5m

m

71.0 mm• Thickness:300m• Double sided

– P and N strips on N-bulk

– Incline strip by 45 degree.

– 1024 strips on each side

• Strip pitch = 51m in U-V direction.

(Pad spacing is 72m along sensor edge)

• Since sensor size is small, inactive region can’t be ignored

• How to reduce dead region• Check behavior near inactive

region carefully.


Scan strips with IR laser

Laser position[m]

Sig

nal

(n

orm

aliz

ed)

sum

Laser position[m]

Sig

nal

(n

orm

aliz

ed)

sum

scan

P-side N-side

• Results– Striplet detector is functional.

– No signal on the triangle part• The edge of active region is so s

harp.

End of active region


Matching efficiency Normal S/N

全層の S/Nを悪くしたとき

Noise x 5

Noise x 4


Ks vertex の分布


Ks イベントでの Matching efficiency の変化

Noise x 2

Noise x 4

normal

r of Ks vertex


normal Noise x 2 Noise x 4 Noise x 10


Mis-alignment effect• Large VTX tracker makes difficulty on alignment.

Red: Perfectly aligned

Blue: 10um, 0.1mrad

Green: 20um, 0.2mrad

Pink: 30um, 0.3mrad

Ks VTXResolution

Ks eff.

Mis-alignment doesn’t affect to efficiency


FLEX hybrid/Chip on sensor


22cm

46cm

Sensor Configuration Sensor Configuration (SVD1→SVD2)(SVD1→SVD2)

Z view

45cm


SVD2: Ladder StructureSVD2: Ladder Structure

DSSDFLEX

Hybrid

Rib

Bridge

Lyr # in z # in BW FW

1 1 1 6

2 2 1 12

3 3 2 18

4 3 3 18

• VA1TA chip• 4 VA1TAs on a hybrid • 4analog signals read out i

n parallel• 128 channels/chip• 4 mW/channel

Number of channel: 128ch × 4 chips ×2 hybrid(/z)×2 hybrids(F/B) ×(6+12+18+18) Ladders = 110,592 Analog signals


Readout with APV25 ASIC

• APV25 is chosen–Originally developed for CMS Silicon tracker

• Operated with 40MHz clock–192 stage pipeline (~4 µsec trigger latency)

–Up to 32 readout queues

–128 ch analog multiplexing (3 µsec@40 MHz)

–Dead time: negligible at expected trigger rate of 10 kHz

45ShaperInverterpreamp

192 stageAnalog Pipeline (4 µsec)

Analog output

Trigger

128 channel Multiplexer (3 µsec)

Noise= (246 + 36/pF) @50nsec

The silicon tracker development at KEK, Toru TSuboyama (KEK), 19 Dec. 2007 SILC meeting at Torino, Italy


Hit timing reconstruction

• B-Factory --> 2 nsec bunch crossing– APV25 deconvolution filter can not be used.

• Hit time reconstruction– Proposed by Vienna group– Read out 3, 6 … slices in the pipeline for one trigger.– Extract the hit timing information from wave form.

• Proven in beam tests: Resolution ~ 2 nsec.• Reconstruction done in the FPGA chips in FADC board.

46

(HEPHY Vienna)

ShaperTrigger

The silicon tracker development at KEK, Toru TSuboyama (KEK), 19 Dec. 2007 SILC meeting at Torino, Italy


Occupancy estimation

• Int res= x1.5(1.2) for 30%(10%) occupancy• Occupancy 　∝ 1/r2 × sensor aread• Hit efficiency loss is not considered. (-10% for 30% Occ)

L1 L2 L3 L4 L5 L6

x15BG

2x10^35

SVD310(%) 3 15 15 - -

SVD3mod10 3 1 1 <1 <1

SuperB<1 <1 3 1 <1 <1

x30BG

10^36

SVD320 6 30 30 - -

SVD3mod20 6 2 2 <1 <1

SuperB<1 <1 6 2 1 1

Assuming factor 3 for safety margin, in order to calculate helix resolution.

Assuming x15BG@2x10^35 , x30BG@10^36


dr resolution

New CDC conf.TRACKERR V2.18

dr resolutoin

SuperBSVD3modSVD3

For 0.2GeV 0.5GeV 1.0GeV 2.0GeV

dr


dz resolution

dz resolutoin

SuperBSVD3modSVD3


dz


resolution

phi resolutoin

SuperBSVD3modSVD3



tan resolution

tanl resolutoin

SuperBSVD3modSVD3


tan


resolution

kappa resolutoin

SuperBSVD3modSVD3


jan24-26, 2008bnm2008 atami, japan1 belle upgrade: tracking and vertexing t.kawasaki(niigata-u)

Documents