it_2012_semester_3_4_18072013
TRANSCRIPT
-
8/10/2019 it_2012_semester_3_4_18072013
1/20
By
Board of Studies Computer Science Engineering/ Information Technology / Computer Applications
-
8/10/2019 it_2012_semester_3_4_18072013
2/20
P
Third Semester
#The marks will be awarded on the basis of 04 we
Fourth Semester
Course Code Course Name
BTCS301 Computer Architecture
BTAM302 Mathematics III
BTCS302 Digital Circuits & Logic Design
BTCS303 Data Structures
BTCS304 Object Oriented Programming using C+
BTCS305 Data Structures Lab
BTCS306 Institutional Practical Training#
BTCS307 Digital Circuits & Logic Design Lab
BTCS308 Object Oriented Programming using C+
Course Code Course Name
BTCS401 Operating Systems
BTCS402 Discrete Structures
BTCS403 Computer Networks-I
BTCS404 Microprocessor& Assembly Language
Programming
BTCS405 System Programming
BTCS406 Operating System Lab
BTCS407 Computer Networks-I Lab
BTCS408 Microprocessor& Assembly Language
Programming Lab
BTCS409 System Programming Lab
General Fitness
un ab Technical University
B.Tech. I
Conta
ks Institutional Practical training conducted after 2nd sem
Cont
Load Allocation Marks Distribution
L T P Internal External
3 1 - 40 60
3 1 - 40 60
3 1 - 40 60
3 1 - 40 60
3 1 - 40 60
- - 4 30 20
- - - 60 40
- - 2 30 20
Lab - - 4 30 20
Total 15 5 10 350 400
Load Allocation Marks Distribution
L T P Internal External
3 1 - 40 60
3 1 - 40 60
3 1 - 40 60
3 1 - 40 60
3 1 - 40 60
- - 2 30 20
- - 4 30 20
- - 2 30 20
- - 2 30 20
100 -
Total 15 5 10 420 380
nformation Technology (IT)
Batch 2012
ct Hours: 30 Hrs.
ster
ct Hours: 30 Hrs.
Total
Marks
Credits
100 4
100 4
100 4
100 4
100 4
50 2
100 1
50 1
50 2
750 26
TotalMarks
Credits
100 4
100 4
100 4
100 4
100 4
50 1
50 2
50 1
50 1
100 -
800 25
-
8/10/2019 it_2012_semester_3_4_18072013
3/20
P
Third
un ab Technical University
B.Tech. I
Semester
nformation Technology (IT)
Batch 2012
-
8/10/2019 it_2012_semester_3_4_18072013
4/20
P
BTCS
Objectives:This course offers a good un
prepares the student to be in a position to
1. Register Transfer and Microoper
microoperations, logic microoperations, s
basic computer and its working.
2. Basic Computer Organisation and De
Timing and control, Instruction Cycle,
basic Computer, Design of Accumulator
3. Design of Control Unit: Control memo
comparative study.
4. Central Processing Unit: General Regis
Modes, Data transfer and manipulations,
5. Input-Output Organisation: Peripheral
priority interrupt, DMA, I/O processor, se
6. Memory Organisation: Memory hiera
memory, virtual memory, memory mana
7. Advanced concepts of Computer Archi
processors and array processors. Intro
synchronization.
Suggested Readings/ Books:
1. M. Moris Mano, Computer System
2. William Stallings, Computer Organi
3. David A Patterson, Computer Archit
4. P. Pal Choudhri, Computer Organis
5. J. P. Hayes, Computer System Archi
6. Kai Hawang, Advanced Computer A
7. Riess. Assembly Language and Co
Objective/s and Expected Outcome: T
After this course the student will be able
1. Fourier series: Periodic Functions, Eu
un ab Technical University
B.Tech. Info
301 Computer Architecture
derstanding of the various functional units of a
design a basic computer system.
tions: Register transfer language & o
hift microoperations, arithmetic logic shift unit.
sign: Instruction codes, Computer registers,
emory reference instructions, Input/ Output an
ogic.
ry, design of control unit microprogrammed
er Organisation, Stack Organisation, Instructio
rogram control, RISC and CISC architecture.
devices, I/O Interface, asynchronous data trans
rial communication.
chy, main memory, auxiliary memory, assoc
ement hardware.
tecture: Concept of pipeline, Arithmetic pipeli
duction to parallel processing, Interprocess
rchitecture, Pearson Education.
ation and Architecture, Pearson Education.
ecture, Pearson Education.
tion and Design, PHI.
tecture, Pearson Education.
rchitecture, Tata McGraw Hill.
puter Architecture and using C++ and JAV
TAM302 Mathematics-III
o teach computer based Engineering Mathemati
to solve complex computer oriented problems.
lers Formula. Even and odd Functions, Half
mation Technology (IT)Batch 2012
omputer system and
perations, arithmetic
Design of a complete
[5]
omputer Instructions,
d Interrupt, Design of
[6]
, hardwired, and their
[3]
formats, Addressing
[6]
er, modes of transfer,
[5]
iative memory, cache
[6]
e, Instruction , vector
r communication &
[5]
A, Cengage Learning.
cs to students.
range expansions,
-
8/10/2019 it_2012_semester_3_4_18072013
5/20
P
Fourier series of different waveforms.
2. Laplace transformations: Laplace tr
transform.
3. Partial Differential Equations: Form
Equations, Homogeneous Partial Differ4. Functions of complex variables: Limi
Analytic function, Cauchy- Riemann eq
5. Linear Systems and Eigen- Values:
iteration method, Rayleighs Power met
6. Differential Equations: Solutions of I
Runge- kutta (upto fourth order) metho
7. Probability distribution: Binomial, Po
8. Sampling Distribution & testing of
Square distribution, t- distribution, F-
Hypothesis, One and two tailed tests,
sample tests on proportion, mean and va
Suggested Readings/ Books:
1. E. Kreyszig, Advanced Enginee
2. P. E. Danko, A. G. Popov, T.
and Exercise, Part 2, Mir Publ3. Bali, N. P., A Text Book on Eng
4. Peter V.O'Neil, Advanced Engin
BTCS
Objective/s and Expected outcome: Dem
develop the truth table for those gates;
hexadecimal, octal numbers to their decim
Design counters and clear the concept of shi
Convert digital into analog and vice versa.
1. Number Systems: Binary, Octal, D
complements, signed Binary numbers. Bi
code, ASCII conversion from one code
2. Boolean Algebra: Boolean postulates
un ab Technical University
B.Tech. Info
ansforms of various standard functions, pro
tion of Partial Differential Equations, linear
ntial Equations with constant coefficients.
s, continuity and derivatives of the function of
ations, conjugate functions.
auss elimination method, gauss- Jordan met
od for Eigen values and Eigenvectors.
itial values problems using Eulers, modified
s.
isson and Normal distribution.
ypothesis: Sampling, Distribution of means
istribution. General concepts of hypothesis,
critical region, Confidence interval estimatio
riance.
ing Mathematics, 5th Edition, Wiley Enstern. A. Kaznevnikova, Higher Mathematics
ishers, 1983.ineering Mathematics, Luxmi Pub., New Del
ering Mathematics, Cengage Learning
03 Digital Circuits & Logic Design
onstrate the operation of simple digital gates,
ombine simple gates into more complex ci
l equivalent an vice versa, demonstrate the o
ft resisters. Study different types of memories
cimal, Hexadecimal. Number base conver
nary Arithmetic, Binary codes: Weighted BCD
to another.
nd laws De-Morgans Theorem, Principle
mation Technology (IT)Batch 2012
[4]
erties of Laplace
[4]
artial Differential
[5]
complex variables,
[5]
od, Gauss- Seidel
[4]
ulers method and
[4]
[4]
and variance, Chi-
esting a statistical
n. Single and two
[5]
1985.n Problems
hi.
identify the symbols,
cuits; change binary,
eration of a flip-flop.
nd their applications.
ions, 1s, 2s, rths
, Gray code, Excess 3
[5]
of Duality, Boolean
-
8/10/2019 it_2012_semester_3_4_18072013
6/20
P
expression Boolean function, Minimiz
Sums (POS), Minterm, Maxterm, Cano
Minimization, Quine-McCluskey method
3. Logic GATES: AND, OR, NOT, NA
Logic Functions using gates, NAND-N
TTL, MOS, CMOS, ECL and their chara
4. Combinational Circuits: Design proce
Subtractor Carry look ahead adder,
encoder/decoder, parity checker, code con
5. Sequential Circuits: Flip flops SR, J
Triggering, Realization of one flip flop
counters, Modulo-n counter, Ring Count
Synchronous counters: state diagram, Cir
6. Memory Devices: Classification of me
cycle. Static RAM Cell-Bipolar, RAM c
PROM, EPROM, EEPROM, Field Progra
7. Signal Conversions: Analog & Digital
Ladder type, Counter Type, Dual Slope t
Suggested Readings/ Books:
1. Morris Mano, Digital Design, Prentice H
2. Donald P.Leach and Albert Paul Malvi
Publishing Company
Limited, New Delhi, 2003.
3. R.P.Jain, Modern Digital Electronics, 3
4. Thomas L. Floyd, Digital Fundamental
5. Ronald J. Tocci, Neal S. Widmer, Gregor
Education.
6. Ghosal , Digital Electronics, Cengage Le
Objectives:This course should provide the
types of data structures and also the way
searching, insertion & deletion of data etc. r
this subject student should be able to choose
un ab Technical University
B.Tech. Info
ation of Boolean expressions Sum of Produ
nical forms, Conversion between canonical f
- Dont care conditions.
D, NOR, Exclusive-OR and Exclusive-NO
R implementations. Study of logic families li
teristics.
dure Adders, Subtractors, Serial adder/Subt
BCD adder, Magnitude Comparator, Multi
verters. Implementation of combinational logic
, T, D and Master slave, Excitation table,
using other flip flops. Asynchronous/Ripple
rs. Classification of sequential circuits-Moore
uit implementation. Shift registers.
ories, RAM organization, Write operation, Re
ell, MOSFET RAM cell, Dynamic RAM cel
mmable Gate Arrays (FPGA).
signals. A/D and D/A conversion techniques
pe, Successive Approximation type).
all of India Pvt. Ltd
o, Digital Principles and Applications, 5 ed
d., Tata McGrawHill publishing company lim
, Pearson Education, Inc, New Delhi, 2003
y L. Moss, Digital System -Principles and Ap
arning.
TCS 303 Data Structures
students with a fairly good concept of the fu
to implement them. Algorithm for solving
lated to data structures should also be discuss
an appropriate data structure for a particular pr
mation Technology (IT)Batch 2012
ts (SOP), Product of
rms, Karnaugh map
[5]
. Implementations of
e RTL, DTL, DCTL,
[5]
ractor, Parallel adder/
lexer/Demultiplexer,
using MUX.
dge triggering, Level
ounters, Synchronous
and Mealy, Design of
[4]
d operation, Memory
l. ROM organization,
[4]
Weighted type, R-2R
[5]
, Tata McGraw Hill
ited, New Delhi, 2003.
lications, Pearson
damentals of different
problems like sorting,
d. After completion of
blem.
-
8/10/2019 it_2012_semester_3_4_18072013
7/20
P
1. Dynamic Memory Management: Unde
allocation, memory management functi
leaks, etc.
2. Introduction: Concept of data type, defi
versus data types, operations on data stru
3. Arrays: Linear and multi-dimensional a
and their storage.
4. Linked List: Linear linked list, operatio
list, application of linked lists.
5. Stacks: Sequential and linked represent
checker, evaluation of postfix expressi
recursive functions.
6. Queues: Sequential representation of qu
queue, linked representation of a queue a
7. Trees: Basic terminology, sequential a
recursive and non-recursive procedures, i
trees, AVL trees and B-trees.
8. Heaps: Representing a heap in memor
queue and heap sort algorithm.9. Graphs: Basic terminology, representati
(breadth-first search and depth-first searc
10. Hashing & Hash Tables: Comparing
collision and its resolution using open ad
11. Searching & Sorting: Searching an ele
using bubble sort, selection sort, inserti
complexities of searching & sorting algor
Suggested Readings/ Books:1.
Sartaj Sahni, Data Structures, Algorit
2. Tenenbaum, Augenstein, & Langsam, D
3. R. S. Salaria, Data Structures & Algor
4. Seymour Lipschutz, Data Structures, S
5. Kruse, Data Structures & Program De
6. Michael T. Goodrich, Roberto Tamassi
7. Thomas H Cormen, Charles E Leiserso
un ab Technical University
B.Tech. Info
rstanding pointers, usage of pointers, arithmeti
ns and operators, debugging pointers - dangl
nition and brief description of various data stru
tures, algorithm complexity, Big O notation.
rrays and their representation, operations on
s on linear linked list, doubly linked list, opera
tions, operations on stacks, application of stac
ns, conversion from infix to postfix represe
eue, linear queue, circular queue, operations
d operations on it, deque, priority queue, appli
nd linked representations of trees, traversin
nserting a node, deleting a node, brief introduc
, operations on heaps, application of heap in
on of graphs (adjacency matrix, adjacency list
), and applications of graphs.
direct address tables with hash tables, hash
ressing and separate chaining, double hashing,
ent using linear search and binary search tec
n sort, quick sort, merge sort, heap sort, she
ithms.
ms and Applications in C++, Tata McGraw H
ata Structures using C and C++, Prentice Hall
thms Using C++, Khanna Book Publishing Co
chaum's Outline Series, Tata McGraw Hill
sign, Prentice Hall of India.
, & David Mount, Data Structures and Algor
, Ronald L Rivest , and Clifford Stein, Introduc
mation Technology (IT)Batch 2012
on pointers, memory
ing pointers, memory
[2]
ctures, data structures
[2]
rrays, sparse matrices
[3]
tions on doubly linked
[4]
ks such as parenthesis
ntation, implementing
[4]
n linear and circular
ations of queues.
a binary tree using
ion to threaded binary
[4]
implementing priority
[2], traversal of a graph
[3]
functions, concept of
rehashing. [3]
niques, Sorting arrays
ll sort and radix sort,
[5]
ill.
of India.
(P) Ltd.
thms in C++(Wiley India
tion to Algorithms.
-
8/10/2019 it_2012_semester_3_4_18072013
8/20
P
8. Ellis Horowitz, Sartaj Sahni, & Dinesh
9. Malik , Data Structures using C++, C
BTCS 304
Objectives:To understand the basic conce
of software development in C++.
1. Object-Oriented Programming Conce
paradigm and object-oriented prorammi
concepts of an object and a class, interfa
among objects, abstraction, encapsulation
2. Standard Input/Output: Concept of
overloaded operators >> and
-
8/10/2019 it_2012_semester_3_4_18072013
9/20
P
pure virtual functions, abstract clasess, vi
9. Exception Handling: Review of traditi
mechanism, throwing mechanism, catchi
10. Templates and Generic Programming:
examples.
11. Files: File streams, hierarchy of file stre
files, accessing records randomly, updatin
Suggested Readings/ Books:
1. Lafore R., Object Oriented Progr
2. E. Balagurusamy, Object Oriente
3. R. S. Salaria, Mastering Object-O
4. Bjarne Stroustrup, The C++ Progr
5. Herbert Schildt, The Complete Re
6. Lippman F. B, C++ Primer, Addis
7. Farrell- Object Oriented using C
BT
List of practical exercises, to be impleme
1.
Write a menu driven program that
linear array:
Insert a new element at end as well a
Delete an element from a given who
To find the location of a given elem
To display the elements of the linea
2. Write a menu driven program that m
ascending order and implements the f
Insert a new element
Delete an existing element
Search an element
Display all the elements
3. Write a program to demonstrate the u
arithmetic expression from infix nota
un ab Technical University
B.Tech. Info
rtual destructors.
nal error handling, basics of exception handlin
g mechanism, rethrowing an exception, specify
Template concepts, Function templates, class
am classes, error handling during file operati
g files.
amming in C++, Waite Group.
Programming with C++, Tata McGraw Hill.
riented Programming with C++, Salaria Publi
amming Language, Addison Wesley.
ference to C++ Language, McGraw Hill-Osbo
on Wesley.
+,Cengage Learning.
S305 Data Structures Lab
nted using object-oriented approach in C++
implements following operations (using separ
s at a given position
se value is given or whose position is given
nt
array
intains a linear linked list whose elements are s
ollowing operations (using separate functions):
se of stack (implemented using linear array) in
ion to postfix notation.
mation Technology (IT)Batch 2012
[3]
g, exception handling
ing exceptions. [2]
templates, illustrative
[3]
ns, reading/writing of
[3]
shing House.
rne.
anguage.
ate functions) on a
ored in on
onverting
-
8/10/2019 it_2012_semester_3_4_18072013
10/20
P
4. Program to demonstrate the use of st
expression in postfix notation.
5. Program to demonstration the imple
a linear array.
6. Program to demonstration the imple using a linear array.
7. Program to demonstration the imple
linear linked list (linked queue).
8. Program to illustrate the implementat
9. Program to illustrate the traversal of
10. Program to illustrate the traversal of
11. Program to sort an array of integers i
12. Program to sort an array of integers i13. Program to sort an array of integers i
14. Program to sort an array of integers i
15. Program to sort an array of integers i
16. Program to sort an array of integers i
17. Program to sort an array of integers i
18. Program to sort an array of integers i
19. Program to demonstrate the use of lin
20. Program to demonstrate the use of bi
order.
BTCS 30
BTCS 307
Implementation all experiments wit1.
Study of Logic Gates: Truth-table veri
Realization of OR, AND, NOT and XO
2. Half Adder / Full Adder: Realization usi
3. Half Subtractor / Full Subtractor: Realiz
4. 4-Bit Binary-to-Gray & Gray-to-Binary
un ab Technical University
B.Tech. Info
ck (implemented using linear linked lists) in ev
entation of various operations on a linear queu
entation of various operations on a circular que
entation of various operations on a queue repre
ion of different operations on a binary search tr
raph using breadth-first search.
raph using depth-first search.
ascending order using bubble sort.
ascending order using selection sort.ascending order using insertion sort.
ascending order using radix sort.
ascending order using merge sort.
ascending order using quick sort.
ascending order using heap sort.
ascending order using shell sort.
ear search to search a given element in an array
ary search to search a given element in a sorte
Institutional Practical Training
Digital Circuits & Logic Design Lab
h help of Bread- Board.
ication of OR, AND, NOT, XOR, NAND and
functions using universal gates.
ng basic and XOR gates.
ation using NAND gates.
Code Converter: Realization using XOR gates.
mation Technology (IT)Batch 2012
aluating arithmetic
represented using
ue represented
sented using a
e.
.
array in ascending
NOR gates;
-
8/10/2019 it_2012_semester_3_4_18072013
11/20
P
5. 4-Bit and 8-Bit Comparator: Implement
6. Multiplexer: Truth-table verification an
7. Demultiplexer: Truth-table verification
chip.
8. Flip Flops: Truth-table verification of J
9. Asynchronous Counter: Realization of
10. Synchronous Counter: Realization of 4-
chip.
11. Shift Register: Study of shift right, SIP
12. DAC Operation: Study of 8-bit DAC (I
13. ADC Operations: Study of 8-bit ADC.
BTCS 308 Object
1. [Classes and Objects] Write a p
inside a class.
2. [Classes and Objects] Write a pr
outside a class.
3. [Classes and Objects] Write a pro
4. [Classes and Objects] Write a pro
5. [Constructors and Destructors]
parameterized constructors.
6. [Constructors and Destructors]
7. [Constructors and Destructors]
8. [Initializer Lists] Write a progra
9. [Operator Overloading] Write
decrement operators.
10. [Operator Overloading] Write a
11. [Operator Overloading] Write a
operators.
12. [Typecasting] Write a program to
13. [Typecasting] Write a program to
14. [Typecasting] Write a program to
15. [Inheritance] Write a program to
16. [Inheritance] Write a program to
17. [Inheritance] Write a program to
un ab Technical University
B.Tech. Info
ation using IC7485 magnitude comparator chips
realization of Half adder and Full adder using
and realization of Half subtractor and Full subtr
Master Slave FF, T-type and D-type FF using
-bit up counter and Mod-N counter using IC74
bit up/down counter and Mod-N counter using I
, SISO, PIPO, PISO & Shift left operations usi
08/0800 chip), obtain staircase waveform usin
Oriented Programming Using C++ Lab
ogram that uses a class where the member fu
ogram that uses a class where the member fu
gram to demonstrate the use of static data mem
gram to demonstrate the use of const data mem
rite a program to demonstrate the use of zero
rite a program to demonstrate the use of dyna
rite a program to demonstrate the use of expli
to demonstrate the use of initializer list.
a program to demonstrate the overloading
rogram to demonstrate the overloading of bina
rogram to demonstrate the overloading of mem
demonstrate the typecasting of basic type to cla
demonstrate the typecasting of class type to bas
demonstrate the typecasting of class type to cla
emonstrate the multilevel inheritance.
emonstrate the multiple inheritance.
emonstrate the virtual derivation of a class.
mation Technology (IT)Batch 2012
.
C74153 chip.
ctor using IC74139
IC7476 chip.
0 & IC7493 chip.
C74192 & IC74193
g IC7495 chip.
g IC7493 chip.
nctions are defined
ctions are defined
ers.
ers.
argument and
ic constructor.
it constructor.
f increment and
y arithmetic operators.
ory management
ss type.
ic type.
s type.
-
8/10/2019 it_2012_semester_3_4_18072013
12/20
P
18. [Polymorphism] Write a program
19. [Exception Handling] Write a pro
20. [Templates and Generic Progra
21. [Templates and Generic Progra
22. [File Handling] Write a programname of the source file and destina
23. [File Handling] Write a program t
24. [File Handling] Write a program t
un ab Technical University
B.Tech. Info
to demonstrate the runtime polymorphism.
gram to demonstrate the exception handling.
ming] Write a program to demonstrate the use
ming] Write a program to demonstrate the use
to copy the contents of a file to another file btion file should be taken as command-line argu
o demonstrate the reading and writing of mixed
demonstrate the reading and writing of object
mation Technology (IT)Batch 2012
of function template.
of class template.
te by byte. Theents,
type of data.
.
-
8/10/2019 it_2012_semester_3_4_18072013
13/20
P
Four
un ab Technical University
B.Tech. Info
h Semeste
mation Technology (IT)Batch 2012
-
8/10/2019 it_2012_semester_3_4_18072013
14/20
P
BT
Objectives:This course should provide t
architecture and all its components. G
communication, semaphore, message pas
systems, security and protection mechanis
1. Introduction to Operating system, Rol
shell, operating system structures, views
2. Process management: CPU schedulin
Prevention, Detection and Recovery
3. Memory Management: Overlays, Me
memory managements, Paging, Segm
Concept of Thrashing
4. Device Management: I/O system an
I/O traffic controller, scheduler
5. File Management: File System Arch
Protection and Security:
6. Brief study to multiprocessor and distri
7. Case Studies: LINUX / UNIX Operatin
in o eratin s stem.
Suggested Readings/ Books:
1. A Silberschatz and Peter B. Galvin,
2. Dhamdhere, Systems Programmi
3. Gary Nutt, Operating Systems Co
4. Operating System by Madnick Don5. Operating System by Stallings6. Ida M.FlynnUnderstanding Oper
Objective/s:
The objective of this course is to prov
reference to the relationships between
algorithm development.
un ab Technical University
B.Tech. Info
S 401 Operating Systems
e students with good understanding of Operati
ood conceptions on all the subjects like p
sing, classical IPC problems, scheduling, me
, I/O hardware and software, deadlocks, etc. sho
of Operating System as resource manager, f
of an operating system.
g, Scheduling Algorithms, PCB, Process synch
mory management policies, Fragmentation an
ntation, Need of Virtual memories, Page rep
secondary storage structure, Device manage
itecture, Layered Architecture, Physical and
uted operating systems.
g System and Windows based operating system
Operating System Concepts" AddisonWesle
g & Operating Systems Tata McGraw Hill
cepts, Pearson Education Ltd. 3rd Edition
ovan
ting Systems-, Cengage Learning
TCS402 Discrete Structures
ide the necessary back ground of discrete str
discrete structures and their data structure
mation Technology (IT)Batch 2012
g System including its
rocesses, inter-process
ory management, file
ld be provided
unction of kernel and
[5]
onization, Deadlocks,
[5]
its types, Partitioned
lacement Algorithms,
[8]
ent policies, Role of
[5]
ogical File Systems,
[5]
[4]
s. Recent trends
y Publishing Company
ctures with particular
ounterparts including
-
8/10/2019 it_2012_semester_3_4_18072013
15/20
P
1. Sets, relations and functions: Intro
identities of sets, relations, operations
Functions, equivalence relations, compati
2. Rings and Boolean algebra: Rin
Euclidean domains Integral domains an
sub-algebra Boolean Rings Application o
map)
3. Combinatorial Mathematics: B
Inclusion and Exclusion Principle Recurr
4. Monoids and Groups: Groups S
Subgroups and Cosets. Congruence rela
groups.
5. Graph Theory: Graph- Directed and
cycles Trees, Chromatic number Connecti
and Homomorphism. Applications.
Suggested Readings/ Books:
1. Discrete Mathematics (Schaum seri
2. Applied Discrete Structures for Co
3.
Discrete Mathematics by N Ch SN
4.
Discrete Mathematics and Graph T
5. Discrete Mathematics and its Appli
6. Elements of discrete mathematics.
BTCS
Objective/s and Expected Outcome: T
hardware and software using a layered arc
1.
Introduction to Computer NetData Communication System and its co
computer networks: LAN, MAN, WA
networks, Network topologies, Network
ISO-OSI reference model, TCP/IP referen
un ab Technical University
B.Tech. Info
duction, Combination of Sets, ordered pairs,
on relations, properties of relations and fu
ility relations, partial order relations.
gs, Subrings, morphism of rings ideals an
fields Boolean Algebra direct product mo
Boolean algebra (Logic Implications, Logic
asic counting principles Permutations an
ence relations, Generating Function, Applicatio
migroups and monoids Cyclic semigraphs
ions on semigroups. Morphisms. Normal sub
undirected, Eulerian chains and cycles, Hamilt
vity, Graph coloring, Plane and connected gra
s) by Lipschutz (McGraw Hill).
puter Science by Alan Doerr and Kenneth Lev
yengar, VM Chandrasekaran.
eory(Cengage Learning) by Sartha
ations. Kenneth H Rosen.(McGraw Hill)
L Liu (McGraw Hill)
03 Computer NetworksI
is course provides knowledge about compute
hitecture.
orks:ponents, Data Flow, Computer network and it
, Wireless and wired networks, broadcast an
software: concept of layers, protocols, interfa
ce model.
mation Technology (IT)Batch 2012
roofs of general
ctions, Hashing
[7]
quotient rings.
phisms Boolean
ates, Karnaugh-
[8]
d combinations
. [7]
nd submonoids,
groups. Dihedral
[7]
onian chains and
hs, Isomorphism
[7]
rseur.
network related
goals, Types of
d point to point
es and services,
[7]
-
8/10/2019 it_2012_semester_3_4_18072013
16/20
P
2.
Physical Layer:
Concept of Analog & Digital Signal, B
Noise, Data rate limits : Nyquist formul
Division, Wavelength Division, Introduct
optics, Wireless transmission (radio,Switching ,Packet Switching & their com
3. Data Link Layer:
Design issues, Framing, Error detection a
protocols for noisy and noiseless channe
ARQ, Selective repeat ARQ, Data link pr
4. Medium Access Sub-Layer:
Static and dynamic channel allocation, R
Polling, Token Passing, IEEE 802.3 fr
detection in 802.3, Binary exponential ba
5. Network Layer:
Design issues, IPv4 classful and classless
link state routing, Congestion control: Pr
Leaky bucket and token bucket algorithm
6.
Transport Layer:
Elements of transport protocols: addres
buffering, multiplexing and de-multiplexi
comparison.
7. Application Layer:
World Wide Web (WWW), Domain
Introduction to Network security
Suggested Readings/ Books:
1. Computer Networks, 4th
Edition, Pe
2. Data Communication & Networkin
3.
Computer Networking, 3rdEdition,
4. Internetworking with TCP/IP, Volu
5. Guide to Networking Essentials, 5th
6. Handbook of Networking, Cengage
un ab Technical University
B.Tech. Info
andwidth, Transmission Impairments: Attenu
, Shannon Formula, Multiplexing : Frequenc
ion to Transmission Media : Twisted pair, Co
icrowave, infrared), Switching: Circuit Swiarisons.
nd correction codes: checksum, CRC, hammin
ls, Sliding Window Protocols: Stop & Wait
tocols: HDLC and PPP.
andom Access: ALOHA, CSMA protocols, C
me format, Ethernet cabling, Manchester en
k off algorithm.
addressing, subnetting, Routing algorithms: di
inciples of Congestion Control, Congestion pr
sing, connection establishment and release, f
ng, crash recovery, introduction to TCP/UDP p
ame System (DNS), E-mail, File Transfer
arson Education by Andrew S. Tanenbaum
, 4th Edition, Tata McGraw Hill. By Behrouz
earson Education by James F. Kurose and Kei
e-I, Prentice Hall, India by Douglas E. Comer
Edition, Cengage Learning by Greg Tomsho,
Learning by Michael W. Graves.
mation Technology (IT)Batch 2012
tion, Distortion,
Division, Time
xial cable, Fiber
ching, Message[6]
code, Data link
RQ, Go-back-N
[6]
ntrolled Access:
oding, collision
[6]
tance vector and
vention policies,
[6]
low control and
otocols and their
[3]
Protocol (FTP),
[2]
. Forouzan.
th W. Ross
-
8/10/2019 it_2012_semester_3_4_18072013
17/20
P
BTCS404 Microproces
Objective/s: The course is intended to gi
details and functioning of microprocessor
1.
Introduction: Introduction to Micro2.
Microprocessor Architecture: 808
& Instruction execution sequence &
Bus, Data Bus & Control Bus, Sync
3. I/O memory interface: Data transf
& parallel interface, Detail study
interfaces.[6]
4. Instruction set & Assembly La
formats, addressing modes, status f
operations, Logical operations, Branc
5.
Case structure & Microprocessor
display, Microprocessor controlled
stepper motor controller, Microproce
6.
Basic architecture of higher or
Motorola 68000, Pentium processors
Suggested Readings/ Books:
1. Ramesh Gaonkar,8085 Microproce2. Daniel Tabak, Advanced Microproc3. Douglas V. Hall, Microprocessors
Hill Edition,1986.
4. Charles M.Gilmore, Microprocessor
5. Ayala Kenneth, The 8086 Micropro
BTObjective/s and Expected Outcome:
system programs.
1.
Introduction: Introduction to syst
editors, assemblers, macro-processor
2. Assemblers: Description of single
un ab Technical University
B.Tech. Info
ors and Assembly Language Programming
e students good understanding of internal archit
.
rocessors, history, classification, recent micropr5 microprocessor Architecture. Bus structure
ata Flow, Instruction cycle. System buses, co
ronous & Asynchronous buses.
r modes: Programmable, interrupt initiated an
of 8251 I/O Processor & 8255 programm
nguages Programming: Introduction, instr
lags, 8085 instructions, Data transfer operati
h operations.
pplication: Interfacing of keyboards and seve
temperature system (MCTS), Study of traffi
sor based micro computers.
er microprocessors: Basic introduction to
.
sor ,PHI Publications.
essors, McGraw- Hill, Inc., Second Edition 19
and Interfacing: Programming and Hardw
s: Principles and Applications, McGraw Hill.
cessor Programming and Interfacing, Ceng
S 405 System Programming
This course provides knowledge to design
m programming and different types of syst
, compilers, linkers, loader, debuggers.
pass and two pass assemblers, use of data
mation Technology (IT)Batch 2012
ctural
ocessors.[5], I/O, Memory
cept of address
[5]
d DMA. Serial
able peripheral
ction & data
ns, Arithmetic
[7]
n segment LED
light system,
[8]
8086 family,
[5]
5.
re, Tata McGraw
age Learning
various
m programs
[2]
structures like
-
8/10/2019 it_2012_semester_3_4_18072013
18/20
P
OPTAB and SYMTAB, etc. [9]
3. Macroprocessors: Description o
macro expansion. [5]
4.
Compilers: Various phases of co
code generation, code optimization t5. Linkers and Loaders: Concept of
various loading schemes. [5]
6.
Editors: Line editor, full screen e
Editor and vi editor. [4]
7. Debuggers: Description of various d
Suggested Readings/ Books:
1. Donovan J.J., Systems Program
2. Dhamdhere, D.M., Introduction
3. Aho A.V. and J.D. Ullman ,Prin
4. Kenneth C. Louden, Compiler
BTC
1. Installation Process of various operating2. Virtualization, Installation of Virtual
Virtual Machine
3. Commands for files & directories: cd
using cat. File comparisons. Disk relate
connecting processes with pipes, back
help. Background process: changing pr
commands, kill, ps, who, sleep. Printi
file. File related commands ws, sat, cut,
4. Shell Programming: Basic of shell pr
bash, conditional & looping statement,
variables, shell keywords, creating shell
un ab Technical University
B.Tech. Info
macros, macro expansion, conditional
piler lexical, syntax and semantic analysi
chniques, code generation, Case study : LEX alinking, different linking schemes, concept
itor and multi window editor, Case study
bugging techniques. [2]
ming, New York, Mc-Graw Hill, 1972.
to Systems Software, Tata Mc-Graw Hill, 19
iples of compiler DesignAddison Wesley/ N
onstruction, Cengage Learning.
406 Operating System Lab
systemsachine Software and installation of Operati
, ls, cp, md, rm, mkdir, rmdir. Creating and
d commands: checking disk free spaces. Proce
ground processing, managing multiple proces
ocess priority, scheduling of processes at com
ng commands, grep, fgrep, find, sort, cal, b
grep.
ogramming, various types of shell, Shell Pro
case statements, parameter passing and argu
programs for automate system tasks, report pri
mation Technology (IT)Batch 2012
and recursive
s, intermediate
d YACC. [9]of loading and
S-Word, DOS
6.
rosa 1985.
g System on
iewing files
ses in linux,
ses. Manual
mand, batch
nner, touch,
ramming in
ments, shell
ting.
-
8/10/2019 it_2012_semester_3_4_18072013
19/20
P
BTCS
1. Write specifications of latest de
2. Familiarization with Networkin
Routers etc.
3.
Familiarization with Transmiss
Tool, Connectors etc.
4. Preparing straight and cross cab
5. Study of various LAN topolo
computers.
6.
Configuration of TCP/IP Protoc
7. Implementation of file and print
8. Designing and implementing Cl
9. Subnet planning and its implem
10.
Installation of ftp server and cli
BTCS408 Microprocessor an
1. Introduction to 8085 kit.
2.
Addition of two 8 bit numbers, s
3. Subtraction of two 8 bit number
4.
Find 1s complement of 8 bit nu
5. Find 2s complement of 8 bit nu
6.
Shift an 8 bit no. by one bit.
7. Find Largest of two 8 bit numbe
8. Find Largest among an array of t
9. Sum of series of 8 bit numbers.
10.
Introduction to 8086 kit.
11.Addition of two 16 bit numbers,
12.Subtraction of two 16 bit numbe
13.Find 1s complement of 16 bit n
14.
Find 2s complement of 16 bit n
un ab Technical University
B.Tech. Info
07 Computer Networks-I Lab
ktops and laptops.
g Components and devices: LAN Adapters,
ion media and Tools: Co-axial cable, UTP C
les.
gies and their creation using network devic
ols in Windows and Linux.
er sharing.
ass A, B, C Networks
ntation
nt
Assembly Language Programming Lab
um 8 bit.
.
ber.
ber.
rs.
en numbers (8 bit).
sum 16 bit.
rs.
mber.
mber.
mation Technology (IT)Batch 2012
ubs, Switches,
ble, Crimping
s, cables and
-
8/10/2019 it_2012_semester_3_4_18072013
20/20
P
BTCS 409
1. Create a menu driven interface for
a) Displaying contents of a file pag
b) Counting vowels, characters, an
c) Copying a file
2. Write a program to check balance
3. Write a program to create symbol t
4. Write a program to create symbol t
5. Implementation of single pass asse
6. Exploring various features of debu
7. Use of LAX and YACC tools.
un ab Technical University
B.Tech. Info
System Programming Lab
wise
lines in a file.
arenthesis of a given program. Also generate th
able for a given assembly language program.
able for a given high-level language program.
bler on a limited set of instructions.
command.
mation Technology (IT)Batch 2012
e error report.