Dept. of Information TechnologyVASAVI COLLEGE OF ENGINEERING

IV Yr. IT- Information SecurityVision

To be a center of Excellence in Multi disciplinary learning and Research, where students get acquainted with latest technologies and apply them for self and societal growth.

Mission

To enable the students acquire outstanding competence and skills in latest technologies through practice- oriented teaching and training.

1. Programme Educational Objectives

The Programme will produce graduates

1. With necessary theoretical and practical knowledge to gain employment and advanced education and deal with problems in Information Technology.

2. With effective written and oral communication skills that will help them to work in a multidisciplinary and dynamic working environment.

3. Who have explored and developed their self, which enables them to conduct themselves as good professionals and good citizens of the country.

2. Program Outcomes At the end of the program, the graduates will demonstrate

a. Knowledge of required Mathematical, Electronic and Information Technology Skills required in analyzing and solving real life problems.

b. Active participation in attempting and succeeding in competitive exams like GATE, GRE, CAT etc.

c. An ability to identify, analyze and solve problems in the area of Information Technology and Computer Science.

d. An ability to develop software programs using various programming languages to solve problems.

e. An ability to develop software applications for different real time problems.f. Skills in handling the different Engineering tools, software tools and Equipment in

analyzing and solving problems.g. Good written and oral communication skillsh. An ability to work in laboratories and in a multi disciplinary environment.i. An aptitude for continuous self education and ability for lifelong learning.j. Good professional and Ethical responsibilities.k. An understanding of the impact of Engineering solutions on the society at large

and will be aware of the contemporary issues.

Graduate Attributes (based on OBE)

i. Engineering knowledgeii. Problem analysis

iii. Design and development of solutionsiv. Investigation of complex problemv. Modern tool usage

vi. Engineer and societyvii. Environment and sustainability

viii. Ethicsix. Individual and team workx. Communication

xi. Lifelong learning + project management and finance

Programme Educational Objectives

Programme Outcomesa b C d e f g h i j k

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PROGRAM OUTCOMES

GRADUATE ATTRIBUTESi ii iii iv v vi vii viii ix x xi

a x x xb x x x xc x x x xd x x x x xe x x x x x x xf x x x x xg x x x x xh x x x x x x xi x x x xj x x x xK x x x x x

Prerequisites:Microelectronics, Digital Electronics and Logic design

Objective:The objective of the course is to explain the need for using EDA tools and the steps to be followed for systematic way of designing , fabricating and testing a VLSI circuit.

Learning Outcomes

Outcome1: The student will be able to state the significance of Moore’s law and CMOS logic(low power). Student will be able to derive the current equation of a MOSFET and to draw the linear and square law model. Will be able to calculate the different capacitances associated wih a MOSFET from its R C model. Will be able to give the structure of CMOS logic and to develop a CMOS logic circuit for a given Boolean function. [(a),(c),(d),(e),(f),(h),(j)]

Outcome2: The student will be able to list the different layers present in a MOSFET and to draw stick diagrams the corresponding layouts of logic gates and buffers.Will be able to develop the same using Microwind tool and to verify its functionality.[(a),(b),(c), (d),(e),(f),(h)]

Outcome3: The student will be able to explain reasons for systematic way of designing a VLSI circuit and the steps to be followed while fabricating a chip.The student will be able to derive and analyze the worst case time constants of CMOS logic circuits. Will be able to explain the need for optimum design of the circuit considering the fanout. [(a),(b),(c)]

Outcome4: The student will be able to develop tristate inverter, pseudo nMOS logic circuit etc. and to design SRAM using 6T model. [(a),(b),(c),(e),(f),(h),(j)]

Outcome5: The student will be able to explain the different modeling (switch level, gate level, structural, RTL, data flow) and to write Verilog codes for verifying the functionality using Mentor Graphics Tool. Able to get the netlist with the help of synthesis tool. Will be able to down load simple designs to FPGA with the help of Xilinx ISE tool. [(a),(b),(c),(d),(f),(g),(h),(i),(j),(k)]

Course outcomes

Program Outcomesa b C d e F g h i j k

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