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    2001 Fairchild Semiconductor Corporation

    November 2001

    Rev. A, November 2001

    I RF 7 3 0 B / I R

    F S 7 3 0 B

    IRF730B/IRFS730B400V N-Channel MOSFET

    General DescriptionThese N-Channel enhancement mode power field effecttransistors are produced using Fairchilds proprietary,planar, DMOS technology.This advanced technology has been especially tailored tominimize on-state resistance, provide superior switchingperformance, and withstand high energy pulse in theavalanche and commutation mode. These devices are wellsuited for high efficiency switch mode power supplies andelectronic lamp ballasts based on half bridge.

    Features 5.5A, 400V, R DS(on) = 1.0 @V GS = 10 V Low gate charge ( typical 25 nC) Low Crss ( typical 20 pF) Fast switching 100% avalanche tested Improved dv/dt capability

    Absolute Maximum Ratings TC = 25C unless otherwise noted

    * Drain current limited by maximum junction temperature

    Thermal Characteristics

    Symbol Parameter IRF730B IRFS730B Units

    VDSS Drain-Source Voltage 400 VID Drain Current - Continuous (T C = 25C) 5.5 5.5 * A

    - Continuous (T C = 100C) 3.5 3.5 * AIDM Drain Current - Pulsed (Note 1) 22 22 * AVGSS Gate-Source Voltage 30 VE AS Single Pulsed Avalanche Energy (Note 2) 330 mJI AR Avalanche Current (Note 1) 5.5 AE AR Repetitive Avalanche Energy (Note 1) 7.3 mJdv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/nsP D Power Dissipation (T C = 25C) 73 38 W

    - Derate above 25C 0.58 0.3 W/CTJ , T STG Operating and Storage Temperature Range -55 to +150 C

    TLMaximum lead temperature for soldering purposes,1/8 " from case for 5 seconds 300 C

    Symbol Parameter IRF730B IRFS730B UnitsR JC Thermal Resistance, Junction-to-Case Max. 1.71 3.31 C /WR CS Thermal Resistance, Case-to-Sink Typ. 0.5 -- C /WR JA Thermal Resistance, Junction-to-Ambient Max. 62.5 62.5 C /W

    TO-220IRF SeriesG SD

    S

    D

    G TO-220FIRFS SeriesG SD

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    Rev. A, November 2001

    I RF 7 3 0 B / I R

    F S 7 3 0 B

    (Note 4)

    (Note 4, 5)

    (Note 4, 5)

    (Note 4)

    2001 Fairchild Semiconductor Corporation

    Electrical Characteristics TC = 25C unless otherwise noted

    Notes:1. Repetitive Rating : Pulse width limited by maximum junction temperature2. L = 19mH, I AS = 5.5A, V DD = 50V, R G = 25 , Starting T J = 25C3. I SD ! 5.5A, di/dt ! 300A/ s, V DD ! BVDSS, Starting T J = 25C4. Pulse Test : Pulse width ! 300 s, Duty cycle ! 2%5. Essentially independent of operating temperature

    Symbol Parameter Test Conditions Min Typ Max Units

    Off CharacteristicsBVDSS Drain-Source Breakdown Voltage VGS = 0 V, I D = 250 A 400 -- -- VBV

    DSS/ TJBreakdown Voltage TemperatureCoefficient ID = 250 A, Referenced to 25C -- 0.4 -- V/C

    IDSSZero Gate Voltage Drain Current

    VDS = 400 V, V GS = 0 V -- -- 10 AVDS = 320 V, T C = 125C -- -- 100 A

    IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, V DS = 0 V -- -- 100 nAIGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, V DS = 0 V -- -- -100 nA

    On CharacteristicsVGS(th) Gate Threshold Voltage VDS = V GS , ID = 250 A 2.0 -- 4.0 VRDS(on) Static Drain-Source

    On-ResistanceVGS = 10 V, I D = 2.75 A -- 0.83 1.0

    gFS Forward Transconductance VDS = 40 V, I D = 2.75 A -- 4.5 -- S

    Dynamic CharacteristicsC iss Input Capacitance VDS = 25 V, V GS = 0 V,f = 1.0 MHz

    -- 790 1000 pFCoss Output Capacitance -- 80 100 pFC rss Reverse Transfer Capacitance -- 20 26 pF

    Switching Characteristicstd(on) Turn-On Delay Time VDD = 200 V, I D = 5.5 A,

    RG = 25

    -- 15 40 nstr Turn-On Rise Time -- 55 120 nstd(off) Turn-Off Delay Time -- 85 180 nstf Turn-Off Fall Time -- 50 110 nsQ g Total Gate Charge VDS = 320 V, I D = 5.5 A,

    VGS = 10 V

    -- 25 33 nCQ gs Gate-Source Charge -- 4.3 -- nCQ gd Gate-Drain Charge -- 11 -- nC

    Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- 5.5 AISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 22 AVSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 5.5 A -- -- 1.5 Vtrr Reverse Recovery Time VGS = 0 V, I S = 5.5 A,

    dIF / dt = 100 A/ s-- 265 -- ns

    Q rr Reverse Recovery Charge -- 2.32 -- C

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    2001 Fairchild Semiconductor Corporation Rev. A, November 2001

    I RF 7 3 0 B / I R

    F S 7 3 0 B

    100 101 102 10310-2

    10-1

    100

    101

    102

    100 ms

    DC

    10 ms

    1 ms

    100 s

    Operation in This Areais Limited by R DS(on)

    ! Notes : 1. T C = 25

    oC

    2. T J = 150oC

    3. Single Pulse

    I D , D

    r a i n C u r r e n t

    [ A ]

    VDS, Drain-Source Voltage [V]

    25 50 75 100 125 1500

    1

    2

    3

    4

    5

    6

    I D , D r a

    i n C u r r e n t

    [ A ]

    TC, Case Temperature [ " ]

    100 101 102 10310-2

    10-1

    100

    101

    102

    10 s

    DC

    10 ms

    1 ms

    100 s

    Operation inThis Areais Limited by R DS(on)

    ! Notes : 1. T C = 25

    oC 2. T J = 150

    oC 3. Single Pulse

    I D , D

    r a i n C u r r e n t

    [ A ]

    VDS, Drain-Source Voltage [V]

    -100 -50 0 50 100 150 2000.0

    0.5

    1.0

    1.5

    2.0

    2.5

    3.0

    ! Notes : 1. V GS = 10 V 2. I D = 2.75 A

    R D S ( O N ) , (

    N o r m a l

    i z e d

    )

    D r a

    i n - S o u r c e

    O n -

    R e s

    i s t a n c e

    TJ, Junction Temperature [oC]

    -100 -50 0 50 100 150 2000.8

    0.9

    1.0

    1.1

    1.2

    ! Notes : 1. VGS =0V 2. ID =250 $ A

    B V

    D S S , (

    N o r m a l

    i z e d

    )

    D r a

    i n - S o u r c e

    B r e a k

    d o w n

    V o l

    t a g e

    TJ, Junction Temperature [oC]

    Typical Characteristics (Continued)

    Figure 9-1. Maximum Safe Operating Areafor IRF730B

    Figure 10. Maximum Drain Currentvs Case Temperature

    Figure 7. Breakdown Voltage Variationvs Temperature

    Figure 8. On-Resistance Variationvs Temperature

    Figure 9-2. Maximum Safe Operating Areafor IRFS730B

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    Rev. A, November 20012001 Fairchild Semiconductor Corporation

    I RF 7 3 0 B / I R

    F S 7 3 0 B

    Charge

    VGS

    10VQ g

    Qgs Q gd

    3mA

    VGS

    DUT

    VDS

    300nF

    50K &

    200nF12V

    Same Typeas DUT

    Charge

    VGS

    10VQ g

    Qgs Q gd

    3mA

    VGS

    DUT

    VDS

    300nF

    50K &

    200nF12V

    Same Typeas DUT

    VGS

    VDS

    10%

    90%

    td(on) tr

    t on t off

    td(off) tf

    VDD

    10V

    VDSRL

    DUT

    RGVGS

    VGS

    VDS

    10%

    90%

    td(on) tr

    t on t off

    td(off) tf

    VDD

    10V

    VDSRL

    DUT

    RGVGS

    E AS = L I AS 2----21 --------------------

    BVDSS - VDD

    BVDSS

    VDD

    VDS

    BVDSS

    t p

    VDD

    I AS

    VDS (t)

    ID (t)

    Time

    10V DUT

    RG

    L

    I D

    t p

    E AS = L I AS 2----21E AS = L I AS 2----21----21 --------------------

    BVDSS - VDD

    BVDSS

    VDD

    VDS

    BVDSS

    t p

    VDD

    I AS

    VDS (t)

    ID (t)

    Time

    10V DUT

    RG

    LL

    I DI D

    t p

    Gate Charge Test Circuit & Waveform

    Resistive Switching Test Circuit & Waveforms

    Unclamped Inductive Switching Test Circuit & Waveforms

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    2001 Fairchild Semiconductor Corporation Rev. A, November 2001

    I RF 7 3 0 B / I R

    F S 7 3 0 B

    Peak Diode Recovery dv/dt Test Circuit & Waveforms

    DUT

    VDS

    +

    _

    Driver RG

    Same Typeas DUT

    VGS dv/dt controlled by R G ISD controlled by pulse period

    VDD

    LI SD

    10VVGS

    ( Driver )

    I SD( DUT )

    VDS( DUT )

    VDD

    Body DiodeForward Voltage Drop

    VSD

    IFM , Body Diode Forward Current

    Body Diode Reverse Current

    IRM

    Body Diode Recovery dv/dt

    di/dt

    D =Gate Pulse WidthGate Pulse Period

    --------------------------

    DUT

    VDS

    +

    _

    Driver RG

    Same Typeas DUT

    VGS dv/dt controlled by R G ISD controlled by pulse period

    VDD

    LLI SD

    10VVGS

    ( Driver )

    I SD( DUT )

    VDS( DUT )

    VDD

    Body DiodeForward Voltage Drop

    VSD

    IFM , Body Diode Forward Current

    Body Diode Reverse Current

    IRM

    Body Diode Recovery dv/dt

    di/dt

    D =Gate Pulse WidthGate Pulse Period

    --------------------------D =Gate Pulse WidthGate Pulse Period

    --------------------------

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    Rev. A, November 20012001 Fairchild Semiconductor Corporation

    I RF 7 3 0 B / I R

    F S 7 3 0 B

    Package Dimensions (Continued)

    (7.00) (0.70)

    MAX1.47

    ( 3 0 )

    #1

    3 . 3

    0

    0 . 1

    0

    1 5

    . 8 0

    0

    . 2 0

    1 5

    . 8 7

    0

    . 2 0

    6 . 6

    8

    0 . 2

    0

    9 . 7

    5

    0 . 3

    0

    4 . 7

    0

    0 . 2

    0

    10.16 0.20

    (1.00x45 )

    2.54 0.20

    0.80 0.10

    9.40 0.20

    2.76 0.200.35 0.10

    3.18 0.10

    2.54TYP[2.54 0.20 ]

    2.54TYP[2.54 0.20 ]

    0.50+0.10

    0.05

    TO-220F

    Dimensions in Millimeters

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    2001 Fairchild Semiconductor Corporation

    DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

    PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANYLIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

    LIFE SUPPORT POLICY

    FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTORCORPORATION.

    As used herein:

    1. Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into the body,or (b) support or sustain life, or (c ) whose failure to performwhen properly used in accordance with instructions for useprovided in the labeling, can be reasonably expected toresult in significant injury to the user.

    2. A critical component is any component of a life supportdevice or system whose failure to perform can bereasonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.

    PRODUCT STATUS DEFINITIONS

    Definition of Terms

    Datasheet Identification Product Status Definition

    Advance Information Formative or InDesign

    This datasheet contains the design specifications for product development. Specifications may change inany manner without notice.

    Preliminary First Production This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improve

    design.No Identification Needed Full Production This datasheet contains final specifications. Fairchild

    Semiconductor reserves the right to make changes atany time without notice in order to improve design.

    Obsolete Not In Production This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

    Rev. H4

    TRADEMARKS

    The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is notintended to be an exhaustive list of all such trademarks.

    STAR*POWER is used under license

    ACExBottomlessCoolFETCROSSVOLT DenseTrenchDOMEEcoSPARKE2CMOSEnSignaFACTFACT Quiet Series

    FAST

    FASTrFRFETGlobalOptoisolatorGTOHiSeCISOPLANARLittleFETMicroFETMicroPakMICROWIRE

    OPTOLOGICOPTOPLANARPACMANPOPPower247PowerTrench

    QFETQSQT OptoelectronicsQuiet SeriesSLIENT SWITCHER

    SMART STARTSTAR*POWERStealthSuperSOT-3SuperSOT-6SuperSOT-8SyncFETTruTranslationTinyLogicUHCUltraFET

    VCX

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    www.datasheetcatalog.com

    Datasheets for electronics components.

    http://www.datasheetcatalog.com/http://www.datasheetcatalog.com/http://www.datasheetcatalog.com/http://www.datasheetcatalog.com/