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    Functional VerificationTest Cases

    Fenix Project - 8051 MicrocontrollerParallel Port 1

    Customer: Andr Aziz ([email protected])Version : 0.2

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    Revision HistoryDate Version Description Author

    05/07/2005 0.1 Description of the test cases TC001, TC002e TC003.

    Andr Aziz

    07/07/2005 0.2 Changes in TC001,TC002 e TC003 Andr Aziz

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    Table of Contents

    1.Introduction ................................................................. 31.S COPE ......................................................................................................................................32.D EFINITIONS , ACRONYMS AND ABBREVIATIONS (OPTIONAL ).................................................................33.D OCUMENT S TRUCTURE ...............................................................................................................3

    2.Test Cases ................................................................... 34.C OMPLIANCE TEST CASES ............................................................................................................35.C ORNER TEST CASES .................................................................................................................46.R EAL TEST CASES .....................................................................................................................47.R ANDOM TEST CASES .................................................................................................................5

    3.Coverage Criteria .......................................................... 58.F UNCTIONAL COVERAGE ...............................................................................................................69.C ODE COVERAGE .......................................................................................................................6

    4.References .................................................................. 6

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    1. Introduction

    The purpose of the Test Cases is to gather all of the information necessary to plan anddefine the functional verification for the . It describes the input/output data set andthe coverage criteria for the functional verification.

    1. ScopeThis document describes the test cases for Parallel Port 1 of 8051 Microcontroller.

    2. Definitions, Acronyms and Abbreviations (optional)[This subsection provides the definitions of all terms, acronyms, and abbreviations required to

    properly interpret this document. This information may be provided by reference to the project's Glossary.]

    Use this style to describe a subsection { style = ip_normal }

    Term Description

    Name Detail {style=ip_table_text}

    3. Document Structure

    This subsection describes what the rest of this document contains and explains how thedocument is organized. Section 2 Test Cases: this section contains the set of input/output data thatwill be used as the stimuli in the test bench. Section 3 Coverage: this section defines the coverage criteria. Section 4 References: this section provides a complete list of all documentsreferenced elsewhere in this document.

    2. Test CasesThe listing below identifies and defines the test cases (stimulus) that have beenidentified for the . This list represents items that will beused in its test bench.

    4. Compliance Test Cases

    Test Case Name [TC001] Send a byte for Parallel Port 1

    Description: Sends a byte for Parallel Port 1.

    Pre condition: Not available.

    Pos condition: Writes a byte in the Parallel Port 1 Latch.

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    Test Procedure: Move a input byte from memory to Port 1;

    INPUT:

    input byte values: 0x00 to0xFF.

    OUTPUT:

    The input byte.

    Test Case Name [TC002] Receive a byte for Parallel Port 1

    Description: Receive a byte for Parallel Port 1.

    Pre condition: Not available.

    Pos condition:

    Writes a byte in the Parallel Port 1 Latch.Test Procedure: Erases the Port 1 (writes a 0xFF in Port 1);

    Move a input byte from Port 1 to memory; Writes the input byte in Port 1 Latch;

    INPUT: input byte values: 0x00 to

    0xFF.

    OUTPUT: The input byte.

    5. Corner Test Cases

    Test Case Name [TC003] Receive a byte for Parallel Port 1

    Description: Receive a byte for Parallel Port 1 with values in latch.

    Pre condition: Not available.

    Pos condition: Writes a byte in the Parallel Port 1 Latch.

    Test Procedure: Move the test byte to Port 1; Move the input byte from Port 1 to memory; Writes the input byte in Port 1 Latch;

    INPUT: test byte values: 0x00 to

    0xFF; input byte values: 0x00 to

    0xFF

    OUTPUT: test byte AND input byte

    6. Real Test Cases[Provide a list of the real test cases. Reproduce the table bellow for each test case]

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    Test Case Name

    Description:

    Pre condition: List all pre condition to execute this test case successfully

    Pos condition: List all pos condition to execute this test case successfully

    Test Procedure:

    [Example:

    Login on server xyz

    Execute the xyz profile

    Etc.]

    INPUT: OUTPUT:

    INPUT: OUTPUT:

    INPUT: OUTPUT:

    7. Random Test Cases[Provide a list of the random test cases. Reproduce the table bellow for each test case]

    Test Case Name

    Description:

    Pre condition: List all pre condition to execute this test case successfully

    Pos condition: List all pos condition to execute this test case successfully

    Test Procedure:

    [Example:

    Login on server xyz

    Execute the xyz profile

    Etc.]

    INPUT:

    3. Coverage Criteria[This section should describe the coverage criteria for this target verification item.]

    Use this style to describe a section { style = ip_normal }

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    8. Functional Coverage[Describe here the functional coverage criteria]

    Use this style to describe a subsection { style = ip_normal }

    9. Code Coverage[Describe here the code coverage criteria]

    Use this style to describe a subsection { style = ip_normal }

    4. References

    [This section provides a complete list of all documents referenced elsewhere in this document.Identify each document by title, report number (if applicable), date, and publishingorganization. Specify the sources from which the references can be obtained. This informationmay be provided by reference to an appendix or to another document.]

    [1] Use this style to list references {style= ip_reference}

    [2] Document Title; ;

    [3] Title; Number (if applicable); Date; Institution, Team responsible for thedocument; Document link;

    [4]

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