introduction to nxp automotive radar solutions
TRANSCRIPT
NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property
of their respective owners. © 2017 NXP B.V.
PUBLIC
AUTOMOTIVE APPLICATIONS ENGINEER
CURT HILLIER
INTRODUCTION TO NXP
AUTOMOTIVE RADAR
SOLUTIONS
AMF-AUT-T2803 | AUGUST 2017
NAO MOTOYAMAMMWAVE RADAR CUSTOMER SUPPORT ENGINEER
PUBLIC 1
AGENDA• Basic on Radar Systems
• 77-81GHz Radar Front-End
• Radar Back-End MCU
PUBLIC 2
Basic on Radar
1
PUBLIC 3
Radar Introduction
• An electronic device/systems for the detection and location of objects:
Speed, Range/Distance, Angle/Position
• Required Functionalities:
RF Part: Antenna, Transmitter, Receiver
Mixed Signal: A/D Convertor
Digital: DSP/MCU/FPGA for Data processing
PUBLIC 4
Radar Block Diagram PA: Power Amplifier
A/D: Analog to Digital Convertor
Target List:
Speed/Range/Angle
Waveform
GeneratorPA
Range/Doppler FFT
Magnitude Calc. etc
Transmitter
Receiver
A/D
DSP/MCU/FPGA
Offered by NXP
Solutions for 76-81GHz
PUBLIC 5
Requirements For Automotive Radar Applications
• RF Components:
− Transmitter:
Generate up to 81GHz mmWave signals (using PLL)
− Receiver:
Mixer to down-covert the received echo signals to the lower frequency (IF).
• Analog to Digital Convertor (ADC)
Convert analog IF signal to the digital data for radar processing
Multiple ADCs for multiple receiver channels
• DSP/MCU/FPGA
− Strong floating-point FFT performance:
Signal Processing Engine for efficient filter and matrix math operations
Optimized DSP libraries and Matrix Math libraries
• Automotive application
Minimal power usage
Small form factor (Integrations)
Full automotive temperature range up to 125°C
− Support for compliance to IEC61508 and ISO26262:
Multiple cores for redundant computations
Core HW enhancements for self test
ECC on all memories
PUBLIC 6
IEEE Standard Radar Bands (Typical Use)
HF
VHF
UHF
L-Band
S-Band
C-Band
X-Band
Ku-Band
K-Band
Ka-Band
W-Band
3MHz – 30MHz
30MHz – 300MHz
300MHz – 1GHz
1GHz – 2GHz
2GHz – 4GHz
4GHz – 8GHz
8GHz- 12GHz
12GHz – 18GHz
18GHz – 27GHz
27GHz – 40GHz
40GHz – 100+GHz
Search Radars
Search & Tracking
Radars
Fire Control &
Imaging Radars
Fire Control &
Imaging Radars
Allocation band for Automotive
24GHz for Short Range Radar
Narrow bandwidth
76 – 77GHz for Long Rage Radar
Range: 10 – 250m
Range Resolution: 0.25m
77 - 81GHz for Medium/Short Range Radar
Range: 1 – 100m/15cm – 30m
Range Resolution: 25cm/3.75cm
PUBLIC 7
Frequency Modulated Contiguous Wave (FMCW) Radar Systems
Transmitted Signal
Received Signal
Freq
[GHz]
T [usec]
IF Freq
[MHz]
T [usec]
IF
[Volt]
T [usec]
Waveform
GeneratorPA
Range/Doppler FFT
Magnitude Calc. etc
Transmitter
Receiver
A/D
DSP/MCU/FPGA
1 Chirp
(Ex.150usec)
77
79
PUBLIC 8
ADC Sampling
Period
Data Processing Period
(Ex. 160msec)
1 Frame (Ex.180msec)
128 Chirps
1 Chirp
(Ex.150usec)
Waveform
GeneratorPA
Range/Doppler FFT
Magnitude Calc. etc
Transmitter
Receiver
A/D
DSP/MCU/FPGA
#1 #2 #128 #1 #2 #128Transmitter&Receiver at
Low power mode
Chirp and Frame
PUBLIC 9
Radar Parameters of Interest
• Maximum Detection Range
• Range Resolution: separation capability of 2 objects
• Maximum Detection Velocity
• Velocity Resolution
• Angle Range
• Angle Resolution
PUBLIC 10
Maximum Detection Range
• 𝑅𝑎𝑛𝑔𝑒𝑀𝑎𝑥 =𝐼𝐹𝑀𝑎𝑥×𝐶
2 × ∆𝑆
𝐼𝐹𝑀𝑎𝑥 = Maximum IF Bandwidth depended on ADC Maximum sampling rate (Ex. 20MSps)
𝐶 = Speed of light 3 × 108 𝑚/𝑠𝑒𝑐
∆𝑆 = Slope of the transmitted chirp (Ex. 1GHz/30usec)
∆𝑺
• 𝑅𝑎𝑛𝑔𝑒 (𝐿𝑖𝑛𝑘 𝐵𝑢𝑑𝑔𝑒𝑡)𝑀𝑎𝑥 =4 𝑇𝑋𝑜𝑢𝑡 ×𝐺𝑎𝑖𝑛𝑅𝑋×𝐺𝑎𝑖𝑛𝑇𝑋×𝐶2×𝜎×𝑁𝐶ℎ𝑖𝑟𝑝×𝑇𝐶ℎ𝑖𝑟𝑝
𝐹𝑐2×(4𝜋)3× 𝑘 ×𝑇 ×𝑁𝐹 ×𝑆𝑁𝑅𝑚𝑖𝑛.
𝑇𝑋𝑜𝑢𝑡 = Transmitter (TX) Output power
𝐺𝑎𝑖𝑛𝑅𝑋 = Antenna gain of RX, 𝐺𝑎𝑖𝑛𝑇𝑋 = Antenna gain of TX
𝜎 = RCS of the objects, 𝑁𝐶ℎ𝑖𝑟𝑝 = Number of chirps in a frame, 𝑇𝐶ℎ𝑖𝑟𝑝= Chirp period
𝐹𝑐 = Carrier frequency, 𝑘 = Boltman constant, T = Operational ambient temperature
𝑁𝐹 = Noise Figure of the receiver
𝑆𝑁𝑅𝑚𝑖𝑛 = Minimum required Signal to Noise Ratio (SNR) to detect objects
𝑇𝐶ℎ𝑖𝑟𝑝
PUBLIC 11
Range Resolution
• 𝑅𝑎𝑛𝑔𝑒𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 =𝐶
2 × 𝐵𝑊
𝐶 = Speed of light 3 × 108 𝑚/𝑠𝑒𝑐
𝐵𝑊 = FMCW sweep bandwidth (Ex. 2GHz)
𝐵𝑊
PUBLIC 12
Maximum Detection Velocity
• 𝑉𝑒𝑙𝑜𝑐𝑖𝑡𝑦𝑀𝑎𝑥.𝐷𝑒𝑡 =λ
4 ×𝑇𝐶ℎ𝑖𝑟𝑝
λ= Wavelength
𝑇𝐶ℎ𝑖𝑟𝑝= Chirp period
Velocity Resolution
• 𝑉𝑒𝑙𝑜𝑐𝑖𝑡𝑦𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 =λ
2 ×𝑁𝐶ℎ𝑖𝑟𝑝×𝑇𝐶ℎ𝑖𝑟𝑝
𝐶 = Speed of light 3 × 108 𝑚/𝑠𝑒𝑐
𝑁𝐶ℎ𝑖𝑟𝑝 = Number of chirps in a frame
𝑇𝐶ℎ𝑖𝑟𝑝= Chirp period
𝑇𝐶ℎ𝑖𝑟𝑝
PUBLIC 13
Angle Range
• 𝐴𝑛𝑔𝑙𝑒 𝑅𝑎𝑛𝑔𝑒𝑀𝑎𝑥. = sin−1λ
2 ×𝑑
λ= Wavelength
𝑑 = Spacing between receiver antennas
𝜃 = Angle of the object
If 𝑑 =λ
2, ±90° mathematically.
Angle Resolution 1
• 𝐴𝑛𝑔𝑙𝑒𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 =λ
𝑑 ×𝑁𝑅𝑋× cos 𝜃
𝑁𝑅𝑋 = Number of receiver antenna
PUBLIC 14
Angle Resolution 2 (Multi-Input Multi-Output/MIMO) • 𝐴𝑛𝑔𝑙𝑒𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 =
λ
𝑑 ×𝑁𝑇𝑋 ×𝑁𝑅𝑋× cos 𝜃
λ= Wavelength
𝑑 = Spacing between receiver antennas
𝑁𝑇𝑋 = Number of transmitter antenna
𝑁𝑅𝑋 = Number of receiver antenna
𝜃 = Angle of the object
2 𝝀 2 𝝀
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
2 𝝀 2 𝝀𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
3-Transmitter 4-Receiver
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
𝝀
𝟐
Virtually 12-Receiver (3-TX x 4-RX)
PUBLIC 15
Radar mmWave Part Key Performance Parameters
TX Power Pout
ADC Sampling Rate
Phase Noise
Noise Figure
Chirp BW
Chirp Linearity
Power Dissipation
Longer Detection Range, better S/N (!)
Higher IF -> Longer Detection Range or Higher dist. resolution
Increased object separation in distance and velocity
Required to achieve best SNR over receiver chain
Increased object resolution for e.g. Parking
Similar to Phase Noise. Less spurious ghosts targets
Enabling smallest Sensor Form Factor
PUBLIC 16
77GHz RF Frontends
2
PUBLIC 17
NXP Radar Roadmap
20202017 2018 2019
Available now
In
developmentConcept
Idea
Multi-Chip Radar
MPC577xK
4MB NVM
1.5MB SRAM
SPT 1.0
Lockstep (ASIL-D)
MR2001 Chipset
Scalable to 4TX
& 12RX
2GHz Chirp
Cascading
MR3003
Single Chip TRX
3TX, 4RX
High Performance
PPAP 18Q1
High-End Corner
“Imaging” Radar
MR3143
S32R45x
S32R372
1.2MB NVM
1MB SRAM
SPT 2.5, ASIL-B
PPAP 17Q4
TEF810x
Single Chip TRX
3TX, 4RX
Lowest Power
PPAP 18Q1
Corner Radar
S32R37x
S32R274
2MB NVM
1.5MB SRAM
SPT 2.0
Lockstep (ASIL-D)
Two-Chip Radar
Corner RadarMulti-Mode
360 Sensing
High End
Corner Radar
Long Range/
Mid Range
RadarFront/Rear
Non-NDA Version
PUBLIC 18
TEF810x Car Radar ICRFCMOS Car Radar Transceiver for 76-81 GHz
• Applications− Long Range Radar: ACC
− Mid Range: Emergency Braking
− Near Range: Parking Aid, Corner Radar
• Features− Fully integrated RFCMOS Radar Frontend for 76-81 GHz
− 3 TX (w/ BPSK), 4 RX Channels
− Optimized for Fast Chirp Modulation
− Support for 2 GHz bandwidth, 4GHz with chirp stitching
− Automotive Temperature Range
− Support cascading of 4 Dolphin
− LVDS, CIF and CSI-2 Interface
− ISO26262 compliant development - ASIL Level B
• Benefits− Lowest Power: 1.2W (1Tx 50%, 4 Rx 60%, BiST 10%)
− Few external components, Easy Integration
− High Range Resolution <8cm
Power
& Clock
Safety
Monitor
SPI
CSI-2
Timing
Engine
ADC1
ADC4
Tx1
Tx3
Rx1
Rx4
PLL
VCO
TEF810xDigital Out, Low Power, Highly Integrated
CONFIDENTIAL AND PROPRIETARY
PUBLIC 19
MR3003 Car Radar IC BiCMOS Car Radar Transceiver for 76-81 GHz • Applications
− Mid Range: Emergency Braking
− Long Range Radar: ACC
• Features
− Fully integrated BiCMOS Radar Frontend for 76-81 GHz
− 3 TX (w/ BPSK), 4 RX Channels
− Optimized for Fast Chirp Modulation
− Support for 2 GHz bandwidth
− High Output Power
− Automotive Temperature Range
− MIPI CSI-2 Interface
− ISO26262 compliant development - ASIL Level B
• Benefits
− Low Power: 2.2W (1Tx 50%, 4 Rx 60%, BiST 10%)
− Few external components, Easy Integration
− High Range Resolution <8cm
CONFIDENTIAL AND PROPRIETARY
PUBLIC 20
Radar Back-End MCU
3
PUBLIC 21
S32R27xx – Block Diagram
Specification
CPU: 2xZ7 240MHz (w/ SPE2) & Z4 120MHz in permanent lockstep
SPT 2.0: FFT Accelerator, DMA, additional mathematical functions
Analog: 4xSD ADC & 2xSAR, Low jitter PLL, D/A as option for 24GHz
Package: 257 MAPBGA (14x14mm2, 0.8mm pitch)
Temp Range (Ta): -40 to 125C (150C Tj), AEC-Q100 Grade 1
Main Supply: 3.3V IO & 1.25V Core (ext or PMU)
Key Features
Functional Safety: as per ISO26262 with target ASIL-D
Security: CSE2
DSE: Radar acceleration mathematical functions
Memory: 2MB Flash/1.5MB SRAM (both ECC)
Top of Class Analogue IP: PLL, OSC & SD ADC
SW Enablement: Safe Autosar MCAL ASIL-B (-D)
NV Memory
CPU Platform
Z4LS @ 120MHz
Ext ADC IF
2MB with ECC
MIPI CSI2
Volatile Emb. Memory
1.5MB RAM with ECC
Connectivity
1 x Cross Trig Unit 2 x IIC
1x FlexPWM (12 ch) 1 x LinFlex Ctrl 2 x dSPI
2 x eTimers – 6 ch. each 3x FlexCAN/CAN-FD SWT & STM
Safety & Support
OSC and PLL
T-Sensor
FCCU/FOSU & CRC
Safe DMA
DEBUG Nexus 3+
Fabric
64 bit XBAR with E2E ECC
ADC Input
4 x SD ADC
12bit 10MSps
2x SAR ADC
12bit 1MSps, ch mux
DSE (Digital Signal
Processing)
Scheduler
COPY Radar
Accelerator
DMA
Radar Processing PlatformMaster Comm Bus
128 msg FlexRay
Ethernet
Vehicle secure Network
Z4 LS @ 120MHz
8kB I-cache
2 way
SFPU
4kB D-cache
2 way
PMU
Safe Memory
MEMU
Security
CSE2
Z7 @ 240MHz
16kB I-cache
2 way
SPE2-SIMD
16kB D-cache
2 way
32KB DTCM
VFPU-SiMD
DAC Output
10MSps
Z7 @ 240MHz
16kB I-cache
2 way
SPE2-SIMD
16kB D-cache
2 way
64KB TCM
VFPU-SIMD
64kB TCM
Pedestal: #255
PUBLIC 23
S32R – Software Enablement
PUBLIC 24
Radar Software Enablement Benefits
Development Tools
Mem
Visualization
Graph tool
SPT
Graph tool
Compiler
LAX
Graphical Chirp
Designer
Radar
Frontend
Base Libraries
FE Adaption API
Simulation SupportMatlab / C
Func.models
SPT Lib
Matlab / C
Func.models
LAX Lib
Advanced Algorithm LibraryPro Libraries
Demo ApplicationCorner Radar Demo Application
Virtual Prototype
SPT Library
LAX Algo
Lib
FE
Adaption
Layer
FE
Adaption
LayerLAX Graph Env.
FE
Adaption
Layer
• Best performance per
power: Pre-optimized
libraries give full access to
NXP Performance-per-Power
Benefits
• Differentiation: Easy-to-Use
SDK enables full
customization of algorithms &
Performance per Power
benefits
• Time-to-Market: Libraries
and Easy-to-Use SDK for
fast TTM
• Scalability & Reuse: Reuse
common algorithm
development for low-end to
high-end radar
PUBLIC 25
SPT Library
SPT Library
SPTBasic
2D-FFT2D-Peak
Search
Threshold
Calculation
Phase
Shifting
SPTPro
3D-FFT CFARDigital
BeamformingJAMMING
DETECTIONMIMO
Auto-
Calibration
PUBLIC 26
Summary
05.
PUBLIC 27
To Summarize:
• NXP Radar Transceiver and Radar MCU products are ready for development
• 77 GHz Transceiver solutions include TEF810x (RFCMOS) and MR3003 (SiGe)
• S32R274 SPT is fast and power efficient
• SPT is a highly parallelized machine + parallelism is hidden from the user (no need to manage)
• Radar Software Development Kit simplifies the user’s job
PUBLIC 28
Back-Up (Radar Demo Kit)
PUBLIC 29
NXP S32 Design Studio
TEF810x + S32R27x Radar Demo & Development Kit
RRU
S32R274TEF810x
Tx
Rx Rx Rx RxConfig &
Status
ADC
Data
40MHz Differential Clock
CHIRP START /
RCS
READY_IN
T / RFSControl /
Error
Optional
Connections
2D FFT Power Spectrum
Visualisation
TEF8102Board S32R274 MCU
12V
Power Supply
Tx
Tx
Cocoon Radar Demo kit
Credit Card Sized Radar Development Platform
PUBLIC 30
Cocoon
PUBLIC 31
Radar Transceiver 76-81GHz: TEF810X
Radar Processor: S32R27XX
System Basis Chip: FS6520 (Power + CAN-FD)
Cocoon Radar Demonstration Kit
Pedestal: #254
PUBLIC 32
3-ch Transmitter
4-ch Receiver TEF810X
S32R27XX
CAN
Driver
FFTs
Detection
Dolphin
Control
Dolphin API
SPI Driver
CAN Protocol
Peaklist
Visualisation
CAN USB
Power
Supply
TEF810X S32R27XX
FS6520
CSI
SPI
TOP BOTTOM
TOP BOTTOM
FS6520Pedestal: #254
• Hardware
− TEF810X+ S32R27XX + FS6520
− 12.0 AC/DC Adaptor
− CAN to USB Adaptor
− Power consumption: < 5.0 W
− Size: 42 x 44mm
− Range: >>40m @ 5dBsm (TBD)
− Opening Angle (TBD)
Azimuth: ±60°Elevation: ±20°
• Software
− NXP Cocoon “RadarVisualization”
• System Requirements
− Windows 7
PUBLIC 33
Credit Card Sized Radar Development Platform
PUBLIC 34
Pedestal: #255
NXP S32 Design Studio
Credit Card Sized Radar Development Platform
PUBLIC 35NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. All rights reserved. © 2017 NXP B.V.
Pedestal: #255
Credit Card Sized Radar Development Platform
• Complete Radar systems development platform for
Radar Transceiver 76-81GHz: TEF810X
Radar Processor: S32R27
• NXP S32 Design Studio for Power Architecture based platform:
Simple bare-metal project designed to be easy to adapt and re-use
Basic SPI driver, CSI2 driver supporting multiple configurations
Examples of TEF810X configuration using TEF810X_API
Optimized Signal Processing Tool (SPT) sequences for different samples/chirps/channels settings implemented using SPT2 assembler
FNET TCP/IP networking stack
Configure multiple combinations of samples, chirps, channels
Supports ADC, range FFT and Doppler FFT output modes
• Free GCC based compiler available on NXP.com
PUBLIC 36
Connection Block Diagram
RRU
S32R274
Dolphin
TEF810x
Tx
Tx
Tx
Rx Rx Rx Rx Config &
Status
ADC Data
40MHz Differential Clock
CHIRP START / RCS
READY_INT /
RFS
Control / Error
Optional
Connections
2D FFT Power Spectrum
Visualisation
TEF8102Board S32R274 MCU
12V
Power Supply
Pedestal: #255
PUBLIC 37
TEF8102 Radar Transceiver Board
Pedestal: #255
• 3 Tx and 4 Rx antenna
• TEF8102
• Stacking connector to interface with RRU MCU board
PUBLIC 38
S32R274 Radar MCU Board
12V DC
Power
Gigabit
Ethernet
Jack
Nexus Debug
CAN Header (J27)Pin 1 – CANH
Pin 2 – GND
Pin 3 - CANL
S32R274
GPIO Header (J307)
JTAG Debug
Pedestal: #255
NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2017 NXP B.V.