introduction to computer organization and architecture micro program...
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Introduction to Computer
Organization and Architecture
Micro Program
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Model of Control Unit
How the Control Unit Generate the control
signal?
Model of Control UnitGet instruction from
Instruction RegisterWorking steps with the timing generator and conditions from flag, the signal from IR passed through the Decoder circuit into the CU to generate the control signal out.
Block Diagram of the Control
Unit
Control Unit with Decoded Inputs
Microprograms ?• 1950 Maurice V. Wikes
( Cambridge Univer.)• 360IBM System/ tt ttttttt ttttttttttt-ttt ttt tttt tttttt t ttt t tttttt.• Microprogramming allows a ttttttt ttttttt tttt ’: PCU to be designed sequ ences known as MicroproMicroprogramsgrams are placed in a spe cial control memory in theCPU.
Wilkes's Microprogrammed
Control Unit
- so that instruction from t he CPU’s main instruction set is executed by invokin g and executing the corre sponding microprogram. * * * * * * *
- CPU with no floating point arithmetic circuits can exe -cute by means of fixed po int arithmetic circuits.
Microprograms ?
Digital Systems : CPU Data Path Unit
network of functional and s torage units capable of pe rforming certain operation on data words. Control Unit issue control signal to the data path for selecting the
function to be performed at specific times and route
through the appropriate p arts of the datapath unit.
Data Paths and Control Signals
Digital Systems : CPU Hardwired
fixedl ogi c ci rcui ts to genera te the control signals.
Microprogrammed stores the control signals -in sequence of micro in structi ons ( microprogramicroprogra
msms ) ina control memory. * provide a systematic & fl
exi bl e method*
Microprogram med Control
Use microprograms to select, interpret, and e xecute instruction set.
CU contain logic to ge -nerate micro instructi
on addresses and to f etch and decode from
control memory.
Fig.15.4
Control Unit Microarchitecture
Basic Concepts Instruction is implement
ed by a sequence of on e or more sets of concu
-rrent micro operations.
-Each micro operatio n is associated with a group of control l
ines that must be a ctivated in a prescr
ibed sequence to tr -igger the micro operations.
Basic Concepts Program Execution
Instructi on Cycle
Instructi on Cycle
. ..
Fetch
Execute
Interrup
t m
OP
mOP
mOP
. .. . ..
Basic Concepts Microprogramming is a metho
d of - control unit design in which t
he control signal selection and
sequencing information is sto red in a
ROMROM or RAMRAM called . . . . .
Control Me Control Memorymory : CM
Functioning of Microprogrammed Control Unit
Basic Concepts
The control signals control signals could beactivatedactivated at any time that a
re specified by a -micro instr-micro instruction,uction,
which is fetched from CM in much the
same way an instruction is f etched from
main memory.
Basic Concepts Instruction Cycle Instruction Cycle
•Fetch•Indirect•Execute
•Interrupt
Flowchart for Instruction Cycle
Basic Concepts Fetch Cycle Fetch Cycle 3 steps and
t tttt-tttttttttt4
t 1 --- : MAR < (PC)
t 2 --- : MBR < Memory
--- PC < (PC) + IIt 3 --- : IR < (MBR) II : Instruction Len
gth
Sequence of Events, Fetch Cycle
Basic Concepts Indirect Cycle Indirect Cycle -3 micro operatio
ns
t 1 --- :MAR< (I R (address) )
t 2 --- : MBR < Memory
t 3 : --- IR(Address) < (MBR(ad
dress))
Basic Concepts Execute Cycle Execute Cycle -vary on op co
de such as 1ADD R , X will -have 3 micro operations
t 1 --- : MAR < (IR(address))t 2 --- : MBR < Memory
t 3 --- : R1 < (R1) + (MBR)
Basic Concepts Execute Cycle Execute Cycle as ISZ X (Inc
rement and Skip instruction)
t 1 --- : MAR < (IR(address))t 2 --- : MBR < Memoryt 3 --- : MBR < (MBR) + 1t 4 --- : Memory < (MBR) If ((MBR) = 0) then (
--- PC < (PC)+1)
Basic Concepts Execute Cycle Execute Cycle as BSA X (su
- -broutine call : Branch and sav- e address instruction)t 1 --- : MAR < (IR(address))
--- MBR < (PC) t 2 --- : PC < (IR(address)) --- Memory < (MBR)t 3 --- : PC < (PC) + 1
Basic Concepts Interrupt Cycle Interrupt Cycle -3micro operati
ons
t 1 --- : MBR < (PC)
t 2 --- : MAR < Save_Address
--- PC < Routine_Addresst 3 --- : Memory < (MBR)
Basic Concepts - Each micro instruction also e
xplicitly or implicitly specifi -es the next micro instructio
n to be used, thereby provi ding the necessary informat
- ion for micro operation sequencing.
set of micro-instruction
forms
microprmicroprogramogram
Organization of
Control Memory
Microinstruction Encoding
Microinstruction Encoding
Basic ConceptsAdvantageAdvantage Microprogra
m can be changed relati vely easily by changing
the contents of CM. (fleflexiblexible)
DisadvantageDisadvantage The tim e required to access the
microinstructions from C M. Chip area and circuit
delay must both be minimized.
Used in CISC’s as the Penti um and MC6 8 0 X0
-Micro instructions Horizontal Formats
long formats, little encoding of the control fields, and t
he ability to control many- micro operation in parallel.
Vertical Formats short formats, considerable
- control field encoding, and limited parallelism.
-interpreted by nano inst ruction that directly con
trol the hardware.
Micro-instruction Types
• Each micro-instruction specifies single (or few) micro-operations to be performed— (vertical micro-programming)
• Each micro-instruction specifies many different micro-operations to be performed in parallel—(horizontal micro-programming)
Vertical Micro-programming
• Width is narrow
• n control signals encoded into log2 n bits
• Limited ability to express parallelism• Considerable encoding of control
information requires external memory word decoder to identify the exact control line being manipulated
Horizontal Micro-programming
• Wide memory word• High degree of parallel operations possible• Little encoding of control information
Alternative Microinstruct
ion Formats for a Simple
Machine
Alternative Microinstruction Formats for a Simple Machine
Next Address Decision
• Depending on ALU flags and control buffer register—Get next instruction
– Add 1 to control address register
—Jump to new routine based on jump microinstruction
– Load address field of control buffer register into control address register
—Jump to machine instruction routine– Load control address register based on opcode in IR
Functioning of Microprogrammed Control Unit
Design Considerations
• Size of microinstructions• Address generation time
—Determined by instruction register– Once per cycle, after instruction is fetched
—Next sequential address– Common in most designed
—Branches– Both conditional and unconditional
Sequencing Techniques
• Based on current microinstruction, condition flags, contents of IR, control memory address must be generated
• Based on format of address information—Two address fields—Single address field—Variable format
Branch Control Logic: Two Address Fields
Branch ControlLogic: Single Address Field
Branch Control Logic: Variable
Format
Address Generation
Explicit Implicit
Two-field Mapping
Unconditional Branch Addition
Conditional branch Residual control
Execution
• The cycle is the basic event• Each cycle is made up of two events
—Fetch– Determined by generation of microinstruction
address
—Execute
Execute
• Effect is to generate control signals• Some control points internal to processor• Rest go to external control bus or other
interface
Control Unit Organization
A Taxonomy of Microinstructions
• Vertical/horizontal• Packed/unpacked• Hard/soft microprogramming• Direct/indirect encoding
How to Encode• K different internal and external control signals • Wilkes’s:
— K bits dedicated — 2K control signals during any instruction cycle
• Not all used— Two sources cannot be gated to same destination— Register cannot be source and destination— Only one pattern presented to ALU at a time— Only one pattern presented to external control bus at a time
• Require Q < 2K which can be encoded with log2Q < K bits• Not done
— As difficult to program as pure decoded (Wilkes) scheme— Requires complex slow control logic module
• Compromises— More bits than necessary used— Some combinations that are physically allowable are not
possible to encode
Specific Encoding Techniques
• Microinstruction organized as set of fields• Each field contains code• Activates one or more control signals• Organize format into independent fields
—Field depicts set of actions (pattern of control signals)
—Actions from different fields can occur simultaneously
• Alternative actions that can be specified by a field are mutually exclusive—Only one action specified for field could occur
at a time
Microinstruction Encoding
Microinstruction Encoding
-Micro instructions Machine instruction is execu
ted by a microprogram whi - ch acts as a real time inter
preter for the instruction. Microinstruction Format
IBM System/370 Model 145
Control
Operand1
Operand2 CM Addressing
0 8 1
6
2
4
3
1
IBM 3033 Microinstruction Format
Other Samples
•LSI computer
Simplified Block Diagram
of the LSI-11 Processor
Organization of the LSI-11 Control Unit
LSI-11 Microinstruction
Format
Introduction to Computer
Organization and Architecture
Machine Language
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