interrupts handling

8/8/2019 Interrupts Handling

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Chapter 5

Interrupt Handling Mechanism


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Ch05L1-"Microcontrollers....", RajKamal, from Pearson Education,

InterruptFlag

InterruptInterrupt

StructureStructure

InterruptDisabling(masking)

InterruptServiceRoutine

InterruptSourceIdentification

InterruptEnabling

InterruptServicingPriority


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Lesson 1

Interrupt Identification, Service

Enabling and Allocating priorities


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Outline

Why are interrupts important?

Identification of interrupt source

Mask/ Enable interrupts

Priority of interrupts


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Phone ring Importance

We can continue our schedule andattend to phone on an interrupt-event(ringing).

Instance of a phone call event is not known.


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Instance of occurrence of an interrupt eventis not known.

Interrupt Structure Importance

Enables servicing of multiple sources ofinterrupt events.

Processor can execute foreground programtill an interrupt-event starts a service routine.

Interrupt handling when event occurs, saves

wait period of the processor for that event.


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Outline

Why interrupts important?

Identification of interrupt source Mask/ Enable interrupts



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An MCUInCap flagsetTimer

Device

Overflow

Rx flagset

Transmitted acharacterSerial

Device

Tx flag set

Inputcapture

Received - acharacter

OV flag

set

Interrupt Source Events


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Each interrupt source of each device can

be assigned a flag. Flag(s) shows thedevice status

Interrupt Source Event Identification

byflag bit

A device event sets the flag.A flag is reset at the start.

The flag, when sets, shows the need toservice the interrupt (need of executingthe service routine associated with that

interrupt occurrence).


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Some MCUs show a service need forexecuting a service routine for an interrupt

source of each device by a pending bit.

Interrupt Source Event Service Need

Identification bypending Bit

A device event sets the bit when serviceneed arises.

Service routine execution resets theinterrupt pending bit.


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Outline





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MCU

MaskableMaskableinterruptsinterrupts

Non

Maskableinterrupts


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Examples- Maskable Interrupt Sources

Serial Transmitter buffer empty

Serial Receiver buffer full

ADC conversion over

Timer overflow

Serial Receiver FIFO half full

Real time clock ticks


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Examples- Nonmaskable Interrupt

Sources

Software interrupt

RAM parity check error

Clock failure

Illegal opcode


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Software can mask servicing of theMaskable interrupt event so that the

current routine continues when maskbit set or enable bit reset


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Software can enable all or disable all

services to all the Maskable interrupt

events by setting enable all bit (EA =0) or resetting EA bit, called primary

level mask bit.

Primary level mask


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Software can enable or disable a

service to a specific maskable

interrupt event by setting a specificenable bit or resetting bit, called

secondary level mask.

Secondary level Mask


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Primary mask bit disables servicesof all maskable interrupts

Secondary mask bit disablesservice for an individual maskable

interrupt event


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IE.7

Interrupt masks

IE.6 IE.5 IE.4 IE.3 IE.2 IE.1 IE.0

IE

EA - ET2 ES ET1 EX1 ET0 EX0

Primary mask bit

Enable all

8051/52 Interrupt Enable Register


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1

0

1

1

0

0

0

ET2

ESET1

EX1

ET0

EX0

Disable T2

Enable T1Enable SI

Disable INT1

DisableINT0

Disable T0

Interrupt

enable/disable bits

Enable when a bit

sets and when EA =1

Enable T2

Enable T1Enable SI

Enable INT1

Enable INT0

Enable T0

EA Enable AllPrimary mask bit


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MCU

Check service need for executing aservice routine, if primary maskreset

Event(s) Identify

Check secondary mask, service if

mask reset

Execute Interrupt Service routine


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Outline





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An MCU Interruptevent

User Assigned newUser Assigned newprioritypriority

MCU AssignedInternal Priority


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MCU Internally Assigned Priorities


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INT0 pin interrupt

INT0 pin interrupt

High

T0OVF interrupt

INT0

T0

T1OVF interrupt

INT1

T1

RI and then Txcomplete

RI and TI

8051 Interrupts Defaults Priorities

Low

T2EX pin-ve edge

capture/reload interrupt

T2

Synchronous Serial Device modeinterrupt

SI Synchmode


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User Assigned Priorities


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IP

interrupt Priority Register

IP.7 IP.6 IP.7 IP.6 IP.7 IP.6 IP.7 IP.6- - PT2 PS PT1 PX1 PT0 PX0

8051


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= 0

1

0

1

0

0

PT2

PS

PT1

PX1

PT0

PX0

Low

LowHigh

High

Low

Low

User assigned IP

register bits

Priority Set/Reset

bits

Priority T2

Priority T1Priority SI

Priority INT1

Priority INT0

Priority T0

Assigning Serial Device and INT1 interrupts

Higher priority for service


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MCUFirst Service an interruptevent whose software andhardware priorities highest

Check mask and service needs

Lastly service the one that has

lowest software and lowesthardware priority


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Software assigned priority overrides

the hardware priority


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Summary


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Interrupts from Devices and eventsare important

Flag identifies an interrupt

Primary mask bits disables services ofall maskable interrupts Secondary mask bit disables service

for an individual maskable interruptevent

Hardware assigns default priorities Software priority override a hardwarepriority


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End of Lesson 1

Interrupt Identification, Service

Enabling and Allocating priorities


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THANK YOU

interrupts handling

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