Interrupt Handler

Component must handle the following seven cases:1. Reset (Highest Priority)

2. Data Abort

3. FIQ

4. IRQ

5. Prefetch Abort

6. Undefined Instruction

7. Software Interrupt (SWI) (Lowest Priority)

Implementation

• One ROM file handles memory addresses.

• 3-bit input leads to 32-bit address for PC.

• Second ROM file handles CPSR alterations.

• 4-bit input leads to lower 8 bits of CPSR.

• Priorities of the interrupts are handled with CLZ functionality.

• Lastly, no interrupts leads to “Active = 0”.