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Page 1: Interconnect Validator Setup Guide - Tensilica

Interconnect Validator Setup Guide

Product Version 11.3November 2015

Page 2: Interconnect Validator Setup Guide - Tensilica

© 1996-2015 Cadence Design Systems, Inc. All rights reserved.

Cadence Design Systems, Inc. (Cadence), 2655 Seely Ave., San Jose, CA 95134, USA.

Open SystemC, Open SystemC Initiative, OSCI, SystemC, and SystemC Initiative are trademarks orregistered trademarks of Open SystemC Initiative, Inc. in the United States and other countries andare used with permission.

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Restricted Permission: This publication is protected by copyright law and international treatiesand contains trade secrets and proprietary information owned by Cadence. Unauthorizedreproduction or distribution of this publication, or any portion of it, may result in civil and criminalpenalties. Except as specified in this permission statement, this publication may not be copied,reproduced, modified, published, uploaded, posted, transmitted, or distributed in any way, withoutprior written permission from Cadence. Unless otherwise agreed to by Cadence in writing, thisstatement grants Cadence customers permission to print one (1) hard copy of this publicationsubject to the following conditions:

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4. The information contained in this document cannot be used in the development of likeproducts or software, whether for internal or external use, and shall not be used for the benefitof any other party, whether or not for consideration.

Disclaimer: Information in this publication is subject to change without notice and does notrepresent a commitment on the part of Cadence. Except as may be explicitly set forth in suchagreement, Cadence does not make, and expressly disclaims, any representations or warranties asto the completeness, accuracy or usefulness of the information contained in this document.Cadence does not warrant that use of such information will not infringe any third party rights, nordoes Cadence assume any liability for damages or costs of any kind that may result from use ofsuch information.

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Contents1Overview

1.1. Setup Tasks

2Configuring a VIP to Connect with IVD

2.1. Configuring a VIP to Support IVD

3IVD Initial Setup

3.1. Instantiating an IVD Agent3.2. Configuring IVD Basic Options

3.2.1. Configuring IVD with UVM Config3.2.2. Configuring IVD with PureView

4IVD-to-VIP Connections

4.1. Setting the Name of an IVD Instance4.2. Defining an Interface in the IVD4.3. Connecting a VIP to an IVD Interface

5Memory Mapping

5.1. Basic Memory Mapping Procedures5.1.1. Mapping an Input Interface and Memory Segment to an Output Interface5.1.2. Resetting Memory5.1.3. Defining Memory Mapping in Stripes5.1.4. Defining Forwarding Attributes5.1.5. Mapping a Memory Segment to Multiple Slaves5.1.6. Mapping an Input Interface with Attributes to an Output Interface

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5.1.7. Assigning a Slave to Unmapped Memory Regions5.2. ACE Memory Mapping Configuration

5.2.1. Defining Inner and Outer Domains5.3. Configuring Address Translation

6Snoop Filters

6.1. Enabling Snoop Filter6.2. Preloading Snoop Filter6.3. Querying Snoop Filter6.4. Selecting Snoop Filter Dynamically6.5. Setting Snoop Scope

7Snoop Filter Maintenance

7.1. Creating a Dummy Master for Maintenance7.2. Connecting a Dummy Master to the Interconnect7.3. Returning a Response to the Maintenance Operation7.4. Closing All Sent Maintenance Snoops

8Grey Snoops

8.1. Setting Transaction Type as Grey8.2. Setting Duration of Grey State

9Coverage

Generating a Coverage FileActivating SystemVerilog Coverage

10Additional Configuration Options

9.1. Setting Size Options9.2. Setting Matching Options

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9.3. Setting Fanout Options9.4. Setting Response Options9.5. Setting DVM Options9.6. Setting Barrier Options9.7. Setting L3 Options9.8. Setting Delay Options9.9. Triggering a Reset Event9.10. Setting Coverage Options9.11. Setting Check-Related Options9.12. Setting Debug Options

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1

Overview

1.1. Setup TasksTo set up your testbench with the Interconnect Validator (IVD), you must complete the followingtasks:

1. Compile each VIP in your testbench. See Configuring a VIP to Connect with IVD.

2. Instantiate and configure each instance of IVD in your testbench. See IVD Initial Setup.

3. Connect IVD. See IVD-to-VIP Connections.

4. Configure memory mapping. See Memory Mapping.

5. Configure snoop filters. See Snoop Filters.

6. Configure snoop filter maintenance. See Snoop Filter Maintenance.

7. Configure grey snoops. See Grey Snoops.

8. Configure coverage. See Coverage.

9. Configure additional options. See Additional Configuration Options.

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2

Configuring a VIP to Connect with IVD

2.1. Configuring a VIP to Support IVDThis procedure produces the following results:

The VIP instance inherits from denaliIcmAwareInstance and implements certain logic.

The VIP transaction to inherit from denaliIcmAwareTransaction.

Use this procedure for each VIP other than the IVD.How:

1. Compile the VIP with the USING_DENALI_ICM flag.

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3

IVD Initial Setup

The following procedures are relevant to IVD initial setup:3.1. Instantiating an IVD Agent

3.2. Configuring IVD Basic Options

3.1. Instantiating an IVD AgentThis procedure creates a single instance of an IVD agent in your testbench. Repeat this procedurefor each IVD agent that you want to use.

1. Create a new user-defined class that extends cdnIcmUvmAgent.

class cdnIcmUvmUserAgent extends cdnIcmUvmAgent;

...

// ICM user extensions and configurations go here.

...

endclass : cdnIcmUvmUserAgent

2. Instantiate the class by adding the following code in the build phase:icmAgent = cdnIcmUvmUserAgent::type_id::create("icmAgent", this);

3. Continue to Configuring IVD Basic Options.

3.2. Configuring IVD Basic OptionsThis procedure determines whether the IVD handles ACE coherency or CHI coherency. The defaultconfiguration does not handle coherency. Each instance of IVD must be configured separately.Choose one of the following options:

Configuring IVD with UVM Config

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Configuring IVD with PureView

3.2.1. Configuring IVD with UVM ConfigUVM Config is the preferred way to configure a Cadence VIP.

1. In the build phase, add the following code:// Instantiate a configuration object.

icmAgentCfg = cdnIcmUvmConfig::type_id::create("icmAgentCfg",this);

// Set whether the IVD agent is active or passive.

icmAgentCfg.is_active = UVM_PASSIVE;

// Select ACE coherency configuration.

icmAgentCfg.icm_ace_config = 1;

// Select CHI coherency configuration.icmAgentCfg.icm_chi_config = 1;

2. Connect the configuration object to the IVD agent with the following code:set_config_object("icmAgent","cfg",icmAgentCfg);

where:icmAgent is the name of the IVD agent that was set in Step 2 of Instantiating an IVD Agent.

icmAgentCfg is the name of the configuration object that was set in Step 1 of this procedure.

3. Continue to IVD-to-VIP Connections.Related Information: "UVM Configuration Classes" in IVD VIP User Interface Reference for UVMSystemVerilog.

3.2.2. Configuring IVD with PureViewTo configure IVD with PureView, perform the following tasks:

1. Creating a SOMA File

If you set icm_chi_config = 1, you must also set icm_ace_config = 1.

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2. Creating an Instantiation Interface

3. Connecting the Instantiation Interface to IVD

This method of configuration is deprecated. Cadence recommends Configuring IVD with UVMConfig.

3.2.2.1. Creating a SOMA FileThis procedure creates a SOMA configuration file. This is the first step in Configuring IVD withPureView.

1. Invoke PureView by typing the following command:pureviewThe PureView GUI appears.

2. From the Configure a new SOMA file menu, select Cadence Verification IP > amba > icm.The PureView configuration window appears.

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3. Click the Functionality tab.The Functionality page appears.

4. In the Features panel, expand the ICM capabilities item, then select the features that pertainto your testbench configuration.

5. To verify your selections, click File > Check configuration.

6. Save the SOMA file by clicking File > Save Configuration As. Select a filename with .spc or.soma as the file extension.

7. Continue to Creating an Instantiation Interface.

Related Information: "SOMA Parameters" in IVD VIP User Interface Reference for UVMSystemVerilog.

3.2.2.2. Creating an Instantiation InterfaceUse this procedure to create an instantiation interface. This is the second step in Configuring IVDwith PureView.

If you select ICM CHI coherent (supports CHI), you must select ICM coherent(supports ACE).

To edit an existing SOMA file, select Open an existing file > SOMA/Configuration File,select the configuration file you want, then continue from Step 3.

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Prerequisite: Creating a SOMA File1. In the PureView configuration window, click the Source tab. The Source panel appears.

2. Click Options > Simulation Environment > Verilog > All.The actual source code for the HDL simulator appears.

3. To change the module name, edit the Module field.

4. To change the location of the SOMA file, click the button in the SOMA file line, then selectthe new location from the File Selection Dialog.

Unlike other VIPs, the IVD instantiation interface does not contain signal connections.IVD gets its data items from the VIP monitors, not directly from the wires themselves.

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5. Save the file by clicking File > Save Source. Save the file with a .v extension, for example,instantiation_interface_ivd1.v.

6. Continue to Connecting the Instantiation Interface to IVD.

3.2.2.3. Connecting the Instantiation Interface to IVDUse this procedure to connect the instantiation interface to IVD. This is the last step in ConfiguringIVD with PureView.Prerequisite: Creating an Instantiation Interface

1. Add the following code to your testbench (cdnAxiUvmUserTb.sv):

module testbench;

...

import DenaliSvIcm::*;

import cdnIcmUvm::*;

...

// my_icm is the ICM module name as defined in the .v file generated

// in step 3 of Creating an Instantiation Interface . // icm_wrapper() is the instance name as you define it.

my_icm icm_wrapper();

2. Create a new user-defined class that extends uvm_env, and connect it to the instantiationinterface in your environment (cdnAxiUvmUserSve.sv).class cdnAxiUvmUserSve extends uvm_env;

cdnIcmUvmUserAgent icmAgent;

virtual function void build_phase(uvm_phase phase);

set_config_string("icmAgent","hdlPath", "testbench.icm_ace_wrapper");

endfunction

endclass : cdnAxiUvmUserSve

The interface_soma parameter in the HDL Instantiation Module points to the correspondingSOMA file. For better portability, replace the absolute path with an environment variable.

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3. Continue to IVD-to-VIP Connections.

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4

IVD-to-VIP Connections

IVD monitors the behavior of the interconnect in your testbench. It gets its data directly from theindividual VIP monitors. IVD is connected to each of the VIPs that are connected to theinterconnect, not to the interconnect itself.To make these connections, complete the following tasks:

4.1. Setting the Name of an IVD Instance

4.2. Defining an Interface in the IVD

4.3. Connecting a VIP to an IVD Interface

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

4.1. Setting the Name of an IVD InstanceThis procedure sets the name of an IVD instance. This is the first step in IVD-to-VIP Connections.Prerequisite: IVD Initial Setup

1. In the connect phase, call the setIcmName() function. For example, you could set the IVDname to be CCI with the following code:

inst.setIcmName("CCI");

2. Continue to Defining an Interface in the IVD.Base class: uvm_envRecommended phase: Connect phase

4.2. Defining an Interface in the IVDThis procedure creates an input or output interface in an instance of the IVD. Use this procedure foreach interface. This is the second step in IVD-to-VIP Connections.Prerequisite: Setting the Name of an IVD Instance

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1. In the connect phase, call the definePort() function. For example, you could define the input0interface with the following code:

icmAgent.inst.definePort("input0", DENALI_ICM_SIDE_INPUT,

DENALI_ICM_PROTOCOL_CHI, DENALI_ICM_COHERENCYKIND_ACE, DENALI_ICM_SPECINTERFACE_ACE_FULL);

2. Continue to Connecting a VIP to an IVD Interface.Base class: uvm_envRecommended phase: Connect phaseExample 1:To define a non-coherent input interface that is connected to an AXI Master:

inst.definePort("input0",DENALI_ICM_SIDE_INPUT,DENALI_ICM_PROTOCOL_AXI);

Example 2:To define a Full Coherent input interface that is connected to an ACE Full Master:

inst.definePort("input1",DENALI_ICM_SIDE_INPUT,DENALI_ICM_PROTOCOL_AXI, DENALI_ICM_COHERENCYKIND_ACE,DENALI_ICM_SPECINTERFACE_ACE_FULL);

Example 3:To define a Lite Coherent input interface that is connected to an ACE Lite Master:

inst.definePort("input3",DENALI_ICM_SIDE_INPUT,DENALI_ICM_PROTOCOL_AXI, DENALI_ICM_COHERENCYKIND_ACE,DENALI_ICM_SPECINTERFACE_ACE_LITE);

Example 4:To define a non-coherent output interface that is connected to an APB Slave:

inst.definePort("output0",DENALI_ICM_SIDE_OUTPUT,DENALI_ICM_PROTOCOL_APB);

4.3. Connecting a VIP to an IVD InterfaceThis procedure connects a VIP to an input or output interface on the IVD. This is the last step inIVD-to-VIP Connections.Prerequisite: Defining an Interface in the IVD

1. In the connect phase, connect the VIP instance with the connectPortToInstance() function.

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For example, you could connect Passive Slave 0 to the input0 interface on the IVD with thefollowing code:

icmAgent.inst.connectPortToInstance("input0",

myUvmEnv.passiveSlave0.inst);

2. Continue to Memory Mapping.Base class: uvm_envRecommended phase: Connect phase

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5

Memory Mapping

The following procedures are relevant to IVD memory mapping:5.1. Basic Memory Mapping Procedures

5.2. ACE Memory Mapping Configuration

5.3. Configuring Address Translation

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

5.1. Basic Memory Mapping Procedures

5.1.1. Mapping an Input Interface and Memory Segment to anOutput InterfaceThis procedure maps a specific input interface and memory segment to a specific output interface.Cadence recommends that you use this procedure in the connect phase.Prerequisite: All required interfaces must be defined with definePort(). See Connecting a VIP toan IVD Interface.

1. In the connect phase, call the mapMemorySegment() function:

Example:A transaction monitored in input1 targeting address segment [0x0 to 0x8_FFFF] is expected to befanned out to output0:

inst.mapMemorySegment("input1", 64'h0, 64'h0008_FFFF, "output0");

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

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5.1.2. Resetting MemoryThis procedure clears memory segments during run-time. After the memory is cleared, you can setnew memory segments using mapMemorySegment() andmapMemorySegmentToMultipleSlaves().

virtual function void resetMemory();

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

5.1.3. Defining Memory Mapping in StripesStriping divides an address space between one or more slaves. Some interconnects are configuredsuch that the memory mapping is divided across several slaves in stripes, for example:

Address 0x0000_0000 to 0x0000_FFFF is forwarded to Output1.Address 0x0001_0000 to 0x0001_FFFF is forwarded to Output2.Address 0x0002_0000 to 0x0002_FFFF is forwarded to Output1.

To support this configuration, IVD uses address masks. For each transaction, if address&mask ==mask_value, the interconnect will forward it to that slave.

Prerequisite: All required interfaces must be defined with definePort() . See Connecting a VIP toan IVD Interface.Example:Forwarding address segment [0x1000_0000 to 0xFFFF_FFFF] to output1 and output2 in stripes of1K:

inst.mapMemorySegment("input1", 64'h1000_0000, 64'hFFFF_FFFF,

"output1", attributes, 'h400, 'h000);

inst.mapMemorySegment("input1", 64'h1000_0000, 64'hFFFF_FFFF,

"output2", attributes, 'h400, 'h400);

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

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5.1.4. Defining Forwarding AttributesThis procedure defines the expected fanout according to a specific attribute of the monitoredtransaction.Prerequisite: All required interfaces must be defined with definePort() . See Connecting a VIP toan IVD Interface.

1. Define the forwarding attribute for each transaction using the UserBeforeReceiveControl()function. For example, to forward transactions with USER_ATTRIBUTE_0 to output0, andtransactions with USER_ATTRIBUTE_1 to output1:virtual function void UserBeforeReceiveControl(ref denaliIcmTransaction trans);

if < … > begin

trans.ForwardingAttribute = DENALI_ICM_FWDATTR_USER_ATTRIBUTE_0;

end else begin

trans.ForwardingAttribute = DENALI_ICM_FWDATTR_USER_ATTRIBUTE_1;

end

endfunction

2. Call mapMemorySegment().inst.mapMemorySegment("input0",64'h0,64'h0008_FFFF,"output0",

attributes,,,DENALI_ICM_FWDATTR_USER_ATTRIBUTE_0);

inst.mapMemorySegment("input0",64'h0,64'h0008_FFFF,"output1",

attributes,,,DENALI_ICM_FWDATTR_USER_ATTRIBUTE_1);

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

5.1.5. Mapping a Memory Segment to Multiple SlavesThis procedure defines address mapping from one master to several slaves.Prerequisite: All required interfaces must be defined with definePort() . See Connecting a VIP toan IVD Interface.

1. In the connect phase, assign the required outputs to an array.

2. Assign the required attributes for the memory segment to an array (optional).

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3. Call mapMemorySegmentToMultipleSlaves().Example:

outputs = new[2];

outputs[0] = "output0";

outputs[1] = "output1";

inst.mapMemorySegmentToMultipleSlaves("input1", 64'h0C1,

64'h0FF, outputs, attributes);

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

5.1.6. Mapping an Input Interface with Attributes to anOutput InterfaceThis procedure maps a specific input interface with specific attributes to a specific output interface.Cadence recommends that you use this procedure in the connect phase.You can use the following attributes:

Non-shareable domain: DENALI_ICM_ADDRESSRANGEATTRIBUTE_NON_MAPPED

Shareable inner domain: DENALI_ICM_ADDRESSRANGEATTRIBUTE_INNER

Shareable outer domain: DENALI_ICM_ADDRESSRANGEATTRIBUTE_OUTER

Prerequisite: All required interfaces must be defined with definePort(). See Defining an Interfacein the IVD.In the connect phase, assign the required attribute to a list, then call mapMemorySegment().

Example 1:

You must use an attribute list to set ACE shareable or non-shareable memorysegments (domains). This must be set together with the setInnerDomain() andsetOuterDomain() functions.

Transactions that target a non-shareable domain must fan out only to slave interfacesand not to coherent master interfaces.

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Defining address segment [0x0 to 0x8_FFFF] as a shareable inner domain:attributes = new[1];

attributes[0] = DENALI_ICM_ADDRESSRANGEATTRIBUTE_INNER;

inst.mapMemorySegment("input0",64'h0,64'h0008_FFFF,"output0",attributes);

Example 2:Defining address segment [0x0 to 0x8_FFFF] as a shareable outer domain:

attributes = new[1];

attributes[0] = DENALI_ICM_ADDRESSRANGEATTRIBUTE_OUTER;

inst.mapMemorySegment("input0",64'h0,64'h0008_FFFF,"output0",attributes);

Example 3:Defining address segment [0x0 to 0x8_FFFF] as a non-shareable domain:

attributes = new[1];

attributes[0] = DENALI_ICM_ADDRESSRANGEATTRIBUTE_NON_MAPPED;

inst.mapMemorySegment("input0",64'h0,64'h0008_FFFF,"output0",attributes);

5.1.7. Assigning a Slave to Unmapped Memory RegionsThis procedure assigns a slave to unmapped memory regions. When a transaction targets anunmapped address space, IVD expects the transaction to fan out to this default slave.Prerequisite: All required interfaces must be defined with definePort() . See Connecting a VIP toan IVD Interface.

1. In the connect phase, call SetDefaultSlave().Example:

inst.SetDefaultSlave("output3");

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

5.2. ACE Memory Mapping Configuration

Transactions targeting this address segment are expected to fan out only to slave interfacesand not to coherent master interfaces.

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5.2. ACE Memory Mapping Configuration

5.2.1. Defining Inner and Outer DomainsThis procedure defines inner and outer address domains. Use this procedure for interconnects thatsupport ACE interfaces.Prerequisite: All required interfaces must be defined with definePort(). See Defining an Interfacein the IVD.

1. In the connect phase, call the setInnerDomain() and setOuterDomain() functions.

Example:class cdnIcmUvmUserAgent extends cdnIcmUvmAgent;

...

virtual function void connect_phase(uvm_phase phase);

...

inst.setOuterDomain("outer_domain", {"input0", "input1", "input2", "input3","input4"});

inst.setInnerDomain("inner_domain", {"input0", "input1", "input2", "input3","input4"});

endfunction

endclass

Base class: cdnIcmUvmAgentRecommended phase: Connect phase

5.3. Configuring Address TranslationThis procedure changes the address of the transaction inside the interconnect as it passes from theinput interface to the output interface.

You can define multiple inner and outer domains. All interfaces in the inner domain mustalso be interfaces in the outer domains. The outer domains can contain interfaces that arenot in the inner domains.

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1. Extend the denaliIcmInstance class, then implement the AddressTranslation() function.

Example:virtual function void AddressTranslation(ref denaliIcmTransaction trans);

trans.AddressOut = trans.Address + 'h1000;

endfunction

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6

Snoop Filters

Reading data from a slave typically takes a long time. If another master has already read the datafrom the address designated in the read request, the interconnect can take the data from the cacheof that master and forward it to the requesting master. This operation is called a snoop.A snoop filter contains the IDs of the masters that might have the data from the designated address.You can configure the requesting master to snoop only the masters that are listed in the filter.You can load a snoop filter before the start of a run, and you can modify it dynamically during therun.The fanout for a specific address is made up of the snoop filter and the slaves that the interconnectqueries for the data. In the normal case, only one slave is part of the fanout. Some designs permitdata to be read from a start address that is handled by one slave to an end address that is handledby a second slave.IVD removes a master interface from the snoop filter in the following cases:

When the master itself sends an Evict, CleanInvalid, MakeInvalid, WriteBack or WriteEvicttransaction.

When the master sends an ACE snoop response transaction with its RespIsShared field setto 0.

You configure and update snoop filters using functions and registers.Related Information:

"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

"Transactions" in ACE VIP User Interface Reference for UVM SystemVerilog.

The following tasks are relevant to snoop filters:6.1. Enabling Snoop Filter

6.2. Preloading Snoop Filter

6.3. Querying Snoop Filter

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6.4. Selecting Snoop Filter Dynamically

6.5. Setting Snoop Scope

6.1. Enabling Snoop FilterThe DENALI_ICM_REG_UseSnoopFilter register determines whether snoop filtering is used.When snoop filtering is enabled, a requesting master snoops only the masters in the snoop filter.When disabled, it snoops all available masters.

Example:myAgentName.regWrite(DENALI_ICM_REG_UseSnoopFilter, 1);

Snoop filtering is enabled for the myAgentName IVD agent.

6.2. Preloading Snoop FilterYou can load a snoop filter before the start of a run. Use this procedure to reduce run time when youhandle complex scenarios.Example:

inst.preloadSnoopFilter(64'h0C1,"domain1",

{"input0", "input1", "input2", "input3", "input4"});

6.3. Querying Snoop FilterYou can query a snoop filter during a run. Use this procedure to determine which interfaces hold aspecific cache line.Example:

inst.readSnoopFilter(64'h0C1, "domain1", relevant_interfaces);

6.4. Selecting Snoop Filter Dynamically

When the DENALI_ICM_REG_TrackSnoopFilter register is set to 1, the use of the snoopfilter is determined dynamically, according to the value in theicm_control_item.force_snoop_filter field of each transaction.

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6.4. Selecting Snoop Filter DynamicallyYou can configure IVD to use the snoop filter depending on the value of theicm_control_item.force_snoop_filter field of each transaction. When the snoop filter is not used,the IVD snoops all masters.Example:

1. Set the DENALI_ICM_REG_UseSnoopFilter register to 0, as follows:myAgentName.regWrite(DENALI_ICM_REG_UseSnoopFilter, 0);

2. Set the DENALI_ICM_REG_TrackSnoopFilter register to 1, as follows:myAgentName.regWrite(DENALI_ICM_REG_TrackSnoopFilter, 1);

3. Set the icm_control_item.force_snoop_filter field of designated transactions to 1. Set thedefining condition according to the needs of your design.virtual function void UserBeforeReceiveControl(ref denaliIcmTransaction trans);

// Set force_snoop_filter to 1

if ( <condition> ) begin

trans.force_snoop_filter = 1;

end

endfunction

6.5. Setting Snoop ScopeSet the DENALI_ICM_REG_SnoopFilterSingleLineOwnerMode register.

0: IVD snoop filter tracks all interfaces that hold each cache line. IVD expects the interconnectto snoop only these interfaces when needed. This is the default.1: IVD snoop filter tracks only a single interface (owner) for each line. IVD expects theinterconnect to snoop only the line's owner or broadcast snoops to all interfaces.

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7

Snoop Filter Maintenance

When an interconnect de-allocates a line from its snoop filter, it should also update all masters thathold this line in their snoop filters. IVD matches a CleanUnique transaction from a dummy masterport to CleanInvalid transactions going to the masters in the IVD snoop filter.You must create a dummy LITE master which corresponds to the part of your interconnect thatsends the maintenance snoops, then connect it to IVD. To signal that the maintenance operation iscomplete, you must send a response to the CleanUnique transaction.The following tasks are relevant to snoop filter maintenance:

7.1. Creating a Dummy Master for Maintenance

7.2. Connecting a Dummy Master to the Interconnect

7.3. Returning a Response to the Maintenance Operation

7.4. Closing All Sent Maintenance Snoops

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

7.1. Creating a Dummy Master for MaintenanceThis procedure creates a dummy master interface in IVD for cache maintenance operations.

1. Create an ACE LITE interface. For example:inst.definePort("maintenanceinput0", DENALI_ICM_SIDE_INPUT, DENALI_ICM_PROTOCOL_AXI, DENALI_ICM_COHERENCYKIND_ACE, DENALI_ICM_SPECINTERFACE_ACE_LITE);

2. Configure the interface to match the configuration of the master interfaces that it will maintain.Configure the following options:

a. Domain

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b. Address mappingc. Address forwardingd. Barrier groupe. DVM group

7.2. Connecting a Dummy Master to the InterconnectThis procedure connects the dummy master interface to the interconnect DUT. The CleanUniquetransaction is sent to the IVD.

1. Call the sendSnoopToInterface() function in your code.Example:

inst.sendSnoopToInterface(maintenanceinput0,

READ_ONCE,

64'h0001_0000_0000_0000,

DENALI_ICM_ACEDOMAIN_INNER,

0,

64'hFFFF_FFFF_FFFF_FFFF);

This function returns an integer identifier for the transaction.

7.3. Returning a Response to the MaintenanceOperationThis procedure signals to the IVD that the maintenance operation is complete.

1. Call the sendSnoopRespToInterface() function in your code.

You must connect this function to the event in your code that performs the snoop filtermaintenance operation.

This function requires the return value from sendSnoopToInterface() as the second inputparameter.

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Example:inst.sendSnoopRespToInterface(input0,32h'd04,32h'01);

7.4. Closing All Sent Maintenance SnoopsThis procedure terminates a maintenance operation without the need to keep track of all transactionidentifiers.

1. Call the finishAllSentSnoops() function in your code.

Example:finishAllSentSnoops();

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8

Grey Snoops

The design of an interconnect can designate data in a master's cache as unreliable immediatelyafter a specific kind of transaction. In this situation, the cache line is considered "grey." This isuseful when it might take some time to formally de-allocate the cache line from the snoop filter. Theinterconnect still snoops the data, but because the cache line has been marked as grey, theinterconnect continues snooping other masters until it finds a cache line that is not grey. If all cachelines for the designated address are grey, the interconnect requests the data from the appropriateslave.The following tasks are relevant to grey snoops:

8.1. Setting Transaction Type as Grey

8.2. Setting Duration of Grey State

8.1. Setting Transaction Type as GreyThis procedure sets a list of the transaction types that cause cache lines to become grey. When asnooped master sends a transaction that is one of these types, the specific cache line that wassnooped in that master becomes grey.Example:

inst.setGreySnoops({READ_ONCE, READ_UNIQUE});

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

8.2. Setting Duration of Grey StateThe DENALI_ICM_REG_UseGreySnoopFilterInterfaces register determines how long cachelines remain grey.

0: A cache line is grey for all transactions that are in progress when the grey state began.Later transactions are handled according to the snoop filter.

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1: A cache line remains grey until it is specifically allocated or de-allocated in the snoop filter.

The value of this register affects all transaction types and all cache lines.Example:

myAgentName.regWrite(DENALI_ICM_REG_UseGreySnoopFilterInterfaces, 1);

Related Information: "Register Control Interface" in IVD VIP User Interface Reference for UVMSystemVerilog.

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9

Coverage

Coverage is configured in a two-step process. The process creates the SystemVerilog files that thesimulator requires for checking coverage.To set up coverage for an IVD agent, you must perform the following steps:

Generating a Coverage File

Activating SystemVerilog Coverage

Generating a Coverage FileThis procedure generates a SystemVerilog file that the simulation requires.Prerequisite: A configured and running verification environment. See IVD-to-VIP Connections .

1. Set the DENALI_ICM_REG_GenerateSvCovFile register to 1. For example,axi_sve.icmAgent.inst.regWrite(DENALI_ICM_REG_GenerateSvCovFile, 1);

2. Run a simulation.The simulator generates the cdnIcmUvmUserCoverage_<ICM_NAME>.sv file in the run directory.

3. Remove the line you added in step 1.

Related information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

Activating SystemVerilog CoverageThis procedure activates coverage collection.Prerequisite: Generating a Coverage File

1. Copy the cdnIcmUvmUserCoverage_<ICM_NAME>.sv file from the run directory to your workingdirectory.

2. In your tb file, include the generated SystemVerilog coverage file. For example,

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`include "cdnIcmUvmUserCoverage_CCI.sv"

3. Override the default coverage type with the following code:factory.set_type_override_by_type(cdnIcmUvmCoverage::get_type(),

denaliIcmUserCoverageInstance::get_type());

4. Enable coverage with the set_config_int() function. For example:set_config_int(“myIc2x3UvmEnv.icmAgent.monitor”,”coverageEnable”,1);

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10

Additional Configuration Options

When you set up your testbench, you must also set the following configuration options:9.1. Setting Size Options

9.2. Setting Matching Options

9.3. Setting Fanout Options

9.4. Setting Response Options

9.5. Setting DVM Options

9.6. Setting Barrier Options

9.7. Setting L3 Options

9.8. Setting Delay Options

9.9. Triggering a Reset Event

9.10. Setting Coverage Options

9.11. Setting Check-Related Options

9.12. Setting Debug Options

Related Information:"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

9.1. Setting Size Options1. Set the following registers:

DENALI_ICM_REG_AlignmentFactor

DENALI_ICM_REG_CacheLineSize

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DENALI_ICM_REG_SnoopDataWidth

Related Information: "Register Control Interface" in IVD VIP User Interface Reference for UVMSystemVerilog.

9.2. Setting Matching Options1. Set the following registers:

DENALI_ICM_REG_ActionInitiatingSnoopsOnDirty

DENALI_ICM_REG_CoherentWrapPointChangeAllowed

DENALI_ICM_REG_CombineOnWriteUnique

DENALI_ICM_REG_StreamOooDepth

DENALI_ICM_REG_UseIdForMatching

DENALI_ICM_REG_WrapPointChangeAllowed

2. Call the following functions:setSnoopConvert()

setSnoopMatch()

UserRemoveMatches()

Related Information:"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

9.3. Setting Fanout Options1. Set the following registers:

DENALI_ICM_REG_AllowDataPrefetching

DENALI_ICM_REG_AllowDataRefetching

DENALI_ICM_REG_AllowPreemptiveRead

DENALI_ICM_REG_AllowPreemptiveSlaveAccess

DENALI_ICM_REG_AllowPreemtiveSnoops

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DENALI_ICM_REG_EnableCoherentOperation

DENALI_ICM_REG_EnableExtraTransactionsForAllControlItems

DENALI_ICM_REG_SendAllControlPartsToTheSameSlaveInterface

DENALI_ICM_REG_StopSnoopOnDataReceived

DENALI_ICM_REG_StopSnoopOnDirtyReceived

DENALI_ICM_REG_StopSnoopOnWasUnique

2. Call the setDefaultSlave() function.Related Information:

"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

9.4. Setting Response Options1. Set the following registers:

DENALI_ICM_REG_DefaultResponseMask

DENALI_ICM_REG_EnableMakeInvalidDataTransfer

DENALI_ICM_REG_EnforceIsSharedValue

DENALI_ICM_REG_PassErrorOnNoData

2. Call the UserBeforeReceiveResponse() function.Related Information:

"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

9.5. Setting DVM Options1. Call the setDvmGroup() function.

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

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9.6. Setting Barrier Options1. Call the setBarrierGroup() function.

Related Information: "UVM Functions" in IVD VIP User Interface Reference for UVMSystemVerilog.

9.7. Setting L3 Options1. Set the following registers:

DENALI_ICM_REG_KeepDataCoherentWithMasters

DENALI_ICM_REG_UseCache

2. Call the following functions:RemoveCacheEntry()

writeCacheEntry()

Related Information:"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

9.8. Setting Delay Options1. Set the following registers:

DENALI_ICM_REG_ControlDelay

DENALI_ICM_REG_DataDelay

Related Information: "Register Control Interface" in IVD VIP User Interface Reference for UVMSystemVerilog.

9.9. Triggering a Reset Event1. Set the DENALI_ICM_REG_ResetIcm register.

Related Information: "Register Control Interface" in IVD VIP User Interface Reference for UVM

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SystemVerilog.

9.10. Setting Coverage Options1. Set the DENALI_ICM_REG_EnableCoverage register.2. Call the UserCompoundItemDone() function.

Related Information:"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

9.11. Setting Check-Related Options1. Set the following registers:

DENALI_ICM_REG_CheckOnlyHazardBarrier

DENALI_ICM_REG_CheckOooDepth

DENALI_ICM_REG_DataConsistencyCheckingMode

DENALI_ICM_REG_EnableDomainConsistencyChecks

DENALI_ICM_REG_EnableModifiableBitCheck

DENALI_ICM_REG_EnableTimeout

DENALI_ICM_REG_ErrCtrl

DENALI_ICM_REG_MonitorSlaveExclusives

DENALI_ICM_REG_TimeoutValue

2. Call the UserCompoundItemDone() function.Related Information:

"Register Control Interface" in IVD VIP User Interface Reference for UVM SystemVerilog.

"UVM Functions" in IVD VIP User Interface Reference for UVM SystemVerilog.

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9.12. Setting Debug Options1. Set the following registers:

DENALI_ICM_REG_EnableRecord

DENALI_ICM_REG_EnableTracker

DENALI_ICM_REG_Verbosity

Related Information: "Register Control Interface" in IVD VIP User Interface Reference for UVMSystemVerilog.

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