industrial council at cei-upm · tfg supervisors: pedro alou, vladimir svikovic francisco j. nieto...

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[email protected] Universidad Politécnica de Madrid Industrial Council at CEI-UPM April 19 th , 2018

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Page 1: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

cei@

upm.es

Universidad Politécnica de Madrid

Industrial Council at CEI-UPM

April 19th, 2018

Page 2: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Members Visiting Discussing format(International)

Page 3: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Agenda

History&

Activities

• 2016-17• 2017-18

Course 2018-19

Offer grants to students• May 10th or 11th

• June 20th or 21st:

Feedback&

Discussion

• Format (1:n, ECPE, BWRC)• Master• Research lines

Page 4: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Centro de Electrónica Industrial

▪ 60 Full time researchers▪ 24 FT Doctors (Faculty, contracted researchers)▪ 38 FT students (23 Doctorate, 12 Master)

▪ 25-30 Part time students▪ 3 Administration & Technicians

• Power converters• DC-DC converters – Fast Dynamics• AC-DC and DC-AC

• Power Supply Architectures• Modeling & Simulation • RF Amplifiers• Emerging Applications

Power Electronics

• Sensor Networks• Reconfigurable systems• Embedded control Systems• Interactive Systems & Environments

Digital Systems

• Power QualityElectrical

Eng Radio • Radio Engineering

VALUE

is expressed and delivered through

INTERACTION

Page 5: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

We offer R&D projects…

…we need EDUCATED engineers !

July 2016

Page 6: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Transfer Knowledge through persons

Our “joint” purpose:

• Attract the best students• Train in research, in Synchronism with Industry

Page 7: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Some Facts…

Every year:• More than 400 students scoring

higher than 11.6• More than 100 students scoring

higher than 13.0

Page 8: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Flow, from students à skilled engineers

Master

Undergraduate

or Master

World Class

Students

Page 9: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

WHY the “Industrial Council”?

Attract Students & Industryby increased VISIBILITY, in both directions

1

Page 10: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

WHY the Industrial Council ?

Continuityin our relationship with Industry

2

Page 11: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

WHY the Industrial Council ?

Continuityin our relationship with Industry

2

Page 12: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Industrial CouncilActive & Continuous implication

Objectives:

• Custom short courses• E-documents

(Thesis, Tutorials, Presentations at conferences, Seminars,…)

• Co-advice Thesis(TFG, TFM, Doctorate)

• Recruitment

• Proof of concepts• Joint proposals

• Master on Industrial Electronics• Research Lines

ADVICE (Council à CEI)

Cont. EDUCATION

STUDENTS

Joint Research

Page 13: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Why the “Industrial Council”?IMPLEMENTATION

FrameworkAgreement

Year-round contracts(academic course)

Page 14: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Why the “Industrial Council”?Timeline

September

DecemberIndustryJune

(covered by Industry partner)

JulyMay-June

Selection Process

April

Offerto students

ICmeeting

Page 15: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Why the “Industrial Council”?What you may expect

Scholarship (6k€, 15k€, 45k€)• Trained engineer

(co-advice)• No Intellectual Property

Senior Research (72k€/p.y) • Specifications• Intellectual Property

Page 16: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Airbus Defence & Space

Alicia del Barrio• Modeling and Characterization of Switching Losses

in MOSFETs• TFM Supervisors: Jesús Oliver, Luis Jimenez

Javier Martínez Molina• Design of a low ripple buck converter• TFM Supervisors: Miroslav Vasic, Roberto Gutierrez

Giorgio Bertocci• Flyback with smart input snubber• Research Project. Coordinator: Pedro Alou, Marcos

Arasa

Ricardo J. Portugal• Design and Test of a low power voltage multiplier for

space applications• TFM Supervisors: Jesús, Luis Alonso

On-site Seminar on power supply systems

2016/2017

2017/2018

2017/2018

2016/2017

2016/2017

Page 17: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Thales Alenia Space

Mariví Flores• Design of an FPGA for generic communication

buses managementTFG Supervisors: Teresa Riesgo, Raúl Regada

Nicolás Alonso• Design of a push-pull converter for data handling

products• TFM Supervisors: Pedro Alou, Vladimir Svikovic

David de la Hoz• Development of supply architecture for new

generation FPGATFG Supervisors: Pedro Alou, Vladimir Svikovic

Francisco J. Nieto• Prototyping board based in FPGA and impl. of

partial and dynamic reconfiguration techniques• TFM Supervisors: E. de la Torre, Laura Armesto

2016/2017

2017/2018

2017/2018

2016/2017

Page 18: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Bosch

Andrea Molina Gómez• Winding inter-turn short circuit tester for electric

motors• TFG Supervisors: R. Asensi, Pablo Cerrada

José E. Palermo• Interturn short-circuit tester of motors forelectr.

bycicles. Study of system voltage scaling• TFG Supervisors: R. Asensi, Pablo Cerrada

2016/2017

2017/2018

Page 19: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Ingeniería Viesca

María SoriaModeling of dynamic losses for new semiconductor devices for future train power convertersTFG Supervisors: Jesus Oliver, Cecilia de la Viesca

2017/2018

Page 20: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Feedback & Discussion

• Format (1:n, ECPE, BWRC)• Master• Research lines

Page 21: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

33

CEI

University

Industry

University

IndustryIndustry

University

Industry

Benefits of the interactionJoint Research?

Page 22: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Example of Industry Cooperation

> 80 Industry Partners !!

Page 23: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Master onElectronics Industrial

Page 24: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Master on Industrial Electronics60 ECTS

PROFESSIONAL TRACK18 ECTS

RESEARCH TRACKPOWER ELECTRONICS

18 ECTS

RESEARCH TRACKEMBEDDED SYSTEMS

18 ECTS

BASE MODULE12 ECTS

PRACTICE AT COMPANY6 ECTS

INITIATION TO RESEARCH6 ECTS

MASTER THESIS12 ECTS

FREE CHOICE SUBJECTS12 ECTS

Page 25: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Master on Industrial Electronics

Page 26: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

▪ Visit to facilities▪ Invited speakers in specific seminars▪ Master thesis in cooperation▪ Advising about content

Ways to collaborate with our master:

Page 27: Industrial Council at CEI-UPM · TFG Supervisors: Pedro Alou, Vladimir Svikovic Francisco J. Nieto • Prototyping board based in FPGA and impl. of partial and dynamic reconfiguration

Course 2018-19

• Presentation Industry members àstudents

• Presentation IC à students