in1210/01-pds 1 tu-delft instructions and addressing

39
In1210/01-PDS 1 TU-Delft Instructions and addressing

Upload: loren-harper

Post on 17-Jan-2016

219 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 1TU-Delft

Instructions and addressing

Page 2: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 2TU-Delft

Computer System

READ(X)READ(Y)ADD(X,Y,Z)WRITE(Z)

X: 1Y: 2Z: 3 • •

IR:

PC:

arithmeticunit

Central Processing Unit

controlunit

Main Memory

Input

Output

registers

data and instructions

Page 3: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 3TU-Delft

Instruction and wordlengths(1)

instruction

instruction

instructioninstruction

012345678910

word

instructioninstructioninstruction instructioninstruction instruction

012345678910

wordaddress address

Page 4: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 4TU-Delft

Instruction and wordlengths(2)

instructioninstructioninstruction instructioninstruction instruction

012345678910

wordaddress

instructioninstructioninstruction instructioninstruction instruction

Page 5: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 5TU-Delft

Instruction and wordlengths(3)

012345678910

wordaddress

instructioninstr. instrinstruction instr. instrinstruction instr. instr

instructioninstr. instrinstruction instr. instrinstruction instr. instr

Page 6: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 6TU-Delft

32 bit word formats

opcode specifier operand specifiers

31 30 1 0

byte byte byte byte

a two’s complement number

4 ASCII characters

32 bit

a machine instruction

Page 7: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 7TU-Delft

Byte formats

0 1 2 34 5 6 78 9 - -- - - -- - - -

0

21

word

Big endian

e.g. PowerPC 68000

3 2 1 07 6 5 4- - 9 8- - - -- - - -

0

21

Little endian

Page 8: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 8TU-Delft

Question What problems can occur in porting data

between machines with big-endian and little-endian storage?

Page 9: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 9TU-Delft

Type of Instructions There are 4 types of instructions

- Data Copy operations» between memory and registers

» between memory locations

» between registers

- Arithmetic and Logic operations- Program flow control- I/O operations

Page 10: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 10TU-Delft

Symbolic notation Copy instructions

[R1 ] M(LOC )

Arithmetic operations M(C) M(A) + M(B)

LOC, A, and B are memory addresses M(address) means contents of memory

location at address. [R] means contents of register R.

Page 11: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 11TU-Delft

Operand specification formats Three address instructions

format: INSTR source#1,source#2,destination

example: Add A,B,C

means: M(C) M(B) + M(A) Two address instructions

format: INSTR source, destination

example: Add A,B

means: M(B) M(B) + M(A)

Page 12: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 12TU-Delft

Two address instruction Two operand instructions destroy contents of

the B location Need other instruction to avoid that;

Move B,C We then have

Move B,C

Add A,C

meaning: M(C) M(B);

M(C) M(C) + M(A) ;

Page 13: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 13TU-Delft

One address instructions One address have implicit source (often

called Accumulator)Load A

Add A

Store C

meaning

[Accu] M(A);

[Accu] [Accu] + M(A);

M(C) [Accu]

Page 14: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 14TU-Delft

Registers Many computers have a number of General-

Purpose registers inside the CPU Access to registers is faster than to memory

locations Used to store temporary data during

processing Registers require less bits of address than

main memory

Page 15: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 15TU-Delft

Register addressing Let Ri denote register General operation ADD A,B,C can be broken

down toMove A,R0

Add B,R0

Store R0,C

meaning [R0] M(A);

[R0] [R0] + M(B);

M(C) [R0]

Page 16: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 16TU-Delft

Instruction formats (1)

opcode specifier operand specifiers

general format

opcode operand

one operand addressing

Page 17: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 17TU-Delft

Instruction formats (2)

opcode operand operand

two operand addressing

Page 18: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 18TU-Delft

Accumulator architecture

AccumulatorPC

CPU

MainMemory

Page 19: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 19TU-Delft

Question

How many instructions can be defined when the opcode field is 5 bit ?

Page 20: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 20TU-Delft

Example

instruction

accu

4 bits 12 bits

opcode operandm

15 0

sign bit

Page 21: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 21TU-Delft

Instruction setCode Opcode Meaning

01000101011001111000100110101011

LoadStoreAddSubMulDivAndOr

[Accu] ← ( )M m( )M m ← [Accu]

[Accu] ← [Accu] + M( )m[Accu] ← [Accu] - M( )m[Accu] ← [Accu] * M( )m[Accu] ← [Accu] / M( )m[Accu] ← [Accu] & M( )m[Accu] ← [Accu] vM( )m

000000010010

J MPJSRRTS

Got omCa ll Subroutin e a t mRetur n from Subroutine

1100110111101111

JZJNZJ PJN

Got o mi [f Accu]= 0Got o mi [f Accu] =/ 0Got o mi [f Accu] > 0Got o mi [f Accu] < 0

Page 22: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 22TU-Delft

Multiple register architecture

R0CPU

MainMemory

R1

R2

R3

Page 23: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 23TU-Delft

Straight-line sequencing

…...…...

…….

Move A,R0Add B,R0Move R0,C • •

ii+4i+8

AB

C

address

Program for M(C) M(B) + M(A)

Page 24: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 24TU-Delft

Straight-line sequencing

Add Nn,R0Move R0,S

Move N1,R0Add N2,R0Add N3,R0 • •

ii+4i+8

i+4n-4i+4n

address

Program for addition of n numbers

Page 25: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 25TU-Delft

Branching

......

n

Clear R0Move N,R1

Decr R1Branch>0 LMove R0,S

L

SNN1

NnProgram for addition of n numbers

Determine address of“next” number and add itto R0

programloop

Page 26: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 26TU-Delft

Common branch conditions N (negative) set to 1 of result is negative Z (zero) set to 1 of result is zero V (overflow) set to 1 of result overflows C (carry) set to 1 of carry-out results

Page 27: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 27TU-Delft

Question

Why is the carry condition important?

Page 28: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 28TU-Delft

Addressing modes Addressing modes determine how the address

of operands is determined Typical 4 addressing modes

- immediate addressing- direct addressing- indirect addressing- index addressing

Page 29: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 29TU-Delft

Immediate addressing(1)

opcode specifier operand

instruction

ADD # -1JNZ 10 • •

10

example: simple counting loop

Page 30: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 30TU-Delft

Immediate addressing(2) Advantages:

- no additional calculations needed to obtain operand- fast

Disadvantages:- Operand value must be known- Operand value cannot be changed- Limited no of bits available

Notation: MOVE #200,R0 Meaning: [R0] 200

Page 31: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 31TU-Delft

Direct addressing(1)

opcode specifier mem or reg address

instruction

memoryor

registers

ADD 13JNZ 10 • # -1

10

13

Page 32: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 32TU-Delft

Direct addressing(2) Advantages:

- Operand separate from instruction- Can be changed- Full word length available

Disadvantages:- More memory accesses- More storage occupation

Notation: ADD R1,R2 Meaning: [R2] [R2] +[R1] Also called “Absolute addressing” (Ham.)

Page 33: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 33TU-Delft

Indirect addressing(1)

ADD (12)JNZ 10 13 # -1

10

13

opcode specifier mem or reg address

instruction

op. address

operand

memoryor

registers

Page 34: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 34TU-Delft

Indirect addressing(2)

Advantages:- Actual address of operand is not in instruction- Can be changed

Disadvantages:- Even more memory or register references- More memory occupation

Notation: ADD (R1),R2 Meaning: [R2] [R2] + M([R1])

Page 35: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 35TU-Delft

Example indirect addressing

programloop L

N

N1

Clear R0

Move N,R1

Move #N1,R2

Add (R2),R0

Add #4,R2

Decr R1

Branch>0 L

Move R0,S

n

S

Page 36: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 36TU-Delft

Index addressing(1)

opcode Reg index

instruction

operand

memoryor

registers

operand

+

registers

Page 37: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 37TU-Delft

Index addressing(2) Advantages:

- Allows specification of fixed offset to operand address

Disadvantages:- Extra addition to operand address

Notation: ADD X(R1),R3 (X=number) Meaning: [R3] [R3] + M([R1] + X)

Page 38: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 38TU-Delft

Example index addressing

NE

Program with index addressing

programloop

sexagesalary

nEmpoyee IDsexagesalaryEmpoyee ID

L

Move #E,R0

Move N,R1

Clear R2

Add 8(R0),R2

Add #16,R0

Decrement R1

Branch>0 L

Div R1,R2

Move R2,Sum

Move N,R1

Page 39: In1210/01-PDS 1 TU-Delft Instructions and addressing

In1210/01-PDS 39TU-Delft

Additional modes Some computers have auto-increment

(decrement instructions) Example: (R0)+ Meaning ..M(R0)..; [R0] [R0]+1 Example: -(R0) Meaning [R0] [R0]-1; ..M(R0)..