IEEE 2007 International Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

A Low-Power AC/DC Rectifier for Passive UHF RFID

TranspondersChangming Ma1 Chun Zhang2 Zhihua Wang2

(^Department of Electronic Engineering, Tsinghua University, Beijing, China, 100084)(2Institute of Microelectronics, Tsinghua University, Beijing, China, 100084)

Abstract: The operating principle of typical MOSFETs

AC/DC rectifier is introduced in this paper. In order

to maximize the operating range of RFID transponder,low-power design techniques are needed. Therefore, the

key design parameters optimization of passiverectifier is discussed. Besides, the design of a

low-power rectifier for passive UHF RFID transponder,which is compatible with standard CMOS process and can

be applied to the environment in which the distance

from interrogator changes greatly, is also presentedin this paper. Measurement results showed that if a 510

kilo-ohm resistance is added at the rectifier outputand 4W EIRP interrogator transmit power, the rectifier

can output 1. 6V to 2V DC voltage, the minimum RF inputpower is about 230 y. W corresponding to a readingdistance of 3. 45m.

Keywords: RFID Rectifier Transponder

1 Introduction

Rectifier, also called charge pump or voltagemultiplier, converts input RF signal received by theantenna into a stable DC supply voltage for the analogfront-end circuits, base-band DSP block and memoryof RFID transponder. Depending on the type of inputs,rectifier can be classified as AC/DC and DC/DC types[4]. This paper only focuses on the former. Rectifier isone of the essential parts of the RF Front-End circuitsof RFID transponder. High sensitivity, low-powerrectifier is one of the most critical circuits of RFID

transponder.Typical AC/DC Rectifier circuit architecture used

in common is composed of N-stage capacitor-diode

Project D0305003040111 is sponsored by Beijing Municipal Science &

Technology Commission.

network[l][2]. This architecture is based on theDC/DC charge pump circuit, which is proposed byDickson in 1976[3]. Owing to low series resistance,little threshold voltage, large saturation current andlow Schottky junction capacitance, Silicon-Titanium

Schottky diodes are generally used in AC/DC rectifier.However, the particularity of manufacturing

processes for Schottky diodes and the inconsistency in

quality between different product processes often makethe integration of Schottky rectifier incompatible withstandard CMOS circuits and then limit its application[4]. So, various junction diodes, such as diode-connected MOS FETs, instead of the Schottky diodesare used in rectifier.

One of the main obstacles that restrict the

development and the application of passive RFID

transponder is the performance of RF rectifier. The

primary index of it's performance is the powerefficiency and the stabilization of the output supplyvoltage. Low-power, long operating range rectifier

design is also a critical project. This paper is concernedwith the above issues.

This paper is divided into five sections. In Sectiontwo, the basic principle of N-stage MOS FETsrectifier is introduced. Rectifier optimization analysisis described in Section three. The design of low-powerUHF passive rectifier is presented in Section four. Andexperimental results are given in Section five.Conclusion is given in Section six.

2 Basic Principle Of N-StageMOS FETs Rectifier

In this section, we will analyze the N-stage MOS

1-4244-1044-4/07/S25.00 ©2007 IEEE.309-

IEEE 2007 International Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

-)|-^-

(

M:\ t;i_

M4

\)1 WH

\\-fMl ('

J lt>ut

V'OLlt

tx

Figure 1. The N-Stage NMOS AC/DC rectifier.

FETs rectifier in details and introduce its basic

operating principle.A N-stage rectifier consists of a cascade of N

peak-to-peak detectors used ultra-low threshold

voltage MOS FETs, whose drain and gate terminalsare connected directly, as shown in Fig.2. The

capacitor C is the coupling capacitor, which answers

for the transfer of electric charge. The capacitor CL,whose value is generally large, is responsible for

depositing charge (energy). Supposed that therectifier's input is a sinusoidal voltage Vrf, with a

frequencyf0 and amplitude V0.vrf(t) = V0coS(2xf0t) (1)

As diodes used and the operating mode is mainlyabout charging and discharging, rectifiers are

nonlinear circuits[6]. And they have a complex startupprocess, which is difficult to analyze. Rectifiers are

also nonlinear in the steady state. However, we can

use an approximately linear model to analyze [6].Assumed that all transistors are identical, the outputcurrent is stable and all the coupling capacitor can beconsidered as short at the operating frequency, we

analyze MOS AC/DC rectifier as follows.A. The Operating Principle of N-stage rectifier

(Neglecting the Parasitic Capacitor ofTransistors)The Nth stage unit rectifier cell is shown in Fig.3

(a) and (b).CH(N) is the horizontal coupling capacitor,CV(N) and CV(n-i) is the vertical capacitor.

During the negative phase of input RF signal Vrfindicated in Fig.3 (a), when VN.i>Vd^Vrf, the transist¬

or M2n-i turns on, for VK< VN at this time, the transistorM2n turns off. The charge transfers from capacitorCv(n-i) to capacitor CH(n), at the end of this chargingprocess, the transistor M2n-i turns off. When the inputsignal changes to the positive phase shown in Fig.3(b), the voltage of input signal increases, and VKincreases also, when VK>VN, the transistor M2n turns

on, the charging current IN flows from capacitor CH(n)to CV(N). At the end of this process, some charges on

capacitor CV(n-i) have been transferred to capacitorCy(N).

For N-stage rectifier as shown in Fig.2, in the dc

analysis, all the transistors are connected in series, so

the dc voltage between every transistor's two

terminals is given by

V d̂(dc)(2)

2NAnd in the RF analysis, all the coupling capacitors

can be considered as short-circuits, therefore, all thediode-connected transistors are connected in parallelor unparallel between the RF inputs. The ac voltage of

every transistor is given byV +V (3)V d(ac) ~~V rfV '

where the sign "+" is applied to transistors with an

even subscript and the sign "-" is applied to transistorswith an odd subscript. So, the voltage that drops across

each transistor is given by

K, -V +Vy d(dc) ^ y d(ac) --+Vrf out

2N(4)

From the equation above, we can deduce that the

output dc voltage isin-:

[.I UM-^ Y:\ym

Vlf© IVhviV\-irnl

.CSiK'CviN

Vx

± Vf4LM2VlVITO

y^JLijiM:CniNi

eV\-i%

Vs

vi\)

Figure 2. (a) The Nth-Stage Rectifier during the NegativePhase of input RF signal and (b) The Nth-Stage Rectifier duringthe Positive phase of input RF signal. ( Cs(k) is the sum of all

parasitic capacitors at the terminal K).

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IEEE 2007 International Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

Vmt=2N{Vrf-Vd(even)) (5)

Where VRevert) is the voltage drop on the transistors

with an even subscript.B. The Operating Principle ofN-stage rectifier(Take

Parasitic Effect into Account)The analysis above doesn't consider any parasitic

effects. Because the input signal of rectifier is largesignal, the amplitude is often up to several hundreds

millivolts, all the transistors operate at large signalcondition. The large signal equivalent model of

diode-connected transistor is shown in Fig.4[5]. The

sum of all parasitic capacitors at the terminal K, that is

CS(K), is given by

c = c + c +r^ S(K) ^BS(N-l) ^^BD(N) ^^GB(N) (6)

As indicated above, in the RF analysis, the voltageacof terminal K .CH{N)Vrf l{cH(N)+CS{K)). So the

voltage of every transistor is given byV =+C V lie +C ) (7)V d(ac) .^H(NY rf 'V^H(N) ^ ^S(K) J

So, the voltage that drops across each transistor is

given byV = Vv d v d(dc) + V =+C V lie +C )+^out/ (8)^ V d{ac) -^H{N)V rf 'V^H(N) ^^S(K)/^ /2N

And the output voltage also changes to

'N = ^^\^H(NYrf 'y^H(N) + ^S(K))~ "d(even)) ^ '

The equation (9) shows that the larger the

capacitance of parasitic capacitor CS(k) is, the lower of

output voltage is. For the same output voltage andload, the amplitude of RF input should be increased.And the RF input power should be increased too.

Therefore, the power efficiency will decrease. So we

should take care of the size of transistor and layout,try to reduce parasitic effect.

Owing to short connection between gate and drain,all NMOS FETs operate in saturation region, namely,

rs

Source

Cbs

CgsIds

lbs 4 Yds$Vbs Vbd*

.llxl

ra

Cp

v v'""' Drain(Gate)

Rdb=l/gdb

Substrate Cp=Cbd-Csib

Figure 3. the large signal equivalent model of diode-

connected transistor

Vd = Vds = j2IdsL/(M.CmW) + V,h (10)According to the equation (5), it is clear that with a

constant output current Iouh the smaller the threshold

voltage, the lower V& and the higher the output dc

voltage Vout is. In the practical design, low threshold

transistors [7] or nearly zero threshold transistors [4]are used.C. The Body Effect and Ripple Voltage

If rectifiers use NMOS FET, the substrate bias

voltage Vsb (positive for n-channel devices) is equal to

the voltage Vt(l<i<N) . The voltage across the

reverse-biased source- substrate junction will increase

the threshold voltage of the transistor.The bigger transistors' subscript is, the higher the

threshold voltage, and then the lower voltagemultiplier DC output is. The dependence of thethreshold voltage on the source-substrate voltage is

expressed by [5].

Vth=Vm+y^2(pf+VSB-j2ff) (ll)It should be noted that there will be a small ripple

voltage, Vr9 at the output [3]. This ripple voltage is

given byV.

f C f R CJ osc out J osc L oi

(12)

The ripple voltage can be substantially reduced byincreasing the operating frequency fosc or using a largeoutput capacitance Cout. In the latter case, it would

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IEEE 2007 International Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

make the rectifier significantly longer to reach steadyoutput state.

3 Optimization AnalysisFor a voltage rectifier, the design parameters of the

rectifier are the size of transistor, the capacitance of the

coupling capacitor and storage capacitor and thenumber of stage. There are some tradeoffs in AC/DCrectifier design, such as the tradeoff between qualityfactor, power efficiency, output voltage, inputimpedance, operating point (load)[2] and engineeringfeasibility of matched antenna. Optimizationparameters include the number of stages, the size of

Schottky diode or transistor, the capacitance of

coupling capacitors and energy storage capacitor.As for the size of transistor, large W/L will result

in large saturation current, but, the reverse current willincrease too. So, the output voltage will increase withthe increase of W/L, however, the power efficiency isnot the case. The output voltage and power efficiency

0.43f

0.4

> 0.35

> 0.3

0.25

0.2

(a)Number of Stages Number of Stages

Figure 4. (a) the output voltage VDD versus the size of

transistor of four stages rectifier, and (b). the power efficiencyversus the size of transistor of four stages rectifier.

./..

0.4UHttK H-VDD=" _.1--'

:0 40W il_=0.5u)

20 40W (L=0.5u)

0

(a) ". (b)Figure 5. (a) the input voltage Vin versus the number of

stages, and (b). the power efficiency versus the number of

stages.

are a function of W/L, shown in Fig 5(a) and Fig. 5(b).When it is comes to the number of stages. Owing

to the body effect, the transistors' threshold willincrease, and the power efficiency of rectifier willdecrease. So the maximum power efficiency isobtained by using the minimum number of stages [8].However, it is clear that the output voltage will be

higher with more numbers of stages. And thesimulation result is shown in Fig 6 (a) and Fig. 6(b).

Therefore, considered the power efficiency, we

should choose a proper number of stages and optimizethe size of transistors.

4 Design and ImplementationWe designed an eight-stage rectifier, which is

shown in Fig.6. In this design, we use

detector-connected ultra low threshold voltageMOSFETs instead of Schottky diode. The I-Vcharacteristic of the diode-connected transistors isshown in Fig.7. The figure shows that the threshold ofthis type transistors is only about 50mV, though thereverse current of this type MOSFET is higher than theone of general threshold voltage MOSFETs, theforward current is much larger than reverse current. Sothis type of transistor fits better for the AC/DCrectifier.

The protocol of this RFID system is ASK

modulation, In order to increase the time constant andreduce the ripple voltage, a large capacitance capacitoris used to deposit charge transfer- red from the former

stage and act as chip power supply.The operating distance of RFID varies dramatically,

so the dynamic range of RF input power may be as

high as 30dB. In order to make all the circuits work

normally, the power supply can not be too high.Voltage regulator or voltage limiter is needed to limitthe power amplitude when rectifier is in near field.

Voltage limiter of this design is shown in Fig.6. It is

composed of a voltage dividing circuit and a current

leak-off circuit. The voltage dividing circuit consistsof four cascade diode-connected PMOS transistor and

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IEEE 2007 International Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

Voltage Lil

Figure 6. the circuit of low-power AC/DC rectifier

Figure 8. the I-V character of voltage limiter

//

.~- *r-

<f

Figure 7. the I-V characteristic of the diode-connected ultra

low threshold transistors.

a resistor. When the output voltage of rectifier is higherthan 2V and the ripple voltage is AV, the ripplevoltage of resistor is aAV (0<a<l). The leak-offtransistor is on and the deposit capacitor is discharged,so the output voltage of rectifier reduces. The I-Vcharacter of voltage limiter is shown in Fig.7(b).Voltage limiter is off until the output voltage ofrectifier is more than 2V. Simulation results showedthat if input RF power is no more than 1.5mW, the

output voltage of rectifier is lower than 2.5V.

5 Measurement Results

The proposed rectifier is implemented in a 0.18umCMOS process. The die photograph is shown in Fig.9.The size of the whole chip is 470um><500um. Therectifier can be easily integrated in RFID transponderand is compatible with standard CMOS processes.Table I shows the input impedance of rectifier. The

Figure 9. Chip photogragh

measurement results of input RF power versus the

output voltage is shown in Fig. 10. The minimum inputRF power is 230uW in order to output 1.8V. At thecondition of an interrogator operating at 915MHz and4W EIRP and assuming a 0-dB rectifier antenna gain,the rectifier can operate at a distance of 3.45m. Fromthe Fig. 10, it is clear that at large RF input power, the

0.5 1Power in / tnW

1.5

Figure 10. The measurement results of input RF power versus

the output voltage

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IEEE 2007 International Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

output voltage is no higher than 2.5V, the voltagelimiter circuit works successfully.

TABLE I. Rectifier Measurement Results

Frequency

915MHz

Rectifier

Re(Zin)/Q28.2

Im(Zin)/Q-40.9

6 Conclusion

This paper has introduced the operating principleof N-stage MOSFETs AC/DC rectifier with parasiticcapacitance, body effect and ripple voltage considered.We also discussed design parameters optimization andsome critical tradeoffs in low-power rectifier design.The design of a low-power passive AC/DC rectifierhas been presented. The measurement results showedthat at the condition of 4W EIRP and 0-dB antenna

gain, this rectifier can operate at the distance of 3.45mand can accommodate the environment of largedynamic range ofRF input power.

Reference

[1] Klaus Finkenzeller, RFID Handbook: Fundamentals andApplications in Contactless Smart Cards andIdentification, 2nd ed. New York:Wiley,2003, pp. 85-96,70-80, 55-63.

[2] U. Karthaus and M. Fischer, "Fully integrated passiveUHF RFID transponder IC with 16.7-^ minimum RFinput power," IEEE J .Solid-State Circuits, vol. 38, no. 10,pp. 1602-1608, Oct. 2003.

[3] J.Dickson, "On-chip High-Voltage Generation in NMOSIntegrated Circuits Using an Improved Voltage MultiplierTechnique," IEEE J. Solid-state Circuits, vol.11, no.6, pp.374-378, June 1976.

[4] Yuan Yao, Yin Shi, " a novel low-powerinput-independent MOS AC/DC charge pump", Circuitsand Systems, 2005. ISCAS 2005. IEEE InternationalSymposium on 23-26 May 2005 Page(s):380-383 Vol. 1.

[5] Philip E. Allen, Douglas R. Holberg, "CMOS analogcircuit Design", Second ed. pp. 75-85.

[6] J.-P.Curty et al., "A model for //-powered rectifieranalysis and design", IEEE Trans. Circuit Syst. I, Reg.Papers, vol.52, no.12, pp 2771-2773, DEC. 2005.

[7] Jari-Pascal Curty, Norbert Joehl, Catherine Dehollain,Michel J.Declercq, "Remotely Powered Addressable UHFRFID Integrated System", IEEE J .Solid-State Circuits,vol. 40, no. 11, pp. 2193-2202, NOV. 2005.

[8] Giuseppe De Vita and Giuseppe Iannaccone, "DesignCriteria for the RF Section of UHF and MicrowavePassive RFID Transponders", IEEE Transaction onMicrowave and Techniques, vol.53, no.9, pp. 2978-2980,Sep. 2005

Author Biographies

Changming Ma received theB.S. degree in electronic

engineering from BeijingUniversity of Aeronautics andAstronautics in 1999, and theM.S. degree in the electronic

engineering from Tsinghua University, Beijing, Chinain 2006.

During the autumn of 2004, he joined CAS Labs,EE department of Tsinghua University, where he was

involved with low power RFID front-end design. Hisresearch interests include low power Mixed signalcircuits and RF circuits design in CMOS technologies.

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