implementation of a novel digital active emi technique in a dsp-based dc–dc digital controller...

3126 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013

Implementation of a Novel Digital Active EMITechnique in a DSP-Based DC–DC DigitalController Used in Electric Vehicle (EV)

Djilali Hamza, Senior Member, IEEE, Majid Pahlevaninezhad, Member, IEEE,and Praveen K. Jain, Fellow, IEEE

Abstract—With ever increasing green-house gas emissions fromfossil fuel-driven automobiles leading to acute environmental pol-lution, and ever depleting reserves of fossil fuel, today need for thedevelopment of pure electric vehicle (EV) is of utmost importance.Presently, there is an immense impetus to develop plug-in EVs.High switching frequency and high-power ac–dc PFC converterwith an isolated output and a dc–dc isolated converter are essentialsystems for transferring from utility mains to the different batterypacks which store energy for propelling the EVs. Electromagneticcompatibility (EMC) with strict regulatory standards is an essen-tial requirement which any switch mode power converter mustcomply with not only for its own operation but also for safe andsecure operation of surrounding electrical equipment. EVs possessmany sophisticated electronic circuits in the vicinity of the bat-tery charging power converters, so strict EMC standards of theon-board power converters should be met. For a cost-effective de-sign approach, EMC should be considered at the primitive stagesof the power converter design. The most commonly used passiveelectromagnetic interference (EMI) filters used for EMI mitigationin power converters come at the expense of cost, size and weight,power losses, and printed circuit board (PCB) real estate. In thispaper, a novel embedded digital active EMI filter (DAEF) inte-grated into the DSP-based digital controller of a dc–dc converterapplicable for charging the low-voltage battery bank of an EV isproposed and analyzed. Experimental results and comparison ofthe performance of the proposed embedded DAEF with a conven-tional EMI filter are presented in this paper so as to validate thefeasibility of the proposed EMI filter and its advantages over theconventional one.

Index Terms—Common mode (CM) electromagnetic interfer-ence (EMI) noise, differential mode (DM) EMI noise, electric vehi-cle (EV), EMI filter, high-frequency dc/dc converter, X-Capacitor,Y-Capacitor, zero-voltage switching (ZVS) operation.

I. INTRODUCTION

AUTOMOTIVE industry faces two large-scale challenges:collective awareness of the man-made impact on the envi-

ronment and the world oil reserves depletion. These two issues

Manuscript received January 31, 2012; revised May 16, 2012 and August10, 2012; accepted September 25, 2012. Date of current version December 24,2012. Recommended for publication by Associate Editor B. Wang.

The authors are with the ePOWER, Department of Electrical and ComputerEngineering, Queen’s University, Kingston, ON K7L 3N6, Canada (e-mail:[email protected]; [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2012.2223764

are undeniable and still form the top agendas of a large num-ber of people and institutions: persistent changes are, therefore,required. These changes follow two nonconflicting paths: a so-ciological approach to transportation and a reduction of theenvironmental impact caused by the vehicles. The sociologicalapproach requires a radical change in personal attitudes, and asignificant overhaul of the economic activities related to trans-portation. The attitude is somewhat impossible given the fact ourdependence on cars. However, a technical solution to reduce theenvironmental impact is rather collectively acceptable. This isembodied by the electric vehicle (EV). Moreover, the adventof the all-electric vehicle faces two pitfalls: a lack of technicalmaturity and a difficulty of the public acceptance. This is mainlydue to its autonomy which is limited by the energy stored in thebattery and the recharge time, whereas the conventional internalcombustion engine vehicle (ICEV) has more mobility in termsof mileage and an insignificant time to refill the tank. Today,most of the technical efforts focus on these two aspects namelyautonomy and recharge time. Unfortunately, the results have notreached the market expectations. This leads to a compromise so-lution which is the hybrid (gas/electrical) vehicle (HV). While,the all-electric vehicle is not ready for large-scale deployment,the hybrid vehicle (HV) and fuel cell vehicle (FCV) are a realitywith more than one million cars on the road.

Extensive research efforts have been focused on developingefficient, reliable, and low-cost power conversion techniques forthe future new energy vehicles [1]–[6]. Two main configurationscan be distinct: the plug-in hybrid electric vehicle (PHEV) andthe fuel cell hybrid electric vehicle (FCHEV). The latter hasan advantage of using hydrogen-based energy required for itsautonomy. However, the FCHEV is seen as a long-term solu-tion due to its actual cost and its complex manufacturing. TheFCHEV configuration is shown in Fig. 1.

As for the PHEV, it is a full hybrid vehicle with particularcharacteristics of having a high-voltage batteries which can becharged using a conventional 110 Vac outlet. The drive trainconsists of two drive options: one is the full drive in whichthe vehicle is driven using full electrical energy stored in thebatteries, whereas the other option is the mixed drive where thecombustion engine is used when necessary. These options placethe PHEV to be one of the best vehicles in terms performance,lower CO2 emissions, and higher fuel economy. The first PHEVprototype was designed in 2004 by the California cars initiative.Other prototypes emerged then after. The block diagram of thePHEV configuration is depicted in Fig. 2.

0885-8993/$31.00 © 2012 IEEE

HAMZA et al.: IMPLEMENTATION OF A NOVEL DIGITAL ACTIVE EMI TECHNIQUE IN A DSP-BASED DC–DC DIGITAL CONTROLLER 3127

Fig. 1. FCHEV configuration.

Fig. 2. PHEV configuration.

In both configurations, either the high-voltage battery or thesupper capacitors in parallel with the fuel cell are used to as-sist the propulsion of the vehicle during transient and to absorbthe kinetic energy during regenerative braking. In the FCHEVtopology, the fuel cell pack is connected to the dc bus via aboost converter and the energy storage battery is connected tothe dc bus via a bidirectional dc–dc converter. In the PHEV,the source of energy is directly drawn from the grid and itis used to charge the high-voltage (HV) battery pack throughthe ac–dc converter which includes the power factor correction(PFC). The HV battery provides the required energy to drivethe electric ac motor through the dc–ac inverter. The full-bridge

dc–dc converter is tapped from the HV battery source to chargethe low-voltage (LV) battery to provide power to auxiliarycircuits.

For cost-effective design approach which is essential in theever competitive automotive market, electromagnetic compati-bility (EMC) should be considered at early stage of the powerconverter design. Hence, designing to achieve EMC involves aseries of measures to reduce emissions at the source. This canbe done by identifying and minimizing the coupling paths anddiverting Common-mode (CM) noise away from the ground. Asproduct development progresses from the design stage to testingthe prototype and mass production, the range of available noisesuppression techniques decreases steadily.

The active analog electromagnetic interference (EMI) filtersprovide the basic noise suppression technique and their main ad-vantages are low cost and ease of use. However, their limitationscall for a requirement of additional passive elements to completethe EMC spectrum in terms of noise attenuation [7]–[10]. Also,the issue of the negative impedance seen by the converter canhave a great impact on its stability [11]–[13]. This is mainly dueto the component selection of the passive elements of the EMIfilter and the final installation of the converter. Hence, know-ing the interface impedance of the filter is a critical conditionin the converter stability. Furthermore, the size of the passiveEMI filter (PEF) is product specific and varies with the inputparameters such as rated current and voltage of the converter.Other suppression techniques such as frequency modulation andspread-spectrum techniques are detailed in [14] and [15].

The performance versus cost reduction trends of digital cir-cuits has made possible their application for power convertersdigital controller techniques [16]–[24]. Some recent publica-tions regarding the design of EMI filter in power convertershave been presented in [25]–[28]. These are very helpful inunderstanding the design procedure.

The focus of this paper is to integrate the DAEF into thedigital controller of the full-bridge dc–dc LV battery chargerconforming to EN61000-6-4 EMC standards. The applicationof such an EMI suppression technique will eliminate the stand-alone EMI filter which consists of large common mode chokes,X and Y capacitors. Therefore, a cost effective, lighter weight,and efficient power converter solution can be achieved. Theproposed integrated solution can also minimize components vi-bration, and provide higher power density which are imperativefor automotive power converters. The stability assessment ofthe dc–dc converter including the DAEF will be investigated,to ensure a safe operation of the converter while providing asignificant EMI suppression. Experimental results will be pro-vided to validate the concept of the proposed DAEF on a dc–dcfull-bridge converter used to charge the 12 V battery of a plug-inEV and its superiority over the conventional EMI filter will alsobe highlighted.

This paper is organized as follows. In Section II, the dc–dcpower converter topology is introduced and a brief dynamicmodeling is presented. Section III presents an embedded con-troller design strategy and related method of analysis of systemstability. In Section IV, a systematic design procedure for de-signing an EMI filter for a power converter to achieve EMC


S1

Laux1 Laux2

C1

C2

C3

C4

Ll

CFo

12V Battery

VAO

S3

S2 S4

SR1 SR2

LF1 LF2

HV-BatteryVBO

T1

Fig. 3. Circuit diagram of the full-bridge dc/dc converter.

with EN61000-6-4 standards is discussed. In Section V, theembedded controller is designed along with the proposed DAEF.Section VI shows the experimental results obtained from theconverter prototype along with comparative EMI performanceof the embedded DAEF and the PEF. Section VII presents theconclusion.

II. CIRCUIT DESCRIPTION

In this section, a brief description of the dc–dc full-bridgeconverter used for charging the 12 V battery bank of an EVdeveloped in collaboration with Freescale Semiconductor, Inc.,Tempe, AZ, is presented. Dynamic modeling of the converter isalso done in this section.

Switched-mode power converters are widely used in energystorage applications [29]–[33] due to their high efficiency, rel-atively small size, and low cost. In addition, to maintain low-profile power converters, their switching frequency needs tobe increased. This results in higher losses and EMI pollutionwhich is critical for PHEV because of the susceptible vehi-cle computer. To resolve the aforementioned issues, a resonantconverter should be used with zero-voltage switching (ZVS)or zero-current switching features. This inherent soft switch-ing makes the resonant converter to be an adequate candidatefor many power applications. The full-bridge resonant dc/dcconverters are the most popular topology used in the powerrange of one to few kilowatts (1–5 kW). Since the switch rat-ings are optimized for the full- bridge topology, this topologyis extensively used in industrial applications, in particular to beused as auxiliary chargers in the automotive industry [34]–[37].High efficiency, high power density, and high reliability arethe bench-mark features of this topology. The power circuit ofthe full-bridge converter with an asymmetric auxiliary circuitis shown in Fig. 3. The steady-state analysis of this circuit isexplained in [38].

This circuit can be broken into the following functionalblocks: two auxiliary circuits (C1 , C2 , Laux1) and (C3 , C4 ,Laux2), full-bridge MOSFET (S1 , S2 , S3 , S4), a series induc-tor Ll , a high-frequency power transformer T1 , synchronousrectifier (SR1 , SR2), and the output filter (Lf 1 , Lf 2 , CF o).

The auxiliary circuit has the following functions.

1) Inductors Laux1 and Laux2 provide compensating currentto achieve ZVS at higher input voltage.

2) Capacitors C1 , C2 and C3 , C4 split the dc input voltage.The fact that the LV battery requires high current and a con-

stant LV in this application, the current doubler synchronousrectifier is able to effectively lower the output inductor copperlosses. Hence, the overall efficiency of the power converter canbe significantly improved. The operating principles of the cur-rent doubler synchronous rectifier are fully addressed in [38].

III. CONTROLLER DESIGN STRATEGIES

AND STABILITY ASSESSMENT

A low-cost and high-performance digital signal processing(DSP) device, with integrated analog to digital (ADC) convertersand pulsewidth modulator (PWM), makes the digital control ofpower converters an attractive control solution. A DSP-baseddigital controller allows the implementation of more functionssuch as power management and circuit protection without theneed for additional discrete components. Some advantages ofdigital control are as follows:

1) flexibility of design modifications;2) low susceptibility to environmental variations;3) reduced aging;4) Better noise immunity.There are two different approaches in designing a digital con-

troller for switch mode power converters. These are, namely,the design by emulation, also known as digital redesign, andthe direct digital design. The former is being the most popularsince it requires minimum exposure in the z-domain. The dig-ital redesign method is based on an analog compensator whichis derived in the s-domain using traditional design methods.The analog controller is then converted to a discrete-time com-pensator by some approximate techniques such as backwardEuler, bilinear, and pole/zero matching. Although the backwardEuler method and the pole/zero matching method produce sim-pler transfer functions in the z-domain, the bilinear methodprovides good approximation as it preserves the gain and phaseof the analog transfer function up to approximately one-tenth ofthe sampling frequency.

In the direct digital controller method, the continuous timepower plant model is first converted into its discrete equivalentmodel with ZOH and the sampler. Once this is available, thediscrete-time compensator is designed directly in the z-domainusing methods similar to the continuous-time frequency re-sponse methods. This has the advantage that the poles and zerosof the digital controller are directly placed, resulting in a betterload transient response. The phase margin and bandwidth of theclosed-loop system are also improved as a result.

IV. PEF DESIGN

Currently, there are no specific standards pertaining to EVpower converters. However, a harmonized standard has beenapplied to the equipment under test (EUT) used in EVs. Thestandard EN61000-6-4 [39] is adopted in this research to assessthe conducted EMI. This standard is sought to be the mostrelevant one that can be applied to the EUTs in EVs.


HV Battery

Lf

Cf

Full-BridgeDC-DC

ConverterAnd

Loads

Rd

Cb

EMI Filter

Interface A Interface B

ZBatt ZIF ZOF ZIC

Fig. 4. Impedance compatibility criterion.

In this subsection, a step-by-step filter design procedure isgiven to illustrate how the design meets both the design criteriaand the EMC specifications as per EN61000-6-4 standards [39],[40]. A cost-effective design approach of any power convertershould include EMI noise mitigation for EMC at the early stageof the power converter design. Hence, designing to achieve EMCinvolves a series of measures to reduce emissions at the source.This can be done by identifying and minimizing the couplingpaths and diverting CM noise away from ground. As productdevelopment progresses from the design stage to testing theprototype and mass production, the range of available noisesuppression techniques decreases steadily.

A. Design Strategy

Fig. 4 shows a single-stage EMI filter, Lf and Cf , with adamping branch circuit Rd and Cb , where Rd is the damping re-sistor and Cb is the dc-blocking capacitor. Cb should be selectedwith very low ESR to minimize the losses. ZBatt , ZIF , ZOF ,and ZIC are the battery impedance, the filter input impedance,the filter output impedance, and the converter input impedance,respectively.

As illustrated in Fig. 4, the design goals of preventingimpedance interaction at both sides of the EMI filter can betranslated into the following impedance criterion:

1) |ZBatt | � |ZIF | at Interface A of Fig. 4;2) |ZOF | � |ZIC | at Interface B of Fig. 4.

B. Design Procedure

In this subsection, a step-by-step filter design procedure isgiven to illustrate how the design meets both the impedancecompatibility and the EMC specifications as per EN61000-6-4standards. The circuit parameters of the full-bridge converterare shown in Table I.

Assumptions:1) maximum magnitude of the HV battery impedance:

|ZBatt | = −5 dB;2) minimum magnitude of the input impedance of the full-

bridge converter: |ZIC | = 40 dB;3) the input current of the full-bridge converter: 10 A with a

switching frequency of 200 KHz.1) Evaluate the Fundamental Harmonic Current: The in-

put current of the full-bridge converter is featured as a square

TABLE IKEY SPECIFICATIONS OF THE FULL-BRIDGE DC/DC CONVERTER

wave, and is characterized by its peak current IP , duty cycle D,switching frequency fs (or period Ts = 1/fs ), and its rise/falltime tr . Taking the Fourier transform of the square-wave signal,the fundamental harmonic current can be obtained as

Ih f u n d = 2IpDsin (πD)

πD.sin (πtr/Ts)

πtr/Ts. (1)

The fundamental current is then converted into voltage usingthe capacitor’s ESR around 100 mΩ. For the design example ofTable I, the noise level can be evaluated as Vn = 90 dB·μV.

2) Select a Target Noise Level and Deduce the Desired At-tenuation Level: The maximum limit is 79 dB·μV imposed bythe EN61000-6-4 standard from 150 to 500 kHz range. An at-tenuation level of a 36 dB·μV, including a safe margin, was setin this design. This implies that the EMI filter should providean attenuation of: 90−36 = 54 dB·μV.

3) Calculate the Corner Frequency fc of the EMI Filter:Calculate the corner frequency of the EMI filter that will lead to54 dB·μV attenuation at fs = 200 kHz

fc =fs

10−5 4−4 0

≈ 9 kHz. (2)

4) Calculate the Damping Resister Rd : The input filtershould be designed so that its maximum output impedancematches its minimum input impedance. This can be expressedas

|ZOF |max = |ZIF |min =|ZIC |min + |ZBatt |max

2k(3)

where k is a constant that provides a design tradeoff between theimpedance gaps at interface A and interface B. In this design, kis equal to 1, true for most practical applications, and keeps theimpedance |ZBatt |max � |ZIC |min relation valid.

By substituting the numerical values into (3) yields

|ZOF |max = |ZIF |min = 17.5 dB. (4)

The impedance gap can be expressed as

|ZGap | =|ZIC |min − |ZBatt |max

2= 22.5 dB.

The damping resistor can be calculated as

Rd = 10|Z O F |m a x

2 0 = 8 Ω. (5)

5) Calculate the LC Elements of the Input EMI Filter: Thevalues of the inductor and capacitor of the input filter can becalculated as

Cf =1

2πfcRd(6)


Fig. 5. Closed-loop block diagram of the converter.

Lf =1

(2πfc)2Cf= 1.4 mH. (7)

The value of the dc-blocking low ESR capacitor can be esti-mated as

Cb = 5Cf = 11 μF. (8)

V. DIGITAL CONTROLLER DESIGN

The direct digital controller approach proposed in [41] and[42] is adopted in this application. In this method, the averagemodeling of the power stage is obtained in the continuous time.Digital poles and zeros with the integrator are added to designthe compensator which is converted to the s-domain using therelationship

Z−1 = e−sTs = e−J 2π ·f ·Ts .

The layout of the closed-loop block diagram including theproposed DAEF is depicted in Fig. 5. The control system con-sists of two independent digital control loops embedded into oneDSP device and acts upon the power converter. The first loopconsists of a dual external voltage loop and an inner currentloop. The external voltage loop takes the reference value of theoutput voltage from the charging curve of the battery. This curvevaries according to the battery characteristics and the interfaceimpedance between the battery and the converter. The measuredvoltage is discretized using the ADC converter that is integratedinto the DSP device. The resulting digital error is compensated

by the digital voltage controller HV (z). The digital controllerdetermines the reference value of the charging current of theinner loop. This value is compared to the measured current. Thecurrent error is compensated by the current controller HC (z) inorder to produce the proper phase angle for the modulator. Thesecond loop is the DAEF controller which senses the EMI noiseat the input lead of the battery charger. The discretization ofthe conducted interference noise is done using a high-frequencyanalog-to-digital converter (ADC) with a sampling frequencyof 250 MSPS. A binary inverter is used to invert the EMI noisesignal and a digital-to-analog converter (DAC) has been used tore-construct the noise signal with a 180 degrees phase reversalas compared to the original sensed noise signal. The constructednoise signal is injected back at the input of the power converterfor noise signal cancellation. The RF inductor is necessary to de-couple the injection point from the sensed point to prevent thenoise signal from flowing towards the low impedance auxiliarycircuits interfacing the power converter.

A. DAEF Transfer Function

The frequency response analysis of the DAEF is presentedbelow to illustrate the feasibility of this technique. The feedbacksystem diagram of the DAEF is illustrated in Fig. 6.

The closed-loop system transfer function can be written as

Y (s)X(s)

=1

1 + K1K2H(s)Dzoh(s)G(s)(9)


Fig. 6. Feedback diagram of the digital EMI filter.

where Y (s) is the EMI source function at the quite port, whichis the utility side, and X(s) is the EMI source function at thenoisy port, which is the converter side.

X ′(s) is the injected EMI noise function after processing.In theory, X ′(s) should be equal in magnitude to the sourcefunction X(s), in order to achieve full nullification of the EMInoise. However, in reality, this cannot be realized due to theparasitic capacitance inherent in the circuit. Therefore, Y (s) =X(s) − X ′(s) �= 0.

K2 is the gain, which is equal to unity for phase reversal ofthe sensed signal, and K1 is the system gain.

H(s) is the Laplace transform transfer function of the high-pass filter and is given by

H(s) =s

s + ω1(10)

where ω1 = 2 · π · f1 = 1Rs ·Cs

is the corner frequency of thehigh-pass filter.

G(s) is the Laplace transform transfer function of the RClow-pass filter which is given by

G(s) =1

1 + sω2

(11)

where ω2 = 2 · π · f2 = 1R i n j ·C i n j

is the corner frequency of thelow-pass filter.

Dzoh(s) is the Laplace transform transfer function of thezero-order-hold (ZOH) ADC

Dzoh(s) =1 − e−sT

sT(12)

where T is the ADC clock/sampling period.By substituting s = jω into (12), the magnitude and phase of

the transfer function in frequency domain can be written as

Dzoh (jω) = T · e−j ω T

2 sinc(ωT/2π) (13)

where sinc(ωT ) is a normalized sinc function equal to sin(ωT /2)ωT /2 .

The gain and the phase can be obtained as

|Dzoh(jω)| =2 · TωT

∣∣∣∣sin

ωT

2

∣∣∣∣

(14)

<) Dzoh(jω) = −ωT

2. (15)

Thus, the effect of the ZOH on the feedback loop is to increasethe gain by a magnitude of sinωT

2 and introduce a phase shift ofωT2 , which is a negligible time delay.

Substituting H(s), G(s), and Dzoh(s) into (9) by (10), (11),and (12), respectively, the closed-loop transfer function of the

feedback diagram of Fig. 6 can be expressed as

Y (s)X(s)

=(s + ω1) (s + ω2)

s2 + (ω1 + ω2) s +[

ω1ω2 + K 1 K 2 ω2T (1 − e−sT )

] .

(16)

B. Stability Analysis

In order to investigate the stability of the converter systemincluding the DAEF, the frequency response of all the blocksneeds to be characterized. Furthermore, to have an infinite dcloop gain that converges into a zero steady-state error, the outputof each compensator passes through an Euler integrator. Theintegrator is described by the following transfer function:

HEulerIntegrator(z) =

11 − z−1 . (17)

A soft-complex conjugate zero pair is chosen due to its 180◦

phase boost and its gain increase of 40 dB/decade. This is illus-trated in Fig. 7. The transfer function of the complex zero pairis given by

HSoftZeropair(z) = 1 −

(

2 − 1b

)

· z−1 +(

1 − 1c

)

· z−2 . (18)

Using the conventional average modeling techniques, theclosed-loop control-to-output voltage transfer function and thecontrol-to-inductor current transfer function of the uncompen-sated system can be expressed, respectively, as

Tcl v

=ZOH ·HDelay ·Kpwm ·KADC ·HV sense ·Gv (s) ·GDAEF(s)

1 + ZOH ·HD e lay ·Kpw m ·KA D C ·H s e n s e ·Gv (s) ·GD A E F (s)1+ZOH ·HD e lay ·KA D C ·H s e n s e ·Gi (s)

(19)

Tcl i =1

1 + ZOH · HDelay · KADC · HC sense · Gi(s)(20)

where ZOH is the zero-order-hold transfer function given as

ZOH =1 − z−1

s · T . (21)

HDelay is the delay function given as

HDelay = e−sT = z−1 . (22)

KADC is the ADC converter gain, with n being the numberof bits, given by

KADC =Logical Value RangePhysical Value Range

=1 − 2−n

V0 max. (23)

HV sense and HC sense are the output voltage and inner currentsensors, respectively. They consist of the sensing gain Ksenseand a first-order RC filter whose time constant is τRC . This isgiven by

Hsense =Ksense

1 + τRC · s . (24)


Fig. 7. Bode plot of a soft-complex digital zero pair used for the system compensation.

Kpwm is the gain of the PWM, which is given by

Kpwm =2m

Timer Period(25)

where Timer Period = fC lo ckfs

and m is the register bits format.The transfer function of the control to the output current of

the converter is derived as

Gi(s) =i(s)d(s)

=Vin · (1 + Ro · Cf · s)

s2 · Ro · Cf · Lf + Lf · s + Ro(26)

where Cf , Lf , and Ro are the output capacitor, the output in-ductor, and the load resistor, respectively.

Similarly, the control to output voltage of the converter isderived as

Gv (s) =vo(s)d(s)

=Vin

s2 · Lf · Cf + Lf

Ro· s + 1

. (27)

GDAEF(s) is the transfer function of the digital active EMIfilter (DAEF) and is given by

GDAEF(s) =(s+ω1)(s+ω2)

s2 +(ω1 +ω2)s+[ω1ω2 + K 1 K 2 ω2T (1 − e−sT )]

.

(28)The loop gains of the inner current loop and the outer voltage

loop of the compensated system can be, respectively, written asshown (29) and (30), at the bottom of the page.

Figs. 8–11 show the frequency response of the converter sys-tem for the inner current and the outer voltage loop gains withcompensation and without compensation, respectively, takinginto account the parameters presented in Table I. These plots in-dicate that the system without the compensation would result inan unstable system. Adding a soft-complex zero pair of b = 256and c = 1024 produces a phase boost of 180◦ at about 20 kHzin the inner current loop. The digital zero generates a significantincrease in the phase margin of the voltage loop. The compen-sated current loop has a cross-over frequency of 200 kHz with a

Fig. 8. Frequency response of the current loop (magnitude).

Fig. 9. Frequency response of the current loop (phase).

Ti comp = ZOH · HDelay · KADC · HC sense · Gi(s) · HSoftZeropair(z) · HEuler

Integrator(z) (29)

Tv comp =ZOH · HDelay · Kpwm · KADC · HV sense · Gv (s) · GDAEF(s) · HSoft

Zeropair(z) · HEulerIntegrator(z)

1 + Ti comp(30)


Fig. 10. Frequency response of the outer voltage loop (magnitude).

Fig. 11. Frequency response of the outer voltage loop (phase).

phase margin of 40◦. Similarly, the outer voltage compensatedloop gain exhibits a 64◦ phase margin at 6 kHz cross-over fre-quency. Low control bandwidth is used for the voltage loop dueto the slow response of the energy accumulator or the battery.

VI. EXPERIMENTAL RESULTS

To verify the coexistence of the DAEF along with the digitalcontroller of the power converter, a 2 kW dc–dc battery chargerhas been built. The system parameters are reported in Table II.

The control system algorithm is implemented using theTMS320F28335 eZdSp board. This DSP board has a floating-point DSP, which offers a very flexible environment for ad-vanced mathematical calculations. This DSP has a 12-bit ADCwith a sequencer that is able to convert multiple analog signalssequentially [43]. It also has six enhanced PWM (EPWM) mod-ules, which can produce the desired PWM signals with a veryhigh degree of flexibility [44]. The EPWM channels can be prac-tically used up to 100 kHz. However, for the higher frequencyrange, high resolution EPWM should be used to achieve a high-resolution PWM signal and to avoid limit cycle and instability.

TABLE IISYSTEM PARAMETERS

TABLE IIIFILTER COMPONENTS (DAEF AND PASSIVE) USED IN THE PROTOTYPE

The high-resolution module is embedded in the DSP [45]. Thecomponents used to implement the passive and the active EMIfilters are given in Table III.

Since the 12-bit ADC embedded in TMS320F28335 is onlyable to sample the signal up to 8.33 MHz, in the continuoussampling mode, it is not fast enough to sample the EMI noisesignal. Therefore, a high-speed external ADC is incorporatedinto the circuit in order to sample the EMI noise. This ADCis clocked by an external high-frequency oscillator. The partnumber of this ADC is given in Table III.

A conditioning circuit was designed as an interface betweenthe DSP and the power converter. A 14-bit DAC is placed on theprototype PCB to interface the 14-bit digital data coming fromthe DSP device. The reconstructed noise signal is then injectedback into the input lead of the dc–dc converter. The completesystem test setup according to CISPR 16-1 [40] is depicted inFig. 12.

Note that the selected DAC is able to provide 20 mA equiv-alent to 86 dB·μA or 120 dB·μV, which is more than the am-plitude of the EMI noise (roughly 90 dB·μV). Therefore, TheDAC is capable of providing enough current to be interfaced tothe power train. Moreover, the DAC is not connected directlyto the power train of the converter. There is a galvanic isola-tion between the output of the DAC and the power line of theconverter.

Fig. 13 shows the converter prototype with the PEF especiallyoutlined to emphasize visually the actual real estate that thepassive EMI occupy on the PCB.


Fig. 12. Test setup according to CISPR16-1.

Fig. 13. Converter prototype including the PEF.

Note that the standard CISPR16-1 only describes themethod of EUT set-up measurements, whereas the standardEN61000-6-4 describes the applicable limits for EMI measure-ments. Therefore, the EMI measurement set-up is based accord-ing to this standard in the experimental results.

Two main tests have been conducted. The first test is thestep response measurements on the load and line to reveal the

Fig. 14. Transient response to a disturbance on the load current from 50% to75%.

Fig. 15. Transient response to a disturbance on the load current from 75% to50%.

stability of the system, whereas the second measurement is keptfor the conducted EMI, in order to evaluate the performance ofthe DAEF in terms of noise attenuation.

The dynamic load (Chroma 63204), which is used to exam-ine the converter, has the capability to simulate the battery inthe constant current and constant voltage mode of charging.Therefore, the transient response of the converter is evaluatedby applying positive and negative step load changes.

Fig. 14 shows the system transient response to a step-updisturbance from 50% to 75% on the load current. A negligi-ble overshoot is observed with the system settling down afterfew cycles. Similarly, Fig. 15 shows the system response whenthe load current is stepped down from 75% to 50%. The con-ducted emission measurements were carried out according tothe CISPR16-1 test method.


Fig. 16. Conducted emission spectrum with the PEF.

Fig. 17. Conducted emissions spectrum with no EMI filter installed.

Fig. 18. Conducted emissions spectrum with DSP-Based DAEF installed.

The first test was done with the PEF designed into the dc–dcconverter and the result is shown in Fig. 16. An average peakof 60 dB·μV across the spectrum (150 kHz to 30 MHz) canbe observed, with the highest peak at 74 dB·μV. The secondtest was conducted with no EMI filter installed in the dc/dcconverter. The result is reflected in Fig. 17. From this figure, anaverage peak of 80 dB·μV can be seen, with the highest peak at94 dB·μV. Finally, a third test is performed with the DAEF only.The result is shown in Fig. 18. An average peak of 60 dB·μV isobtained, with the highest peak at 68 dB·μV.

From the aforementioned conducted EMI spectrum plots, itcan be deduced that replacing the PEF with the DAEF producessimilar or better performance, across the frequency range of150 kHz to 30 MHz. Fig. 19 shows the efficiency curve of the

Fig. 19. Efficiency curve of the converter.

dc/dc converter. This figure shows that the efficiency is more orless flat for a wide range of load variations.

VII. CONCLUSION

In this paper, the seamless integration of the DAEF has beendemonstrated as being a valid EMI solution for an industrial ap-plication such as the EV dc/dc battery charger. This paper brieflyintroduces the power conversion system of a battery poweredEV. It describes the different versions of the EV, namely thehybrid (HEV) and the PHEV. The latter proves to be the bestdrive system configuration compared to other topologies. Thecircuit analysis for the full-bridge resonant dc–dc converter usedas a battery charger in the PHEV has been presented. The dig-ital controller design, including the DAEF, has been derived.The stability assessment has been theoretically verified. Finally,experimental results were illustrated to validate the coexistenceof the DAEF with the digital controller and to achieve a sig-nificant EMI attenuation without the need for the PEF. Theelimination of the passive filter, whose components are shownin Table III, greatly reduces the size and weight of the overallconverter which is highly imperative for its application to EVs.Moreover, last but not the least, it should also be mentioned thatthe application of the proposed EMI filter reduces the overallcost of the converter which is extremely essential consideringthe automotive application of the overall converter.

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Djilali Hamza (SM’10) received the B.Sc. degreefrom Concordia University, Montreal, QC, Canada,the M.A.Sc. degree from Ecole Polytechnique deMontreal, Montreal, QC, and the Ph.D. degree fromQueen’s University, Kingston, ON, Canada, all inelectrical engineering.

Prior to joining academia, he was an ElectricalPower Conditioner Design Engineer for communica-tion satellites at Spar Aerospace, EMC ComplianceEngineer at the Canadian Aviation Electronics (CAEInc.), and an Optical Network Integration Engineer

at Nortel Networks. Since 2004, he has been a Senior Engineer and Gradu-ate Students’ Technical Advisor at the Queen’s Centre for Energy and PowerElectronics Research (ePOWER). His current research interests are focusedon electromagnetic interference issues in power electronics, use of integratedfiltering methods for EMI suppression in high-frequency switching power con-verters, enabling technologies for renewable energy sources, and grid interface.


Majid Pahlevaninezhad (S’07–M’12) received theB.S. and M.S. degrees in electrical engineeringfrom the Isfahan University of Technology, Isfahan,Iran, and the Ph.D. degree from Queen’s University,Kingston, ON, Canada.

He is currently a Postdoctoral Research Asso-ciate with the Department of Electrical and ComputerEngineering, Queen’s University. He was a Techni-cal Designer at the Information and CommunicationTechnology Institute (ICTI), Isfahan University ofTechnology, from 2003 to 2007, where he was in-

volved in the design and implementation of high-quality resonant converters.From 2008 to 2012, he also collaborated with Freescale Semiconductor, Inc.,where he was the leader of a research team involved in research on the designand implementation of the power converters for a pure electric vehicle. He isthe author of more than 50 journal and conference proceeding papers and theholder of 4 U.S. patents. His current research interests include robust and non-linear control in power electronics, advanced soft-switching methods in powerconverters, plug-in pure electric vehicles, and PV-microinverters.

Dr. Pahlevaninezhad is a Member of the IEEE Power Electronics Society andIndustrial Electronics Society. He also received the “Engineering and AppliedSciences Outstanding Thesis” award from Queen’s University and the distin-guished graduate student award from Isfahan University of Technology.

Praveen K. Jain (S’86–M’88–SM’91–F’02) re-ceived the B.E. degree (Hons.) from the Universityof Allahabad, Allahabad, India, in 1980, and theM.A.Sc. and Ph.D. degrees from the University ofToronto, Toronto, ON, Canada, in 1984 and 1987,respectively, all in electrical engineering.

He is a Founder of CHiL Semiconductor, Tewks-bury, MA, and SPARQ System, Kingston, ON. Hewas a Production Engineer with Crompton Greaves(1980), a Design Engineer with ABB (1981), a SeniorSpace Power Electronics Engineer with Canadian

Astronautics Ltd. (1987–1990), a Technical Advisor with Nortel (1990–1994),and a Professor with Concordia University, Montreal, QC, Canada (1994–2000).In addition, he has been a Consultant with Astec, Ballard Power, Freescale Semi-conductors, Inc., General Electric, Intel, and Nortel. He is currently a Professorand Canada Research Chair with the Department of Electrical and ComputerEngineering, Queen’s University, Kingston, ON, where he is also the Directorof the Queen’s Centre for Energy and Power Electronics Research. He has se-cured over $20 million cash and $20 million in kind in external research fundingto conduct research in the field of power electronics. He has supervised morethan 75 graduate students, postdoctoral fellows, and research engineers. He haspublished more than 350 technical papers (including more than 90 IEEE Trans-actions papers). He is the holder of more than 50 patents (granted and pending).

Dr. Jain is a Fellow of the Engineering Institute of Canada and the Cana-dian Academy of Engineering. He is an Editor of the International Journal ofPower Electronics. He received the 2004 Engineering Medal (R&D) from theProfessional Engineers of Ontario and the 2011 IEEE William Newell PowerElectronics Field Award. He is an Associate Editor of the IEEE TRANSACTIONS

ON POWER ELECTRONICS. He is also a Distinguished Lecturer of the IEEE In-dustry Applications Society.

implementation of a novel digital active emi technique in a dsp-based dc–dc digital controller...

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